1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Faraday FTMAC100 10/100 Ethernet
4 *
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 */
8
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10
11 #include <linux/dma-mapping.h>
12 #include <linux/etherdevice.h>
13 #include <linux/ethtool.h>
14 #include <linux/if_ether.h>
15 #include <linux/if_vlan.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/mii.h>
20 #include <linux/module.h>
21 #include <linux/mod_devicetable.h>
22 #include <linux/netdevice.h>
23 #include <linux/platform_device.h>
24
25 #include "ftmac100.h"
26
27 #define DRV_NAME "ftmac100"
28
29 #define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
30 #define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
31
32 #define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
33 #define MAX_PKT_SIZE RX_BUF_SIZE /* multi-segment not supported */
34
35 #if MAX_PKT_SIZE > 0x7ff
36 #error invalid MAX_PKT_SIZE
37 #endif
38
39 #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
40 #error invalid RX_BUF_SIZE
41 #endif
42
43 /******************************************************************************
44 * private data
45 *****************************************************************************/
46 struct ftmac100_descs {
47 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
48 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
49 };
50
51 struct ftmac100 {
52 struct resource *res;
53 void __iomem *base;
54 int irq;
55
56 struct ftmac100_descs *descs;
57 dma_addr_t descs_dma_addr;
58
59 unsigned int rx_pointer;
60 unsigned int tx_clean_pointer;
61 unsigned int tx_pointer;
62 unsigned int tx_pending;
63
64 spinlock_t tx_lock;
65
66 struct net_device *netdev;
67 struct device *dev;
68 struct napi_struct napi;
69
70 struct mii_if_info mii;
71 };
72
73 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
74 struct ftmac100_rxdes *rxdes, gfp_t gfp);
75
76 /******************************************************************************
77 * internal functions (hardware register access)
78 *****************************************************************************/
79 #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
80 FTMAC100_INT_NORXBUF | \
81 FTMAC100_INT_XPKT_OK | \
82 FTMAC100_INT_XPKT_LOST | \
83 FTMAC100_INT_RPKT_LOST | \
84 FTMAC100_INT_AHB_ERR | \
85 FTMAC100_INT_PHYSTS_CHG)
86
87 #define INT_MASK_ALL_DISABLED 0
88
ftmac100_enable_all_int(struct ftmac100 * priv)89 static void ftmac100_enable_all_int(struct ftmac100 *priv)
90 {
91 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
92 }
93
ftmac100_disable_all_int(struct ftmac100 * priv)94 static void ftmac100_disable_all_int(struct ftmac100 *priv)
95 {
96 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
97 }
98
ftmac100_set_rx_ring_base(struct ftmac100 * priv,dma_addr_t addr)99 static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
100 {
101 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
102 }
103
ftmac100_set_tx_ring_base(struct ftmac100 * priv,dma_addr_t addr)104 static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
105 {
106 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
107 }
108
ftmac100_txdma_start_polling(struct ftmac100 * priv)109 static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
110 {
111 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
112 }
113
ftmac100_reset(struct ftmac100 * priv)114 static int ftmac100_reset(struct ftmac100 *priv)
115 {
116 struct net_device *netdev = priv->netdev;
117 int i;
118
119 /* NOTE: reset clears all registers */
120 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
121
122 for (i = 0; i < 5; i++) {
123 unsigned int maccr;
124
125 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
126 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
127 /*
128 * FTMAC100_MACCR_SW_RST cleared does not indicate
129 * that hardware reset completed (what the f*ck).
130 * We still need to wait for a while.
131 */
132 udelay(500);
133 return 0;
134 }
135
136 udelay(1000);
137 }
138
139 netdev_err(netdev, "software reset failed\n");
140 return -EIO;
141 }
142
ftmac100_set_mac(struct ftmac100 * priv,const unsigned char * mac)143 static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
144 {
145 unsigned int maddr = mac[0] << 8 | mac[1];
146 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
147
148 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
149 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
150 }
151
152 #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
153 FTMAC100_MACCR_RCV_EN | \
154 FTMAC100_MACCR_XDMA_EN | \
155 FTMAC100_MACCR_RDMA_EN | \
156 FTMAC100_MACCR_CRC_APD | \
157 FTMAC100_MACCR_FULLDUP | \
158 FTMAC100_MACCR_RX_RUNT | \
159 FTMAC100_MACCR_RX_BROADPKT)
160
ftmac100_start_hw(struct ftmac100 * priv)161 static int ftmac100_start_hw(struct ftmac100 *priv)
162 {
163 struct net_device *netdev = priv->netdev;
164 unsigned int maccr = MACCR_ENABLE_ALL;
165
166 if (ftmac100_reset(priv))
167 return -EIO;
168
169 /* setup ring buffer base registers */
170 ftmac100_set_rx_ring_base(priv,
171 priv->descs_dma_addr +
172 offsetof(struct ftmac100_descs, rxdes));
173 ftmac100_set_tx_ring_base(priv,
174 priv->descs_dma_addr +
175 offsetof(struct ftmac100_descs, txdes));
176
177 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
178
179 ftmac100_set_mac(priv, netdev->dev_addr);
180
181 /* See ftmac100_change_mtu() */
182 if (netdev->mtu > ETH_DATA_LEN)
183 maccr |= FTMAC100_MACCR_RX_FTL;
184
185 /* Add other bits as needed */
186 if (netdev->flags & IFF_PROMISC)
187 maccr |= FTMAC100_MACCR_RCV_ALL;
188 if (netdev->flags & IFF_ALLMULTI)
189 maccr |= FTMAC100_MACCR_RX_MULTIPKT;
190
191 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
192 return 0;
193 }
194
ftmac100_stop_hw(struct ftmac100 * priv)195 static void ftmac100_stop_hw(struct ftmac100 *priv)
196 {
197 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
198 }
199
200 /******************************************************************************
201 * internal functions (receive descriptor)
202 *****************************************************************************/
ftmac100_rxdes_first_segment(struct ftmac100_rxdes * rxdes)203 static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
204 {
205 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
206 }
207
ftmac100_rxdes_last_segment(struct ftmac100_rxdes * rxdes)208 static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
209 {
210 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
211 }
212
ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes * rxdes)213 static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
214 {
215 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
216 }
217
ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes * rxdes)218 static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
219 {
220 /* clear status bits */
221 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
222 }
223
ftmac100_rxdes_rx_error(struct ftmac100_rxdes * rxdes)224 static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
225 {
226 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
227 }
228
ftmac100_rxdes_crc_error(struct ftmac100_rxdes * rxdes)229 static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
230 {
231 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
232 }
233
ftmac100_rxdes_runt(struct ftmac100_rxdes * rxdes)234 static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
235 {
236 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
237 }
238
ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes * rxdes)239 static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
240 {
241 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
242 }
243
ftmac100_rxdes_frame_length(struct ftmac100_rxdes * rxdes)244 static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
245 {
246 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
247 }
248
ftmac100_rxdes_multicast(struct ftmac100_rxdes * rxdes)249 static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
250 {
251 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
252 }
253
ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes * rxdes,unsigned int size)254 static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
255 unsigned int size)
256 {
257 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
258 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
259 }
260
ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes * rxdes)261 static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
262 {
263 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
264 }
265
ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes * rxdes,dma_addr_t addr)266 static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
267 dma_addr_t addr)
268 {
269 rxdes->rxdes2 = cpu_to_le32(addr);
270 }
271
ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes * rxdes)272 static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
273 {
274 return le32_to_cpu(rxdes->rxdes2);
275 }
276
277 /*
278 * rxdes3 is not used by hardware. We use it to keep track of page.
279 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
280 */
ftmac100_rxdes_set_page(struct ftmac100_rxdes * rxdes,struct page * page)281 static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
282 {
283 rxdes->rxdes3 = (unsigned int)page;
284 }
285
ftmac100_rxdes_get_page(struct ftmac100_rxdes * rxdes)286 static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
287 {
288 return (struct page *)rxdes->rxdes3;
289 }
290
291 /******************************************************************************
292 * internal functions (receive)
293 *****************************************************************************/
ftmac100_next_rx_pointer(int pointer)294 static int ftmac100_next_rx_pointer(int pointer)
295 {
296 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
297 }
298
ftmac100_rx_pointer_advance(struct ftmac100 * priv)299 static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
300 {
301 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
302 }
303
ftmac100_current_rxdes(struct ftmac100 * priv)304 static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
305 {
306 return &priv->descs->rxdes[priv->rx_pointer];
307 }
308
309 static struct ftmac100_rxdes *
ftmac100_rx_locate_first_segment(struct ftmac100 * priv)310 ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
311 {
312 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
313
314 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
315 if (ftmac100_rxdes_first_segment(rxdes))
316 return rxdes;
317
318 ftmac100_rxdes_set_dma_own(rxdes);
319 ftmac100_rx_pointer_advance(priv);
320 rxdes = ftmac100_current_rxdes(priv);
321 }
322
323 return NULL;
324 }
325
ftmac100_rx_packet_error(struct ftmac100 * priv,struct ftmac100_rxdes * rxdes)326 static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
327 struct ftmac100_rxdes *rxdes)
328 {
329 struct net_device *netdev = priv->netdev;
330 bool error = false;
331
332 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
333 if (net_ratelimit())
334 netdev_info(netdev, "rx err\n");
335
336 netdev->stats.rx_errors++;
337 error = true;
338 }
339
340 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
341 if (net_ratelimit())
342 netdev_info(netdev, "rx crc err\n");
343
344 netdev->stats.rx_crc_errors++;
345 error = true;
346 }
347
348 if (unlikely(ftmac100_rxdes_runt(rxdes))) {
349 if (net_ratelimit())
350 netdev_info(netdev, "rx runt\n");
351
352 netdev->stats.rx_length_errors++;
353 error = true;
354 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
355 if (net_ratelimit())
356 netdev_info(netdev, "rx odd nibble\n");
357
358 netdev->stats.rx_length_errors++;
359 error = true;
360 }
361 /*
362 * FTMAC100_RXDES0_FTL is not an error, it just indicates that the
363 * frame is longer than 1518 octets. Receiving these is possible when
364 * we told the hardware not to drop them, via FTMAC100_MACCR_RX_FTL.
365 */
366
367 return error;
368 }
369
ftmac100_rx_drop_packet(struct ftmac100 * priv)370 static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
371 {
372 struct net_device *netdev = priv->netdev;
373 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
374 bool done = false;
375
376 if (net_ratelimit())
377 netdev_dbg(netdev, "drop packet %p\n", rxdes);
378
379 do {
380 if (ftmac100_rxdes_last_segment(rxdes))
381 done = true;
382
383 ftmac100_rxdes_set_dma_own(rxdes);
384 ftmac100_rx_pointer_advance(priv);
385 rxdes = ftmac100_current_rxdes(priv);
386 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
387
388 netdev->stats.rx_dropped++;
389 }
390
ftmac100_rx_packet(struct ftmac100 * priv,int * processed)391 static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
392 {
393 struct net_device *netdev = priv->netdev;
394 struct ftmac100_rxdes *rxdes;
395 struct sk_buff *skb;
396 struct page *page;
397 dma_addr_t map;
398 int length;
399 bool ret;
400
401 rxdes = ftmac100_rx_locate_first_segment(priv);
402 if (!rxdes)
403 return false;
404
405 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
406 ftmac100_rx_drop_packet(priv);
407 return true;
408 }
409
410 /* We don't support multi-segment packets for now, so drop them. */
411 ret = ftmac100_rxdes_last_segment(rxdes);
412 if (unlikely(!ret)) {
413 netdev->stats.rx_length_errors++;
414 ftmac100_rx_drop_packet(priv);
415 return true;
416 }
417
418 /* start processing */
419 skb = netdev_alloc_skb_ip_align(netdev, 128);
420 if (unlikely(!skb)) {
421 if (net_ratelimit())
422 netdev_err(netdev, "rx skb alloc failed\n");
423
424 ftmac100_rx_drop_packet(priv);
425 return true;
426 }
427
428 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
429 netdev->stats.multicast++;
430
431 map = ftmac100_rxdes_get_dma_addr(rxdes);
432 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
433
434 length = ftmac100_rxdes_frame_length(rxdes);
435 page = ftmac100_rxdes_get_page(rxdes);
436 skb_fill_page_desc(skb, 0, page, 0, length);
437 skb->len += length;
438 skb->data_len += length;
439
440 if (length > 128) {
441 skb->truesize += PAGE_SIZE;
442 /* We pull the minimum amount into linear part */
443 __pskb_pull_tail(skb, ETH_HLEN);
444 } else {
445 /* Small frames are copied into linear part to free one page */
446 __pskb_pull_tail(skb, length);
447 }
448 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
449
450 ftmac100_rx_pointer_advance(priv);
451
452 skb->protocol = eth_type_trans(skb, netdev);
453
454 netdev->stats.rx_packets++;
455 netdev->stats.rx_bytes += skb->len;
456
457 /* push packet to protocol stack */
458 netif_receive_skb(skb);
459
460 (*processed)++;
461 return true;
462 }
463
464 /******************************************************************************
465 * internal functions (transmit descriptor)
466 *****************************************************************************/
ftmac100_txdes_reset(struct ftmac100_txdes * txdes)467 static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
468 {
469 /* clear all except end of ring bit */
470 txdes->txdes0 = 0;
471 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
472 txdes->txdes2 = 0;
473 txdes->txdes3 = 0;
474 }
475
ftmac100_txdes_owned_by_dma(struct ftmac100_txdes * txdes)476 static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
477 {
478 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
479 }
480
ftmac100_txdes_set_dma_own(struct ftmac100_txdes * txdes)481 static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
482 {
483 /*
484 * Make sure dma own bit will not be set before any other
485 * descriptor fields.
486 */
487 wmb();
488 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
489 }
490
ftmac100_txdes_excessive_collision(struct ftmac100_txdes * txdes)491 static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
492 {
493 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
494 }
495
ftmac100_txdes_late_collision(struct ftmac100_txdes * txdes)496 static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
497 {
498 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
499 }
500
ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes * txdes)501 static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
502 {
503 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
504 }
505
ftmac100_txdes_set_first_segment(struct ftmac100_txdes * txdes)506 static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
507 {
508 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
509 }
510
ftmac100_txdes_set_last_segment(struct ftmac100_txdes * txdes)511 static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
512 {
513 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
514 }
515
ftmac100_txdes_set_txint(struct ftmac100_txdes * txdes)516 static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
517 {
518 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
519 }
520
ftmac100_txdes_set_buffer_size(struct ftmac100_txdes * txdes,unsigned int len)521 static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
522 unsigned int len)
523 {
524 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
525 }
526
ftmac100_txdes_set_dma_addr(struct ftmac100_txdes * txdes,dma_addr_t addr)527 static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
528 dma_addr_t addr)
529 {
530 txdes->txdes2 = cpu_to_le32(addr);
531 }
532
ftmac100_txdes_get_dma_addr(struct ftmac100_txdes * txdes)533 static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
534 {
535 return le32_to_cpu(txdes->txdes2);
536 }
537
538 /*
539 * txdes3 is not used by hardware. We use it to keep track of socket buffer.
540 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
541 */
ftmac100_txdes_set_skb(struct ftmac100_txdes * txdes,struct sk_buff * skb)542 static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
543 {
544 txdes->txdes3 = (unsigned int)skb;
545 }
546
ftmac100_txdes_get_skb(struct ftmac100_txdes * txdes)547 static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
548 {
549 return (struct sk_buff *)txdes->txdes3;
550 }
551
552 /******************************************************************************
553 * internal functions (transmit)
554 *****************************************************************************/
ftmac100_next_tx_pointer(int pointer)555 static int ftmac100_next_tx_pointer(int pointer)
556 {
557 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
558 }
559
ftmac100_tx_pointer_advance(struct ftmac100 * priv)560 static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
561 {
562 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
563 }
564
ftmac100_tx_clean_pointer_advance(struct ftmac100 * priv)565 static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
566 {
567 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
568 }
569
ftmac100_current_txdes(struct ftmac100 * priv)570 static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
571 {
572 return &priv->descs->txdes[priv->tx_pointer];
573 }
574
ftmac100_current_clean_txdes(struct ftmac100 * priv)575 static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
576 {
577 return &priv->descs->txdes[priv->tx_clean_pointer];
578 }
579
ftmac100_tx_complete_packet(struct ftmac100 * priv)580 static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
581 {
582 struct net_device *netdev = priv->netdev;
583 struct ftmac100_txdes *txdes;
584 struct sk_buff *skb;
585 dma_addr_t map;
586
587 if (priv->tx_pending == 0)
588 return false;
589
590 txdes = ftmac100_current_clean_txdes(priv);
591
592 if (ftmac100_txdes_owned_by_dma(txdes))
593 return false;
594
595 skb = ftmac100_txdes_get_skb(txdes);
596 map = ftmac100_txdes_get_dma_addr(txdes);
597
598 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
599 ftmac100_txdes_late_collision(txdes))) {
600 /*
601 * packet transmitted to ethernet lost due to late collision
602 * or excessive collision
603 */
604 netdev->stats.tx_aborted_errors++;
605 } else {
606 netdev->stats.tx_packets++;
607 netdev->stats.tx_bytes += skb->len;
608 }
609
610 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
611 dev_kfree_skb(skb);
612
613 ftmac100_txdes_reset(txdes);
614
615 ftmac100_tx_clean_pointer_advance(priv);
616
617 spin_lock(&priv->tx_lock);
618 priv->tx_pending--;
619 spin_unlock(&priv->tx_lock);
620 netif_wake_queue(netdev);
621
622 return true;
623 }
624
ftmac100_tx_complete(struct ftmac100 * priv)625 static void ftmac100_tx_complete(struct ftmac100 *priv)
626 {
627 while (ftmac100_tx_complete_packet(priv))
628 ;
629 }
630
ftmac100_xmit(struct ftmac100 * priv,struct sk_buff * skb,dma_addr_t map)631 static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
632 dma_addr_t map)
633 {
634 struct net_device *netdev = priv->netdev;
635 struct ftmac100_txdes *txdes;
636 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
637
638 txdes = ftmac100_current_txdes(priv);
639 ftmac100_tx_pointer_advance(priv);
640
641 /* setup TX descriptor */
642 ftmac100_txdes_set_skb(txdes, skb);
643 ftmac100_txdes_set_dma_addr(txdes, map);
644
645 ftmac100_txdes_set_first_segment(txdes);
646 ftmac100_txdes_set_last_segment(txdes);
647 ftmac100_txdes_set_txint(txdes);
648 ftmac100_txdes_set_buffer_size(txdes, len);
649
650 spin_lock(&priv->tx_lock);
651 priv->tx_pending++;
652 if (priv->tx_pending == TX_QUEUE_ENTRIES)
653 netif_stop_queue(netdev);
654
655 /* start transmit */
656 ftmac100_txdes_set_dma_own(txdes);
657 spin_unlock(&priv->tx_lock);
658
659 ftmac100_txdma_start_polling(priv);
660 return NETDEV_TX_OK;
661 }
662
663 /******************************************************************************
664 * internal functions (buffer)
665 *****************************************************************************/
ftmac100_alloc_rx_page(struct ftmac100 * priv,struct ftmac100_rxdes * rxdes,gfp_t gfp)666 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
667 struct ftmac100_rxdes *rxdes, gfp_t gfp)
668 {
669 struct net_device *netdev = priv->netdev;
670 struct page *page;
671 dma_addr_t map;
672
673 page = alloc_page(gfp);
674 if (!page) {
675 if (net_ratelimit())
676 netdev_err(netdev, "failed to allocate rx page\n");
677 return -ENOMEM;
678 }
679
680 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
681 if (unlikely(dma_mapping_error(priv->dev, map))) {
682 if (net_ratelimit())
683 netdev_err(netdev, "failed to map rx page\n");
684 __free_page(page);
685 return -ENOMEM;
686 }
687
688 ftmac100_rxdes_set_page(rxdes, page);
689 ftmac100_rxdes_set_dma_addr(rxdes, map);
690 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
691 ftmac100_rxdes_set_dma_own(rxdes);
692 return 0;
693 }
694
ftmac100_free_buffers(struct ftmac100 * priv)695 static void ftmac100_free_buffers(struct ftmac100 *priv)
696 {
697 int i;
698
699 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
700 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
701 struct page *page = ftmac100_rxdes_get_page(rxdes);
702 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
703
704 if (!page)
705 continue;
706
707 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
708 __free_page(page);
709 }
710
711 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
712 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
713 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
714 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
715
716 if (!skb)
717 continue;
718
719 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
720 dev_kfree_skb(skb);
721 }
722
723 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
724 priv->descs, priv->descs_dma_addr);
725 }
726
ftmac100_alloc_buffers(struct ftmac100 * priv)727 static int ftmac100_alloc_buffers(struct ftmac100 *priv)
728 {
729 int i;
730
731 priv->descs = dma_alloc_coherent(priv->dev,
732 sizeof(struct ftmac100_descs),
733 &priv->descs_dma_addr, GFP_KERNEL);
734 if (!priv->descs)
735 return -ENOMEM;
736
737 /* initialize RX ring */
738 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
739
740 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
741 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
742
743 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
744 goto err;
745 }
746
747 /* initialize TX ring */
748 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
749 return 0;
750
751 err:
752 ftmac100_free_buffers(priv);
753 return -ENOMEM;
754 }
755
756 /******************************************************************************
757 * struct mii_if_info functions
758 *****************************************************************************/
ftmac100_mdio_read(struct net_device * netdev,int phy_id,int reg)759 static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
760 {
761 struct ftmac100 *priv = netdev_priv(netdev);
762 unsigned int phycr;
763 int i;
764
765 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
766 FTMAC100_PHYCR_REGAD(reg) |
767 FTMAC100_PHYCR_MIIRD;
768
769 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
770
771 for (i = 0; i < 10; i++) {
772 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
773
774 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
775 return phycr & FTMAC100_PHYCR_MIIRDATA;
776
777 udelay(100);
778 }
779
780 netdev_err(netdev, "mdio read timed out\n");
781 return 0;
782 }
783
ftmac100_mdio_write(struct net_device * netdev,int phy_id,int reg,int data)784 static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
785 int data)
786 {
787 struct ftmac100 *priv = netdev_priv(netdev);
788 unsigned int phycr;
789 int i;
790
791 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
792 FTMAC100_PHYCR_REGAD(reg) |
793 FTMAC100_PHYCR_MIIWR;
794
795 data = FTMAC100_PHYWDATA_MIIWDATA(data);
796
797 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
798 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
799
800 for (i = 0; i < 10; i++) {
801 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
802
803 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
804 return;
805
806 udelay(100);
807 }
808
809 netdev_err(netdev, "mdio write timed out\n");
810 }
811
812 /******************************************************************************
813 * struct ethtool_ops functions
814 *****************************************************************************/
ftmac100_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)815 static void ftmac100_get_drvinfo(struct net_device *netdev,
816 struct ethtool_drvinfo *info)
817 {
818 strscpy(info->driver, DRV_NAME, sizeof(info->driver));
819 strscpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
820 }
821
ftmac100_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)822 static int ftmac100_get_link_ksettings(struct net_device *netdev,
823 struct ethtool_link_ksettings *cmd)
824 {
825 struct ftmac100 *priv = netdev_priv(netdev);
826
827 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
828
829 return 0;
830 }
831
ftmac100_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)832 static int ftmac100_set_link_ksettings(struct net_device *netdev,
833 const struct ethtool_link_ksettings *cmd)
834 {
835 struct ftmac100 *priv = netdev_priv(netdev);
836 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
837 }
838
ftmac100_nway_reset(struct net_device * netdev)839 static int ftmac100_nway_reset(struct net_device *netdev)
840 {
841 struct ftmac100 *priv = netdev_priv(netdev);
842 return mii_nway_restart(&priv->mii);
843 }
844
ftmac100_get_link(struct net_device * netdev)845 static u32 ftmac100_get_link(struct net_device *netdev)
846 {
847 struct ftmac100 *priv = netdev_priv(netdev);
848 return mii_link_ok(&priv->mii);
849 }
850
851 static const struct ethtool_ops ftmac100_ethtool_ops = {
852 .get_drvinfo = ftmac100_get_drvinfo,
853 .nway_reset = ftmac100_nway_reset,
854 .get_link = ftmac100_get_link,
855 .get_link_ksettings = ftmac100_get_link_ksettings,
856 .set_link_ksettings = ftmac100_set_link_ksettings,
857 };
858
859 /******************************************************************************
860 * interrupt handler
861 *****************************************************************************/
ftmac100_interrupt(int irq,void * dev_id)862 static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
863 {
864 struct net_device *netdev = dev_id;
865 struct ftmac100 *priv = netdev_priv(netdev);
866
867 /* Disable interrupts for polling */
868 ftmac100_disable_all_int(priv);
869 if (likely(netif_running(netdev)))
870 napi_schedule(&priv->napi);
871
872 return IRQ_HANDLED;
873 }
874
875 /******************************************************************************
876 * struct napi_struct functions
877 *****************************************************************************/
ftmac100_poll(struct napi_struct * napi,int budget)878 static int ftmac100_poll(struct napi_struct *napi, int budget)
879 {
880 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
881 struct net_device *netdev = priv->netdev;
882 unsigned int status;
883 bool completed = true;
884 int rx = 0;
885
886 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
887
888 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
889 /*
890 * FTMAC100_INT_RPKT_FINISH:
891 * RX DMA has received packets into RX buffer successfully
892 *
893 * FTMAC100_INT_NORXBUF:
894 * RX buffer unavailable
895 */
896 bool retry;
897
898 do {
899 retry = ftmac100_rx_packet(priv, &rx);
900 } while (retry && rx < budget);
901
902 if (retry && rx == budget)
903 completed = false;
904 }
905
906 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
907 /*
908 * FTMAC100_INT_XPKT_OK:
909 * packet transmitted to ethernet successfully
910 *
911 * FTMAC100_INT_XPKT_LOST:
912 * packet transmitted to ethernet lost due to late
913 * collision or excessive collision
914 */
915 ftmac100_tx_complete(priv);
916 }
917
918 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
919 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
920 if (net_ratelimit())
921 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
922 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
923 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
924 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
925 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
926
927 if (status & FTMAC100_INT_NORXBUF) {
928 /* RX buffer unavailable */
929 netdev->stats.rx_over_errors++;
930 }
931
932 if (status & FTMAC100_INT_RPKT_LOST) {
933 /* received packet lost due to RX FIFO full */
934 netdev->stats.rx_fifo_errors++;
935 }
936
937 if (status & FTMAC100_INT_PHYSTS_CHG) {
938 /* PHY link status change */
939 mii_check_link(&priv->mii);
940 }
941 }
942
943 if (completed) {
944 /* stop polling */
945 napi_complete(napi);
946 ftmac100_enable_all_int(priv);
947 }
948
949 return rx;
950 }
951
952 /******************************************************************************
953 * struct net_device_ops functions
954 *****************************************************************************/
ftmac100_open(struct net_device * netdev)955 static int ftmac100_open(struct net_device *netdev)
956 {
957 struct ftmac100 *priv = netdev_priv(netdev);
958 int err;
959
960 err = ftmac100_alloc_buffers(priv);
961 if (err) {
962 netdev_err(netdev, "failed to allocate buffers\n");
963 goto err_alloc;
964 }
965
966 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
967 if (err) {
968 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
969 goto err_irq;
970 }
971
972 priv->rx_pointer = 0;
973 priv->tx_clean_pointer = 0;
974 priv->tx_pointer = 0;
975 priv->tx_pending = 0;
976
977 err = ftmac100_start_hw(priv);
978 if (err)
979 goto err_hw;
980
981 napi_enable(&priv->napi);
982 netif_start_queue(netdev);
983
984 ftmac100_enable_all_int(priv);
985
986 return 0;
987
988 err_hw:
989 free_irq(priv->irq, netdev);
990 err_irq:
991 ftmac100_free_buffers(priv);
992 err_alloc:
993 return err;
994 }
995
ftmac100_stop(struct net_device * netdev)996 static int ftmac100_stop(struct net_device *netdev)
997 {
998 struct ftmac100 *priv = netdev_priv(netdev);
999
1000 ftmac100_disable_all_int(priv);
1001 netif_stop_queue(netdev);
1002 napi_disable(&priv->napi);
1003 ftmac100_stop_hw(priv);
1004 free_irq(priv->irq, netdev);
1005 ftmac100_free_buffers(priv);
1006
1007 return 0;
1008 }
1009
1010 static netdev_tx_t
ftmac100_hard_start_xmit(struct sk_buff * skb,struct net_device * netdev)1011 ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1012 {
1013 struct ftmac100 *priv = netdev_priv(netdev);
1014 dma_addr_t map;
1015
1016 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1017 if (net_ratelimit())
1018 netdev_dbg(netdev, "tx packet too big\n");
1019
1020 netdev->stats.tx_dropped++;
1021 dev_kfree_skb(skb);
1022 return NETDEV_TX_OK;
1023 }
1024
1025 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1026 if (unlikely(dma_mapping_error(priv->dev, map))) {
1027 /* drop packet */
1028 if (net_ratelimit())
1029 netdev_err(netdev, "map socket buffer failed\n");
1030
1031 netdev->stats.tx_dropped++;
1032 dev_kfree_skb(skb);
1033 return NETDEV_TX_OK;
1034 }
1035
1036 return ftmac100_xmit(priv, skb, map);
1037 }
1038
1039 /* optional */
ftmac100_do_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)1040 static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1041 {
1042 struct ftmac100 *priv = netdev_priv(netdev);
1043 struct mii_ioctl_data *data = if_mii(ifr);
1044
1045 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1046 }
1047
ftmac100_change_mtu(struct net_device * netdev,int mtu)1048 static int ftmac100_change_mtu(struct net_device *netdev, int mtu)
1049 {
1050 struct ftmac100 *priv = netdev_priv(netdev);
1051 unsigned int maccr;
1052
1053 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
1054 if (mtu > ETH_DATA_LEN) {
1055 /* process long packets in the driver */
1056 maccr |= FTMAC100_MACCR_RX_FTL;
1057 } else {
1058 /* Let the controller drop incoming packets greater
1059 * than 1518 (that is 1500 + 14 Ethernet + 4 FCS).
1060 */
1061 maccr &= ~FTMAC100_MACCR_RX_FTL;
1062 }
1063 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
1064
1065 netdev->mtu = mtu;
1066
1067 return 0;
1068 }
1069
1070 static const struct net_device_ops ftmac100_netdev_ops = {
1071 .ndo_open = ftmac100_open,
1072 .ndo_stop = ftmac100_stop,
1073 .ndo_start_xmit = ftmac100_hard_start_xmit,
1074 .ndo_set_mac_address = eth_mac_addr,
1075 .ndo_validate_addr = eth_validate_addr,
1076 .ndo_eth_ioctl = ftmac100_do_ioctl,
1077 .ndo_change_mtu = ftmac100_change_mtu,
1078 };
1079
1080 /******************************************************************************
1081 * struct platform_driver functions
1082 *****************************************************************************/
ftmac100_probe(struct platform_device * pdev)1083 static int ftmac100_probe(struct platform_device *pdev)
1084 {
1085 struct resource *res;
1086 int irq;
1087 struct net_device *netdev;
1088 struct ftmac100 *priv;
1089 int err;
1090
1091 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1092 if (!res)
1093 return -ENXIO;
1094
1095 irq = platform_get_irq(pdev, 0);
1096 if (irq < 0)
1097 return irq;
1098
1099 /* setup net_device */
1100 netdev = alloc_etherdev(sizeof(*priv));
1101 if (!netdev) {
1102 err = -ENOMEM;
1103 goto err_alloc_etherdev;
1104 }
1105
1106 SET_NETDEV_DEV(netdev, &pdev->dev);
1107 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1108 netdev->netdev_ops = &ftmac100_netdev_ops;
1109 netdev->max_mtu = MAX_PKT_SIZE - VLAN_ETH_HLEN;
1110
1111 err = platform_get_ethdev_address(&pdev->dev, netdev);
1112 if (err == -EPROBE_DEFER)
1113 goto defer_get_mac;
1114
1115 platform_set_drvdata(pdev, netdev);
1116
1117 /* setup private data */
1118 priv = netdev_priv(netdev);
1119 priv->netdev = netdev;
1120 priv->dev = &pdev->dev;
1121
1122 spin_lock_init(&priv->tx_lock);
1123
1124 /* initialize NAPI */
1125 netif_napi_add(netdev, &priv->napi, ftmac100_poll);
1126
1127 /* map io memory */
1128 priv->res = request_mem_region(res->start, resource_size(res),
1129 dev_name(&pdev->dev));
1130 if (!priv->res) {
1131 dev_err(&pdev->dev, "Could not reserve memory region\n");
1132 err = -ENOMEM;
1133 goto err_req_mem;
1134 }
1135
1136 priv->base = ioremap(res->start, resource_size(res));
1137 if (!priv->base) {
1138 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1139 err = -EIO;
1140 goto err_ioremap;
1141 }
1142
1143 priv->irq = irq;
1144
1145 /* initialize struct mii_if_info */
1146 priv->mii.phy_id = 0;
1147 priv->mii.phy_id_mask = 0x1f;
1148 priv->mii.reg_num_mask = 0x1f;
1149 priv->mii.dev = netdev;
1150 priv->mii.mdio_read = ftmac100_mdio_read;
1151 priv->mii.mdio_write = ftmac100_mdio_write;
1152
1153 /* register network device */
1154 err = register_netdev(netdev);
1155 if (err) {
1156 dev_err(&pdev->dev, "Failed to register netdev\n");
1157 goto err_register_netdev;
1158 }
1159
1160 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1161
1162 if (!is_valid_ether_addr(netdev->dev_addr)) {
1163 eth_hw_addr_random(netdev);
1164 netdev_info(netdev, "generated random MAC address %pM\n",
1165 netdev->dev_addr);
1166 }
1167
1168 return 0;
1169
1170 err_register_netdev:
1171 iounmap(priv->base);
1172 err_ioremap:
1173 release_resource(priv->res);
1174 err_req_mem:
1175 netif_napi_del(&priv->napi);
1176 defer_get_mac:
1177 free_netdev(netdev);
1178 err_alloc_etherdev:
1179 return err;
1180 }
1181
ftmac100_remove(struct platform_device * pdev)1182 static int ftmac100_remove(struct platform_device *pdev)
1183 {
1184 struct net_device *netdev;
1185 struct ftmac100 *priv;
1186
1187 netdev = platform_get_drvdata(pdev);
1188 priv = netdev_priv(netdev);
1189
1190 unregister_netdev(netdev);
1191
1192 iounmap(priv->base);
1193 release_resource(priv->res);
1194
1195 netif_napi_del(&priv->napi);
1196 free_netdev(netdev);
1197 return 0;
1198 }
1199
1200 static const struct of_device_id ftmac100_of_ids[] = {
1201 { .compatible = "andestech,atmac100" },
1202 { }
1203 };
1204
1205 static struct platform_driver ftmac100_driver = {
1206 .probe = ftmac100_probe,
1207 .remove = ftmac100_remove,
1208 .driver = {
1209 .name = DRV_NAME,
1210 .of_match_table = ftmac100_of_ids
1211 },
1212 };
1213
1214 /******************************************************************************
1215 * initialization / finalization
1216 *****************************************************************************/
1217 module_platform_driver(ftmac100_driver);
1218
1219 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1220 MODULE_DESCRIPTION("FTMAC100 driver");
1221 MODULE_LICENSE("GPL");
1222 MODULE_DEVICE_TABLE(of, ftmac100_of_ids);
1223