1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7 #include <linux/crash_dump.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/device.h>
11 #include <linux/netdevice.h>
12 #include <linux/etherdevice.h>
13 #include <linux/skbuff.h>
14 #include <linux/errno.h>
15 #include <linux/list.h>
16 #include <linux/string.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
19 #include <asm/byteorder.h>
20 #include <asm/param.h>
21 #include <linux/io.h>
22 #include <linux/netdev_features.h>
23 #include <linux/udp.h>
24 #include <linux/tcp.h>
25 #include <net/udp_tunnel.h>
26 #include <linux/ip.h>
27 #include <net/ipv6.h>
28 #include <net/tcp.h>
29 #include <linux/if_ether.h>
30 #include <linux/if_vlan.h>
31 #include <linux/pkt_sched.h>
32 #include <linux/ethtool.h>
33 #include <linux/in.h>
34 #include <linux/random.h>
35 #include <net/ip6_checksum.h>
36 #include <linux/bitops.h>
37 #include <linux/vmalloc.h>
38 #include <linux/aer.h>
39 #include "qede.h"
40 #include "qede_ptp.h"
41
42 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
43 MODULE_LICENSE("GPL");
44
45 static uint debug;
46 module_param(debug, uint, 0);
47 MODULE_PARM_DESC(debug, " Default debug msglevel");
48
49 static const struct qed_eth_ops *qed_ops;
50
51 #define CHIP_NUM_57980S_40 0x1634
52 #define CHIP_NUM_57980S_10 0x1666
53 #define CHIP_NUM_57980S_MF 0x1636
54 #define CHIP_NUM_57980S_100 0x1644
55 #define CHIP_NUM_57980S_50 0x1654
56 #define CHIP_NUM_57980S_25 0x1656
57 #define CHIP_NUM_57980S_IOV 0x1664
58 #define CHIP_NUM_AH 0x8070
59 #define CHIP_NUM_AH_IOV 0x8090
60
61 #ifndef PCI_DEVICE_ID_NX2_57980E
62 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
63 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
64 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
65 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
66 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
67 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
68 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
69 #define PCI_DEVICE_ID_AH CHIP_NUM_AH
70 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
71
72 #endif
73
74 enum qede_pci_private {
75 QEDE_PRIVATE_PF,
76 QEDE_PRIVATE_VF
77 };
78
79 static const struct pci_device_id qede_pci_tbl[] = {
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
86 #ifdef CONFIG_QED_SRIOV
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
88 #endif
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
90 #ifdef CONFIG_QED_SRIOV
91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
92 #endif
93 { 0 }
94 };
95
96 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
97
98 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
99 static pci_ers_result_t
100 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
101
102 #define TX_TIMEOUT (5 * HZ)
103
104 /* Utilize last protocol index for XDP */
105 #define XDP_PI 11
106
107 static void qede_remove(struct pci_dev *pdev);
108 static void qede_shutdown(struct pci_dev *pdev);
109 static void qede_link_update(void *dev, struct qed_link_output *link);
110 static void qede_schedule_recovery_handler(void *dev);
111 static void qede_recovery_handler(struct qede_dev *edev);
112 static void qede_schedule_hw_err_handler(void *dev,
113 enum qed_hw_err_type err_type);
114 static void qede_get_eth_tlv_data(void *edev, void *data);
115 static void qede_get_generic_tlv_data(void *edev,
116 struct qed_generic_tlvs *data);
117 static void qede_generic_hw_err_handler(struct qede_dev *edev);
118 #ifdef CONFIG_QED_SRIOV
qede_set_vf_vlan(struct net_device * ndev,int vf,u16 vlan,u8 qos,__be16 vlan_proto)119 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
120 __be16 vlan_proto)
121 {
122 struct qede_dev *edev = netdev_priv(ndev);
123
124 if (vlan > 4095) {
125 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
126 return -EINVAL;
127 }
128
129 if (vlan_proto != htons(ETH_P_8021Q))
130 return -EPROTONOSUPPORT;
131
132 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
133 vlan, vf);
134
135 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
136 }
137
qede_set_vf_mac(struct net_device * ndev,int vfidx,u8 * mac)138 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
139 {
140 struct qede_dev *edev = netdev_priv(ndev);
141
142 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx);
143
144 if (!is_valid_ether_addr(mac)) {
145 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
146 return -EINVAL;
147 }
148
149 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
150 }
151
qede_sriov_configure(struct pci_dev * pdev,int num_vfs_param)152 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
153 {
154 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
155 struct qed_dev_info *qed_info = &edev->dev_info.common;
156 struct qed_update_vport_params *vport_params;
157 int rc;
158
159 vport_params = vzalloc(sizeof(*vport_params));
160 if (!vport_params)
161 return -ENOMEM;
162 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
163
164 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
165
166 /* Enable/Disable Tx switching for PF */
167 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
168 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
169 vport_params->vport_id = 0;
170 vport_params->update_tx_switching_flg = 1;
171 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
172 edev->ops->vport_update(edev->cdev, vport_params);
173 }
174
175 vfree(vport_params);
176 return rc;
177 }
178 #endif
179
180 static const struct pci_error_handlers qede_err_handler = {
181 .error_detected = qede_io_error_detected,
182 };
183
184 static struct pci_driver qede_pci_driver = {
185 .name = "qede",
186 .id_table = qede_pci_tbl,
187 .probe = qede_probe,
188 .remove = qede_remove,
189 .shutdown = qede_shutdown,
190 #ifdef CONFIG_QED_SRIOV
191 .sriov_configure = qede_sriov_configure,
192 #endif
193 .err_handler = &qede_err_handler,
194 };
195
196 static struct qed_eth_cb_ops qede_ll_ops = {
197 {
198 #ifdef CONFIG_RFS_ACCEL
199 .arfs_filter_op = qede_arfs_filter_op,
200 #endif
201 .link_update = qede_link_update,
202 .schedule_recovery_handler = qede_schedule_recovery_handler,
203 .schedule_hw_err_handler = qede_schedule_hw_err_handler,
204 .get_generic_tlv_data = qede_get_generic_tlv_data,
205 .get_protocol_tlv_data = qede_get_eth_tlv_data,
206 },
207 .force_mac = qede_force_mac,
208 .ports_update = qede_udp_ports_update,
209 };
210
qede_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)211 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
212 void *ptr)
213 {
214 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
215 struct ethtool_drvinfo drvinfo;
216 struct qede_dev *edev;
217
218 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
219 goto done;
220
221 /* Check whether this is a qede device */
222 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
223 goto done;
224
225 memset(&drvinfo, 0, sizeof(drvinfo));
226 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
227 if (strcmp(drvinfo.driver, "qede"))
228 goto done;
229 edev = netdev_priv(ndev);
230
231 switch (event) {
232 case NETDEV_CHANGENAME:
233 /* Notify qed of the name change */
234 if (!edev->ops || !edev->ops->common)
235 goto done;
236 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
237 break;
238 case NETDEV_CHANGEADDR:
239 edev = netdev_priv(ndev);
240 qede_rdma_event_changeaddr(edev);
241 break;
242 }
243
244 done:
245 return NOTIFY_DONE;
246 }
247
248 static struct notifier_block qede_netdev_notifier = {
249 .notifier_call = qede_netdev_event,
250 };
251
252 static
qede_init(void)253 int __init qede_init(void)
254 {
255 int ret;
256
257 pr_info("qede init: QLogic FastLinQ 4xxxx Ethernet Driver qede\n");
258
259 qede_forced_speed_maps_init();
260
261 qed_ops = qed_get_eth_ops();
262 if (!qed_ops) {
263 pr_notice("Failed to get qed ethtool operations\n");
264 return -EINVAL;
265 }
266
267 /* Must register notifier before pci ops, since we might miss
268 * interface rename after pci probe and netdev registration.
269 */
270 ret = register_netdevice_notifier(&qede_netdev_notifier);
271 if (ret) {
272 pr_notice("Failed to register netdevice_notifier\n");
273 qed_put_eth_ops();
274 return -EINVAL;
275 }
276
277 ret = pci_register_driver(&qede_pci_driver);
278 if (ret) {
279 pr_notice("Failed to register driver\n");
280 unregister_netdevice_notifier(&qede_netdev_notifier);
281 qed_put_eth_ops();
282 return -EINVAL;
283 }
284
285 return 0;
286 }
287
qede_cleanup(void)288 static void __exit qede_cleanup(void)
289 {
290 if (debug & QED_LOG_INFO_MASK)
291 pr_info("qede_cleanup called\n");
292
293 unregister_netdevice_notifier(&qede_netdev_notifier);
294 pci_unregister_driver(&qede_pci_driver);
295 qed_put_eth_ops();
296 }
297
298 module_init(qede_init);
299 module_exit(qede_cleanup);
300
301 static int qede_open(struct net_device *ndev);
302 static int qede_close(struct net_device *ndev);
303
qede_fill_by_demand_stats(struct qede_dev * edev)304 void qede_fill_by_demand_stats(struct qede_dev *edev)
305 {
306 struct qede_stats_common *p_common = &edev->stats.common;
307 struct qed_eth_stats stats;
308
309 edev->ops->get_vport_stats(edev->cdev, &stats);
310
311 p_common->no_buff_discards = stats.common.no_buff_discards;
312 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
313 p_common->ttl0_discard = stats.common.ttl0_discard;
314 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
315 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
316 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
317 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
318 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
319 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
320 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
321 p_common->mac_filter_discards = stats.common.mac_filter_discards;
322 p_common->gft_filter_drop = stats.common.gft_filter_drop;
323
324 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
325 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
326 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
327 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
328 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
329 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
330 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
331 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
332 p_common->coalesced_events = stats.common.tpa_coalesced_events;
333 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
334 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
335 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
336
337 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
338 p_common->rx_65_to_127_byte_packets =
339 stats.common.rx_65_to_127_byte_packets;
340 p_common->rx_128_to_255_byte_packets =
341 stats.common.rx_128_to_255_byte_packets;
342 p_common->rx_256_to_511_byte_packets =
343 stats.common.rx_256_to_511_byte_packets;
344 p_common->rx_512_to_1023_byte_packets =
345 stats.common.rx_512_to_1023_byte_packets;
346 p_common->rx_1024_to_1518_byte_packets =
347 stats.common.rx_1024_to_1518_byte_packets;
348 p_common->rx_crc_errors = stats.common.rx_crc_errors;
349 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
350 p_common->rx_pause_frames = stats.common.rx_pause_frames;
351 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
352 p_common->rx_align_errors = stats.common.rx_align_errors;
353 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
354 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
355 p_common->rx_jabbers = stats.common.rx_jabbers;
356 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
357 p_common->rx_fragments = stats.common.rx_fragments;
358 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
359 p_common->tx_65_to_127_byte_packets =
360 stats.common.tx_65_to_127_byte_packets;
361 p_common->tx_128_to_255_byte_packets =
362 stats.common.tx_128_to_255_byte_packets;
363 p_common->tx_256_to_511_byte_packets =
364 stats.common.tx_256_to_511_byte_packets;
365 p_common->tx_512_to_1023_byte_packets =
366 stats.common.tx_512_to_1023_byte_packets;
367 p_common->tx_1024_to_1518_byte_packets =
368 stats.common.tx_1024_to_1518_byte_packets;
369 p_common->tx_pause_frames = stats.common.tx_pause_frames;
370 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
371 p_common->brb_truncates = stats.common.brb_truncates;
372 p_common->brb_discards = stats.common.brb_discards;
373 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
374 p_common->link_change_count = stats.common.link_change_count;
375 p_common->ptp_skip_txts = edev->ptp_skip_txts;
376
377 if (QEDE_IS_BB(edev)) {
378 struct qede_stats_bb *p_bb = &edev->stats.bb;
379
380 p_bb->rx_1519_to_1522_byte_packets =
381 stats.bb.rx_1519_to_1522_byte_packets;
382 p_bb->rx_1519_to_2047_byte_packets =
383 stats.bb.rx_1519_to_2047_byte_packets;
384 p_bb->rx_2048_to_4095_byte_packets =
385 stats.bb.rx_2048_to_4095_byte_packets;
386 p_bb->rx_4096_to_9216_byte_packets =
387 stats.bb.rx_4096_to_9216_byte_packets;
388 p_bb->rx_9217_to_16383_byte_packets =
389 stats.bb.rx_9217_to_16383_byte_packets;
390 p_bb->tx_1519_to_2047_byte_packets =
391 stats.bb.tx_1519_to_2047_byte_packets;
392 p_bb->tx_2048_to_4095_byte_packets =
393 stats.bb.tx_2048_to_4095_byte_packets;
394 p_bb->tx_4096_to_9216_byte_packets =
395 stats.bb.tx_4096_to_9216_byte_packets;
396 p_bb->tx_9217_to_16383_byte_packets =
397 stats.bb.tx_9217_to_16383_byte_packets;
398 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
399 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
400 } else {
401 struct qede_stats_ah *p_ah = &edev->stats.ah;
402
403 p_ah->rx_1519_to_max_byte_packets =
404 stats.ah.rx_1519_to_max_byte_packets;
405 p_ah->tx_1519_to_max_byte_packets =
406 stats.ah.tx_1519_to_max_byte_packets;
407 }
408 }
409
qede_get_stats64(struct net_device * dev,struct rtnl_link_stats64 * stats)410 static void qede_get_stats64(struct net_device *dev,
411 struct rtnl_link_stats64 *stats)
412 {
413 struct qede_dev *edev = netdev_priv(dev);
414 struct qede_stats_common *p_common;
415
416 qede_fill_by_demand_stats(edev);
417 p_common = &edev->stats.common;
418
419 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
420 p_common->rx_bcast_pkts;
421 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
422 p_common->tx_bcast_pkts;
423
424 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
425 p_common->rx_bcast_bytes;
426 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
427 p_common->tx_bcast_bytes;
428
429 stats->tx_errors = p_common->tx_err_drop_pkts;
430 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
431
432 stats->rx_fifo_errors = p_common->no_buff_discards;
433
434 if (QEDE_IS_BB(edev))
435 stats->collisions = edev->stats.bb.tx_total_collisions;
436 stats->rx_crc_errors = p_common->rx_crc_errors;
437 stats->rx_frame_errors = p_common->rx_align_errors;
438 }
439
440 #ifdef CONFIG_QED_SRIOV
qede_get_vf_config(struct net_device * dev,int vfidx,struct ifla_vf_info * ivi)441 static int qede_get_vf_config(struct net_device *dev, int vfidx,
442 struct ifla_vf_info *ivi)
443 {
444 struct qede_dev *edev = netdev_priv(dev);
445
446 if (!edev->ops)
447 return -EINVAL;
448
449 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
450 }
451
qede_set_vf_rate(struct net_device * dev,int vfidx,int min_tx_rate,int max_tx_rate)452 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
453 int min_tx_rate, int max_tx_rate)
454 {
455 struct qede_dev *edev = netdev_priv(dev);
456
457 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
458 max_tx_rate);
459 }
460
qede_set_vf_spoofchk(struct net_device * dev,int vfidx,bool val)461 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
462 {
463 struct qede_dev *edev = netdev_priv(dev);
464
465 if (!edev->ops)
466 return -EINVAL;
467
468 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
469 }
470
qede_set_vf_link_state(struct net_device * dev,int vfidx,int link_state)471 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
472 int link_state)
473 {
474 struct qede_dev *edev = netdev_priv(dev);
475
476 if (!edev->ops)
477 return -EINVAL;
478
479 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
480 }
481
qede_set_vf_trust(struct net_device * dev,int vfidx,bool setting)482 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
483 {
484 struct qede_dev *edev = netdev_priv(dev);
485
486 if (!edev->ops)
487 return -EINVAL;
488
489 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
490 }
491 #endif
492
qede_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)493 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
494 {
495 struct qede_dev *edev = netdev_priv(dev);
496
497 if (!netif_running(dev))
498 return -EAGAIN;
499
500 switch (cmd) {
501 case SIOCSHWTSTAMP:
502 return qede_ptp_hw_ts(edev, ifr);
503 default:
504 DP_VERBOSE(edev, QED_MSG_DEBUG,
505 "default IOCTL cmd 0x%x\n", cmd);
506 return -EOPNOTSUPP;
507 }
508
509 return 0;
510 }
511
qede_fp_sb_dump(struct qede_dev * edev,struct qede_fastpath * fp)512 static void qede_fp_sb_dump(struct qede_dev *edev, struct qede_fastpath *fp)
513 {
514 char *p_sb = (char *)fp->sb_info->sb_virt;
515 u32 sb_size, i;
516
517 sb_size = sizeof(struct status_block);
518
519 for (i = 0; i < sb_size; i += 8)
520 DP_NOTICE(edev,
521 "%02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX\n",
522 p_sb[i], p_sb[i + 1], p_sb[i + 2], p_sb[i + 3],
523 p_sb[i + 4], p_sb[i + 5], p_sb[i + 6], p_sb[i + 7]);
524 }
525
526 static void
qede_txq_fp_log_metadata(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_tx_queue * txq)527 qede_txq_fp_log_metadata(struct qede_dev *edev,
528 struct qede_fastpath *fp, struct qede_tx_queue *txq)
529 {
530 struct qed_chain *p_chain = &txq->tx_pbl;
531
532 /* Dump txq/fp/sb ids etc. other metadata */
533 DP_NOTICE(edev,
534 "fpid 0x%x sbid 0x%x txqid [0x%x] ndev_qid [0x%x] cos [0x%x] p_chain %p cap %d size %d jiffies %lu HZ 0x%x\n",
535 fp->id, fp->sb_info->igu_sb_id, txq->index, txq->ndev_txq_id, txq->cos,
536 p_chain, p_chain->capacity, p_chain->size, jiffies, HZ);
537
538 /* Dump all the relevant prod/cons indexes */
539 DP_NOTICE(edev,
540 "hw cons %04x sw_tx_prod=0x%x, sw_tx_cons=0x%x, bd_prod 0x%x bd_cons 0x%x\n",
541 le16_to_cpu(*txq->hw_cons_ptr), txq->sw_tx_prod, txq->sw_tx_cons,
542 qed_chain_get_prod_idx(p_chain), qed_chain_get_cons_idx(p_chain));
543 }
544
545 static void
qede_tx_log_print(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_tx_queue * txq)546 qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp, struct qede_tx_queue *txq)
547 {
548 struct qed_sb_info_dbg sb_dbg;
549 int rc;
550
551 /* sb info */
552 qede_fp_sb_dump(edev, fp);
553
554 memset(&sb_dbg, 0, sizeof(sb_dbg));
555 rc = edev->ops->common->get_sb_info(edev->cdev, fp->sb_info, (u16)fp->id, &sb_dbg);
556
557 DP_NOTICE(edev, "IGU: prod %08x cons %08x CAU Tx %04x\n",
558 sb_dbg.igu_prod, sb_dbg.igu_cons, sb_dbg.pi[TX_PI(txq->cos)]);
559
560 /* report to mfw */
561 edev->ops->common->mfw_report(edev->cdev,
562 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
563 txq->index, le16_to_cpu(*txq->hw_cons_ptr),
564 qed_chain_get_cons_idx(&txq->tx_pbl),
565 qed_chain_get_prod_idx(&txq->tx_pbl), jiffies);
566 if (!rc)
567 edev->ops->common->mfw_report(edev->cdev,
568 "Txq[%d]: SB[0x%04x] - IGU: prod %08x cons %08x CAU Tx %04x\n",
569 txq->index, fp->sb_info->igu_sb_id,
570 sb_dbg.igu_prod, sb_dbg.igu_cons,
571 sb_dbg.pi[TX_PI(txq->cos)]);
572 }
573
qede_tx_timeout(struct net_device * dev,unsigned int txqueue)574 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
575 {
576 struct qede_dev *edev = netdev_priv(dev);
577 int i;
578
579 netif_carrier_off(dev);
580 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
581
582 for_each_queue(i) {
583 struct qede_tx_queue *txq;
584 struct qede_fastpath *fp;
585 int cos;
586
587 fp = &edev->fp_array[i];
588 if (!(fp->type & QEDE_FASTPATH_TX))
589 continue;
590
591 for_each_cos_in_txq(edev, cos) {
592 txq = &fp->txq[cos];
593
594 /* Dump basic metadata for all queues */
595 qede_txq_fp_log_metadata(edev, fp, txq);
596
597 if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
598 qed_chain_get_prod_idx(&txq->tx_pbl))
599 qede_tx_log_print(edev, fp, txq);
600 }
601 }
602
603 if (IS_VF(edev))
604 return;
605
606 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
607 edev->state == QEDE_STATE_RECOVERY) {
608 DP_INFO(edev,
609 "Avoid handling a Tx timeout while another HW error is being handled\n");
610 return;
611 }
612
613 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
614 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
615 schedule_delayed_work(&edev->sp_task, 0);
616 }
617
qede_setup_tc(struct net_device * ndev,u8 num_tc)618 static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
619 {
620 struct qede_dev *edev = netdev_priv(ndev);
621 int cos, count, offset;
622
623 if (num_tc > edev->dev_info.num_tc)
624 return -EINVAL;
625
626 netdev_reset_tc(ndev);
627 netdev_set_num_tc(ndev, num_tc);
628
629 for_each_cos_in_txq(edev, cos) {
630 count = QEDE_TSS_COUNT(edev);
631 offset = cos * QEDE_TSS_COUNT(edev);
632 netdev_set_tc_queue(ndev, cos, count, offset);
633 }
634
635 return 0;
636 }
637
638 static int
qede_set_flower(struct qede_dev * edev,struct flow_cls_offload * f,__be16 proto)639 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
640 __be16 proto)
641 {
642 switch (f->command) {
643 case FLOW_CLS_REPLACE:
644 return qede_add_tc_flower_fltr(edev, proto, f);
645 case FLOW_CLS_DESTROY:
646 return qede_delete_flow_filter(edev, f->cookie);
647 default:
648 return -EOPNOTSUPP;
649 }
650 }
651
qede_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)652 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
653 void *cb_priv)
654 {
655 struct flow_cls_offload *f;
656 struct qede_dev *edev = cb_priv;
657
658 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
659 return -EOPNOTSUPP;
660
661 switch (type) {
662 case TC_SETUP_CLSFLOWER:
663 f = type_data;
664 return qede_set_flower(edev, f, f->common.protocol);
665 default:
666 return -EOPNOTSUPP;
667 }
668 }
669
670 static LIST_HEAD(qede_block_cb_list);
671
672 static int
qede_setup_tc_offload(struct net_device * dev,enum tc_setup_type type,void * type_data)673 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
674 void *type_data)
675 {
676 struct qede_dev *edev = netdev_priv(dev);
677 struct tc_mqprio_qopt *mqprio;
678
679 switch (type) {
680 case TC_SETUP_BLOCK:
681 return flow_block_cb_setup_simple(type_data,
682 &qede_block_cb_list,
683 qede_setup_tc_block_cb,
684 edev, edev, true);
685 case TC_SETUP_QDISC_MQPRIO:
686 mqprio = type_data;
687
688 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
689 return qede_setup_tc(dev, mqprio->num_tc);
690 default:
691 return -EOPNOTSUPP;
692 }
693 }
694
695 static const struct net_device_ops qede_netdev_ops = {
696 .ndo_open = qede_open,
697 .ndo_stop = qede_close,
698 .ndo_start_xmit = qede_start_xmit,
699 .ndo_select_queue = qede_select_queue,
700 .ndo_set_rx_mode = qede_set_rx_mode,
701 .ndo_set_mac_address = qede_set_mac_addr,
702 .ndo_validate_addr = eth_validate_addr,
703 .ndo_change_mtu = qede_change_mtu,
704 .ndo_eth_ioctl = qede_ioctl,
705 .ndo_tx_timeout = qede_tx_timeout,
706 #ifdef CONFIG_QED_SRIOV
707 .ndo_set_vf_mac = qede_set_vf_mac,
708 .ndo_set_vf_vlan = qede_set_vf_vlan,
709 .ndo_set_vf_trust = qede_set_vf_trust,
710 #endif
711 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
712 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
713 .ndo_fix_features = qede_fix_features,
714 .ndo_set_features = qede_set_features,
715 .ndo_get_stats64 = qede_get_stats64,
716 #ifdef CONFIG_QED_SRIOV
717 .ndo_set_vf_link_state = qede_set_vf_link_state,
718 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
719 .ndo_get_vf_config = qede_get_vf_config,
720 .ndo_set_vf_rate = qede_set_vf_rate,
721 #endif
722 .ndo_features_check = qede_features_check,
723 .ndo_bpf = qede_xdp,
724 #ifdef CONFIG_RFS_ACCEL
725 .ndo_rx_flow_steer = qede_rx_flow_steer,
726 #endif
727 .ndo_xdp_xmit = qede_xdp_transmit,
728 .ndo_setup_tc = qede_setup_tc_offload,
729 };
730
731 static const struct net_device_ops qede_netdev_vf_ops = {
732 .ndo_open = qede_open,
733 .ndo_stop = qede_close,
734 .ndo_start_xmit = qede_start_xmit,
735 .ndo_select_queue = qede_select_queue,
736 .ndo_set_rx_mode = qede_set_rx_mode,
737 .ndo_set_mac_address = qede_set_mac_addr,
738 .ndo_validate_addr = eth_validate_addr,
739 .ndo_change_mtu = qede_change_mtu,
740 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
741 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
742 .ndo_fix_features = qede_fix_features,
743 .ndo_set_features = qede_set_features,
744 .ndo_get_stats64 = qede_get_stats64,
745 .ndo_features_check = qede_features_check,
746 };
747
748 static const struct net_device_ops qede_netdev_vf_xdp_ops = {
749 .ndo_open = qede_open,
750 .ndo_stop = qede_close,
751 .ndo_start_xmit = qede_start_xmit,
752 .ndo_select_queue = qede_select_queue,
753 .ndo_set_rx_mode = qede_set_rx_mode,
754 .ndo_set_mac_address = qede_set_mac_addr,
755 .ndo_validate_addr = eth_validate_addr,
756 .ndo_change_mtu = qede_change_mtu,
757 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
758 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
759 .ndo_fix_features = qede_fix_features,
760 .ndo_set_features = qede_set_features,
761 .ndo_get_stats64 = qede_get_stats64,
762 .ndo_features_check = qede_features_check,
763 .ndo_bpf = qede_xdp,
764 .ndo_xdp_xmit = qede_xdp_transmit,
765 };
766
767 /* -------------------------------------------------------------------------
768 * START OF PROBE / REMOVE
769 * -------------------------------------------------------------------------
770 */
771
qede_alloc_etherdev(struct qed_dev * cdev,struct pci_dev * pdev,struct qed_dev_eth_info * info,u32 dp_module,u8 dp_level)772 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
773 struct pci_dev *pdev,
774 struct qed_dev_eth_info *info,
775 u32 dp_module, u8 dp_level)
776 {
777 struct net_device *ndev;
778 struct qede_dev *edev;
779
780 ndev = alloc_etherdev_mqs(sizeof(*edev),
781 info->num_queues * info->num_tc,
782 info->num_queues);
783 if (!ndev) {
784 pr_err("etherdev allocation failed\n");
785 return NULL;
786 }
787
788 edev = netdev_priv(ndev);
789 edev->ndev = ndev;
790 edev->cdev = cdev;
791 edev->pdev = pdev;
792 edev->dp_module = dp_module;
793 edev->dp_level = dp_level;
794 edev->ops = qed_ops;
795
796 if (is_kdump_kernel()) {
797 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
798 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
799 } else {
800 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
801 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
802 }
803
804 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
805 info->num_queues, info->num_queues);
806
807 SET_NETDEV_DEV(ndev, &pdev->dev);
808
809 memset(&edev->stats, 0, sizeof(edev->stats));
810 memcpy(&edev->dev_info, info, sizeof(*info));
811
812 /* As ethtool doesn't have the ability to show WoL behavior as
813 * 'default', if device supports it declare it's enabled.
814 */
815 if (edev->dev_info.common.wol_support)
816 edev->wol_enabled = true;
817
818 INIT_LIST_HEAD(&edev->vlan_list);
819
820 return edev;
821 }
822
qede_init_ndev(struct qede_dev * edev)823 static void qede_init_ndev(struct qede_dev *edev)
824 {
825 struct net_device *ndev = edev->ndev;
826 struct pci_dev *pdev = edev->pdev;
827 bool udp_tunnel_enable = false;
828 netdev_features_t hw_features;
829
830 pci_set_drvdata(pdev, ndev);
831
832 ndev->mem_start = edev->dev_info.common.pci_mem_start;
833 ndev->base_addr = ndev->mem_start;
834 ndev->mem_end = edev->dev_info.common.pci_mem_end;
835 ndev->irq = edev->dev_info.common.pci_irq;
836
837 ndev->watchdog_timeo = TX_TIMEOUT;
838
839 if (IS_VF(edev)) {
840 if (edev->dev_info.xdp_supported)
841 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
842 else
843 ndev->netdev_ops = &qede_netdev_vf_ops;
844 } else {
845 ndev->netdev_ops = &qede_netdev_ops;
846 }
847
848 qede_set_ethtool_ops(ndev);
849
850 ndev->priv_flags |= IFF_UNICAST_FLT;
851
852 /* user-changeble features */
853 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
854 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
855 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
856
857 if (edev->dev_info.common.b_arfs_capable)
858 hw_features |= NETIF_F_NTUPLE;
859
860 if (edev->dev_info.common.vxlan_enable ||
861 edev->dev_info.common.geneve_enable)
862 udp_tunnel_enable = true;
863
864 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
865 hw_features |= NETIF_F_TSO_ECN;
866 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
867 NETIF_F_SG | NETIF_F_TSO |
868 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
869 NETIF_F_RXCSUM;
870 }
871
872 if (udp_tunnel_enable) {
873 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
874 NETIF_F_GSO_UDP_TUNNEL_CSUM);
875 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
876 NETIF_F_GSO_UDP_TUNNEL_CSUM);
877
878 qede_set_udp_tunnels(edev);
879 }
880
881 if (edev->dev_info.common.gre_enable) {
882 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
883 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
884 NETIF_F_GSO_GRE_CSUM);
885 }
886
887 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
888 NETIF_F_HIGHDMA;
889 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
890 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
891 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
892
893 ndev->hw_features = hw_features;
894
895 ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
896 NETDEV_XDP_ACT_NDO_XMIT;
897
898 /* MTU range: 46 - 9600 */
899 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
900 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
901
902 /* Set network device HW mac */
903 eth_hw_addr_set(edev->ndev, edev->dev_info.common.hw_mac);
904
905 ndev->mtu = edev->dev_info.common.mtu;
906 }
907
908 /* This function converts from 32b param to two params of level and module
909 * Input 32b decoding:
910 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
911 * 'happy' flow, e.g. memory allocation failed.
912 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
913 * and provide important parameters.
914 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
915 * module. VERBOSE prints are for tracking the specific flow in low level.
916 *
917 * Notice that the level should be that of the lowest required logs.
918 */
qede_config_debug(uint debug,u32 * p_dp_module,u8 * p_dp_level)919 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
920 {
921 *p_dp_level = QED_LEVEL_NOTICE;
922 *p_dp_module = 0;
923
924 if (debug & QED_LOG_VERBOSE_MASK) {
925 *p_dp_level = QED_LEVEL_VERBOSE;
926 *p_dp_module = (debug & 0x3FFFFFFF);
927 } else if (debug & QED_LOG_INFO_MASK) {
928 *p_dp_level = QED_LEVEL_INFO;
929 } else if (debug & QED_LOG_NOTICE_MASK) {
930 *p_dp_level = QED_LEVEL_NOTICE;
931 }
932 }
933
qede_free_fp_array(struct qede_dev * edev)934 static void qede_free_fp_array(struct qede_dev *edev)
935 {
936 if (edev->fp_array) {
937 struct qede_fastpath *fp;
938 int i;
939
940 for_each_queue(i) {
941 fp = &edev->fp_array[i];
942
943 kfree(fp->sb_info);
944 /* Handle mem alloc failure case where qede_init_fp
945 * didn't register xdp_rxq_info yet.
946 * Implicit only (fp->type & QEDE_FASTPATH_RX)
947 */
948 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
949 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
950 kfree(fp->rxq);
951 kfree(fp->xdp_tx);
952 kfree(fp->txq);
953 }
954 kfree(edev->fp_array);
955 }
956
957 edev->num_queues = 0;
958 edev->fp_num_tx = 0;
959 edev->fp_num_rx = 0;
960 }
961
qede_alloc_fp_array(struct qede_dev * edev)962 static int qede_alloc_fp_array(struct qede_dev *edev)
963 {
964 u8 fp_combined, fp_rx = edev->fp_num_rx;
965 struct qede_fastpath *fp;
966 int i;
967
968 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
969 sizeof(*edev->fp_array), GFP_KERNEL);
970 if (!edev->fp_array) {
971 DP_NOTICE(edev, "fp array allocation failed\n");
972 goto err;
973 }
974
975 if (!edev->coal_entry) {
976 edev->coal_entry = kcalloc(QEDE_MAX_RSS_CNT(edev),
977 sizeof(*edev->coal_entry),
978 GFP_KERNEL);
979 if (!edev->coal_entry) {
980 DP_ERR(edev, "coalesce entry allocation failed\n");
981 goto err;
982 }
983 }
984
985 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
986
987 /* Allocate the FP elements for Rx queues followed by combined and then
988 * the Tx. This ordering should be maintained so that the respective
989 * queues (Rx or Tx) will be together in the fastpath array and the
990 * associated ids will be sequential.
991 */
992 for_each_queue(i) {
993 fp = &edev->fp_array[i];
994
995 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
996 if (!fp->sb_info) {
997 DP_NOTICE(edev, "sb info struct allocation failed\n");
998 goto err;
999 }
1000
1001 if (fp_rx) {
1002 fp->type = QEDE_FASTPATH_RX;
1003 fp_rx--;
1004 } else if (fp_combined) {
1005 fp->type = QEDE_FASTPATH_COMBINED;
1006 fp_combined--;
1007 } else {
1008 fp->type = QEDE_FASTPATH_TX;
1009 }
1010
1011 if (fp->type & QEDE_FASTPATH_TX) {
1012 fp->txq = kcalloc(edev->dev_info.num_tc,
1013 sizeof(*fp->txq), GFP_KERNEL);
1014 if (!fp->txq)
1015 goto err;
1016 }
1017
1018 if (fp->type & QEDE_FASTPATH_RX) {
1019 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
1020 if (!fp->rxq)
1021 goto err;
1022
1023 if (edev->xdp_prog) {
1024 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
1025 GFP_KERNEL);
1026 if (!fp->xdp_tx)
1027 goto err;
1028 fp->type |= QEDE_FASTPATH_XDP;
1029 }
1030 }
1031 }
1032
1033 return 0;
1034 err:
1035 qede_free_fp_array(edev);
1036 return -ENOMEM;
1037 }
1038
1039 /* The qede lock is used to protect driver state change and driver flows that
1040 * are not reentrant.
1041 */
__qede_lock(struct qede_dev * edev)1042 void __qede_lock(struct qede_dev *edev)
1043 {
1044 mutex_lock(&edev->qede_lock);
1045 }
1046
__qede_unlock(struct qede_dev * edev)1047 void __qede_unlock(struct qede_dev *edev)
1048 {
1049 mutex_unlock(&edev->qede_lock);
1050 }
1051
1052 /* This version of the lock should be used when acquiring the RTNL lock is also
1053 * needed in addition to the internal qede lock.
1054 */
qede_lock(struct qede_dev * edev)1055 static void qede_lock(struct qede_dev *edev)
1056 {
1057 rtnl_lock();
1058 __qede_lock(edev);
1059 }
1060
qede_unlock(struct qede_dev * edev)1061 static void qede_unlock(struct qede_dev *edev)
1062 {
1063 __qede_unlock(edev);
1064 rtnl_unlock();
1065 }
1066
qede_sp_task(struct work_struct * work)1067 static void qede_sp_task(struct work_struct *work)
1068 {
1069 struct qede_dev *edev = container_of(work, struct qede_dev,
1070 sp_task.work);
1071
1072 /* Disable execution of this deferred work once
1073 * qede removal is in progress, this stop any future
1074 * scheduling of sp_task.
1075 */
1076 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags))
1077 return;
1078
1079 /* The locking scheme depends on the specific flag:
1080 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1081 * ensure that ongoing flows are ended and new ones are not started.
1082 * In other cases - only the internal qede lock should be acquired.
1083 */
1084
1085 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1086 #ifdef CONFIG_QED_SRIOV
1087 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1088 * The recovery of the active VFs is currently not supported.
1089 */
1090 if (pci_num_vf(edev->pdev))
1091 qede_sriov_configure(edev->pdev, 0);
1092 #endif
1093 qede_lock(edev);
1094 qede_recovery_handler(edev);
1095 qede_unlock(edev);
1096 }
1097
1098 __qede_lock(edev);
1099
1100 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1101 if (edev->state == QEDE_STATE_OPEN)
1102 qede_config_rx_mode(edev->ndev);
1103
1104 #ifdef CONFIG_RFS_ACCEL
1105 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1106 if (edev->state == QEDE_STATE_OPEN)
1107 qede_process_arfs_filters(edev, false);
1108 }
1109 #endif
1110 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1111 qede_generic_hw_err_handler(edev);
1112 __qede_unlock(edev);
1113
1114 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1115 #ifdef CONFIG_QED_SRIOV
1116 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1117 * The recovery of the active VFs is currently not supported.
1118 */
1119 if (pci_num_vf(edev->pdev))
1120 qede_sriov_configure(edev->pdev, 0);
1121 #endif
1122 edev->ops->common->recovery_process(edev->cdev);
1123 }
1124 }
1125
qede_update_pf_params(struct qed_dev * cdev)1126 static void qede_update_pf_params(struct qed_dev *cdev)
1127 {
1128 struct qed_pf_params pf_params;
1129 u16 num_cons;
1130
1131 /* 64 rx + 64 tx + 64 XDP */
1132 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1133
1134 /* 1 rx + 1 xdp + max tx cos */
1135 num_cons = QED_MIN_L2_CONS;
1136
1137 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1138
1139 /* Same for VFs - make sure they'll have sufficient connections
1140 * to support XDP Tx queues.
1141 */
1142 pf_params.eth_pf_params.num_vf_cons = 48;
1143
1144 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1145 qed_ops->common->update_pf_params(cdev, &pf_params);
1146 }
1147
1148 #define QEDE_FW_VER_STR_SIZE 80
1149
qede_log_probe(struct qede_dev * edev)1150 static void qede_log_probe(struct qede_dev *edev)
1151 {
1152 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1153 u8 buf[QEDE_FW_VER_STR_SIZE];
1154 size_t left_size;
1155
1156 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1157 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1158 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1159 p_dev_info->fw_eng,
1160 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1161 QED_MFW_VERSION_3_OFFSET,
1162 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1163 QED_MFW_VERSION_2_OFFSET,
1164 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1165 QED_MFW_VERSION_1_OFFSET,
1166 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1167 QED_MFW_VERSION_0_OFFSET);
1168
1169 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1170 if (p_dev_info->mbi_version && left_size)
1171 snprintf(buf + strlen(buf), left_size,
1172 " [MBI %d.%d.%d]",
1173 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1174 QED_MBI_VERSION_2_OFFSET,
1175 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1176 QED_MBI_VERSION_1_OFFSET,
1177 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1178 QED_MBI_VERSION_0_OFFSET);
1179
1180 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1181 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1182 buf, edev->ndev->name);
1183 }
1184
1185 enum qede_probe_mode {
1186 QEDE_PROBE_NORMAL,
1187 QEDE_PROBE_RECOVERY,
1188 };
1189
__qede_probe(struct pci_dev * pdev,u32 dp_module,u8 dp_level,bool is_vf,enum qede_probe_mode mode)1190 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1191 bool is_vf, enum qede_probe_mode mode)
1192 {
1193 struct qed_probe_params probe_params;
1194 struct qed_slowpath_params sp_params;
1195 struct qed_dev_eth_info dev_info;
1196 struct qede_dev *edev;
1197 struct qed_dev *cdev;
1198 int rc;
1199
1200 if (unlikely(dp_level & QED_LEVEL_INFO))
1201 pr_notice("Starting qede probe\n");
1202
1203 memset(&probe_params, 0, sizeof(probe_params));
1204 probe_params.protocol = QED_PROTOCOL_ETH;
1205 probe_params.dp_module = dp_module;
1206 probe_params.dp_level = dp_level;
1207 probe_params.is_vf = is_vf;
1208 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1209 cdev = qed_ops->common->probe(pdev, &probe_params);
1210 if (!cdev) {
1211 rc = -ENODEV;
1212 goto err0;
1213 }
1214
1215 qede_update_pf_params(cdev);
1216
1217 /* Start the Slowpath-process */
1218 memset(&sp_params, 0, sizeof(sp_params));
1219 sp_params.int_mode = QED_INT_MODE_MSIX;
1220 strscpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1221 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1222 if (rc) {
1223 pr_notice("Cannot start slowpath\n");
1224 goto err1;
1225 }
1226
1227 /* Learn information crucial for qede to progress */
1228 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1229 if (rc)
1230 goto err2;
1231
1232 if (mode != QEDE_PROBE_RECOVERY) {
1233 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1234 dp_level);
1235 if (!edev) {
1236 rc = -ENOMEM;
1237 goto err2;
1238 }
1239
1240 edev->devlink = qed_ops->common->devlink_register(cdev);
1241 if (IS_ERR(edev->devlink)) {
1242 DP_NOTICE(edev, "Cannot register devlink\n");
1243 rc = PTR_ERR(edev->devlink);
1244 edev->devlink = NULL;
1245 goto err3;
1246 }
1247 } else {
1248 struct net_device *ndev = pci_get_drvdata(pdev);
1249 struct qed_devlink *qdl;
1250
1251 edev = netdev_priv(ndev);
1252 qdl = devlink_priv(edev->devlink);
1253 qdl->cdev = cdev;
1254 edev->cdev = cdev;
1255 memset(&edev->stats, 0, sizeof(edev->stats));
1256 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1257 }
1258
1259 if (is_vf)
1260 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1261
1262 qede_init_ndev(edev);
1263
1264 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1265 if (rc)
1266 goto err3;
1267
1268 if (mode != QEDE_PROBE_RECOVERY) {
1269 /* Prepare the lock prior to the registration of the netdev,
1270 * as once it's registered we might reach flows requiring it
1271 * [it's even possible to reach a flow needing it directly
1272 * from there, although it's unlikely].
1273 */
1274 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1275 mutex_init(&edev->qede_lock);
1276
1277 rc = register_netdev(edev->ndev);
1278 if (rc) {
1279 DP_NOTICE(edev, "Cannot register net-device\n");
1280 goto err4;
1281 }
1282 }
1283
1284 edev->ops->common->set_name(cdev, edev->ndev->name);
1285
1286 /* PTP not supported on VFs */
1287 if (!is_vf)
1288 qede_ptp_enable(edev);
1289
1290 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1291
1292 #ifdef CONFIG_DCB
1293 if (!IS_VF(edev))
1294 qede_set_dcbnl_ops(edev->ndev);
1295 #endif
1296
1297 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1298
1299 qede_log_probe(edev);
1300 return 0;
1301
1302 err4:
1303 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1304 err3:
1305 if (mode != QEDE_PROBE_RECOVERY)
1306 free_netdev(edev->ndev);
1307 else
1308 edev->cdev = NULL;
1309 err2:
1310 qed_ops->common->slowpath_stop(cdev);
1311 err1:
1312 qed_ops->common->remove(cdev);
1313 err0:
1314 return rc;
1315 }
1316
qede_probe(struct pci_dev * pdev,const struct pci_device_id * id)1317 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1318 {
1319 bool is_vf = false;
1320 u32 dp_module = 0;
1321 u8 dp_level = 0;
1322
1323 switch ((enum qede_pci_private)id->driver_data) {
1324 case QEDE_PRIVATE_VF:
1325 if (debug & QED_LOG_VERBOSE_MASK)
1326 dev_err(&pdev->dev, "Probing a VF\n");
1327 is_vf = true;
1328 break;
1329 default:
1330 if (debug & QED_LOG_VERBOSE_MASK)
1331 dev_err(&pdev->dev, "Probing a PF\n");
1332 }
1333
1334 qede_config_debug(debug, &dp_module, &dp_level);
1335
1336 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1337 QEDE_PROBE_NORMAL);
1338 }
1339
1340 enum qede_remove_mode {
1341 QEDE_REMOVE_NORMAL,
1342 QEDE_REMOVE_RECOVERY,
1343 };
1344
__qede_remove(struct pci_dev * pdev,enum qede_remove_mode mode)1345 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1346 {
1347 struct net_device *ndev = pci_get_drvdata(pdev);
1348 struct qede_dev *edev;
1349 struct qed_dev *cdev;
1350
1351 if (!ndev) {
1352 dev_info(&pdev->dev, "Device has already been removed\n");
1353 return;
1354 }
1355
1356 edev = netdev_priv(ndev);
1357 cdev = edev->cdev;
1358
1359 DP_INFO(edev, "Starting qede_remove\n");
1360
1361 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1362
1363 if (mode != QEDE_REMOVE_RECOVERY) {
1364 set_bit(QEDE_SP_DISABLE, &edev->sp_flags);
1365 unregister_netdev(ndev);
1366
1367 cancel_delayed_work_sync(&edev->sp_task);
1368
1369 edev->ops->common->set_power_state(cdev, PCI_D0);
1370
1371 pci_set_drvdata(pdev, NULL);
1372 }
1373
1374 qede_ptp_disable(edev);
1375
1376 /* Use global ops since we've freed edev */
1377 qed_ops->common->slowpath_stop(cdev);
1378 if (system_state == SYSTEM_POWER_OFF)
1379 return;
1380
1381 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) {
1382 qed_ops->common->devlink_unregister(edev->devlink);
1383 edev->devlink = NULL;
1384 }
1385 qed_ops->common->remove(cdev);
1386 edev->cdev = NULL;
1387
1388 /* Since this can happen out-of-sync with other flows,
1389 * don't release the netdevice until after slowpath stop
1390 * has been called to guarantee various other contexts
1391 * [e.g., QED register callbacks] won't break anything when
1392 * accessing the netdevice.
1393 */
1394 if (mode != QEDE_REMOVE_RECOVERY) {
1395 kfree(edev->coal_entry);
1396 free_netdev(ndev);
1397 }
1398
1399 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1400 }
1401
qede_remove(struct pci_dev * pdev)1402 static void qede_remove(struct pci_dev *pdev)
1403 {
1404 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1405 }
1406
qede_shutdown(struct pci_dev * pdev)1407 static void qede_shutdown(struct pci_dev *pdev)
1408 {
1409 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1410 }
1411
1412 /* -------------------------------------------------------------------------
1413 * START OF LOAD / UNLOAD
1414 * -------------------------------------------------------------------------
1415 */
1416
qede_set_num_queues(struct qede_dev * edev)1417 static int qede_set_num_queues(struct qede_dev *edev)
1418 {
1419 int rc;
1420 u16 rss_num;
1421
1422 /* Setup queues according to possible resources*/
1423 if (edev->req_queues)
1424 rss_num = edev->req_queues;
1425 else
1426 rss_num = netif_get_num_default_rss_queues() *
1427 edev->dev_info.common.num_hwfns;
1428
1429 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1430
1431 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1432 if (rc > 0) {
1433 /* Managed to request interrupts for our queues */
1434 edev->num_queues = rc;
1435 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1436 QEDE_QUEUE_CNT(edev), rss_num);
1437 rc = 0;
1438 }
1439
1440 edev->fp_num_tx = edev->req_num_tx;
1441 edev->fp_num_rx = edev->req_num_rx;
1442
1443 return rc;
1444 }
1445
qede_free_mem_sb(struct qede_dev * edev,struct qed_sb_info * sb_info,u16 sb_id)1446 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1447 u16 sb_id)
1448 {
1449 if (sb_info->sb_virt) {
1450 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1451 QED_SB_TYPE_L2_QUEUE);
1452 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1453 (void *)sb_info->sb_virt, sb_info->sb_phys);
1454 memset(sb_info, 0, sizeof(*sb_info));
1455 }
1456 }
1457
1458 /* This function allocates fast-path status block memory */
qede_alloc_mem_sb(struct qede_dev * edev,struct qed_sb_info * sb_info,u16 sb_id)1459 static int qede_alloc_mem_sb(struct qede_dev *edev,
1460 struct qed_sb_info *sb_info, u16 sb_id)
1461 {
1462 struct status_block *sb_virt;
1463 dma_addr_t sb_phys;
1464 int rc;
1465
1466 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1467 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1468 if (!sb_virt) {
1469 DP_ERR(edev, "Status block allocation failed\n");
1470 return -ENOMEM;
1471 }
1472
1473 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1474 sb_virt, sb_phys, sb_id,
1475 QED_SB_TYPE_L2_QUEUE);
1476 if (rc) {
1477 DP_ERR(edev, "Status block initialization failed\n");
1478 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1479 sb_virt, sb_phys);
1480 return rc;
1481 }
1482
1483 return 0;
1484 }
1485
qede_free_rx_buffers(struct qede_dev * edev,struct qede_rx_queue * rxq)1486 static void qede_free_rx_buffers(struct qede_dev *edev,
1487 struct qede_rx_queue *rxq)
1488 {
1489 u16 i;
1490
1491 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1492 struct sw_rx_data *rx_buf;
1493 struct page *data;
1494
1495 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1496 data = rx_buf->data;
1497
1498 dma_unmap_page(&edev->pdev->dev,
1499 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1500
1501 rx_buf->data = NULL;
1502 __free_page(data);
1503 }
1504 }
1505
qede_free_mem_rxq(struct qede_dev * edev,struct qede_rx_queue * rxq)1506 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1507 {
1508 /* Free rx buffers */
1509 qede_free_rx_buffers(edev, rxq);
1510
1511 /* Free the parallel SW ring */
1512 kfree(rxq->sw_rx_ring);
1513
1514 /* Free the real RQ ring used by FW */
1515 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1516 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1517 }
1518
qede_set_tpa_param(struct qede_rx_queue * rxq)1519 static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1520 {
1521 int i;
1522
1523 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1524 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1525
1526 tpa_info->state = QEDE_AGG_STATE_NONE;
1527 }
1528 }
1529
1530 /* This function allocates all memory needed per Rx queue */
qede_alloc_mem_rxq(struct qede_dev * edev,struct qede_rx_queue * rxq)1531 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1532 {
1533 struct qed_chain_init_params params = {
1534 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1535 .num_elems = RX_RING_SIZE,
1536 };
1537 struct qed_dev *cdev = edev->cdev;
1538 int i, rc, size;
1539
1540 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1541
1542 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1543
1544 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1545 size = rxq->rx_headroom +
1546 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1547
1548 /* Make sure that the headroom and payload fit in a single page */
1549 if (rxq->rx_buf_size + size > PAGE_SIZE)
1550 rxq->rx_buf_size = PAGE_SIZE - size;
1551
1552 /* Segment size to split a page in multiple equal parts,
1553 * unless XDP is used in which case we'd use the entire page.
1554 */
1555 if (!edev->xdp_prog) {
1556 size = size + rxq->rx_buf_size;
1557 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1558 } else {
1559 rxq->rx_buf_seg_size = PAGE_SIZE;
1560 edev->ndev->features &= ~NETIF_F_GRO_HW;
1561 }
1562
1563 /* Allocate the parallel driver ring for Rx buffers */
1564 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1565 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1566 if (!rxq->sw_rx_ring) {
1567 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1568 rc = -ENOMEM;
1569 goto err;
1570 }
1571
1572 /* Allocate FW Rx ring */
1573 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1574 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE;
1575 params.elem_size = sizeof(struct eth_rx_bd);
1576
1577 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms);
1578 if (rc)
1579 goto err;
1580
1581 /* Allocate FW completion ring */
1582 params.mode = QED_CHAIN_MODE_PBL;
1583 params.intended_use = QED_CHAIN_USE_TO_CONSUME;
1584 params.elem_size = sizeof(union eth_rx_cqe);
1585
1586 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms);
1587 if (rc)
1588 goto err;
1589
1590 /* Allocate buffers for the Rx ring */
1591 rxq->filled_buffers = 0;
1592 for (i = 0; i < rxq->num_rx_buffers; i++) {
1593 rc = qede_alloc_rx_buffer(rxq, false);
1594 if (rc) {
1595 DP_ERR(edev,
1596 "Rx buffers allocation failed at index %d\n", i);
1597 goto err;
1598 }
1599 }
1600
1601 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1602 if (!edev->gro_disable)
1603 qede_set_tpa_param(rxq);
1604 err:
1605 return rc;
1606 }
1607
qede_free_mem_txq(struct qede_dev * edev,struct qede_tx_queue * txq)1608 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1609 {
1610 /* Free the parallel SW ring */
1611 if (txq->is_xdp)
1612 kfree(txq->sw_tx_ring.xdp);
1613 else
1614 kfree(txq->sw_tx_ring.skbs);
1615
1616 /* Free the real RQ ring used by FW */
1617 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1618 }
1619
1620 /* This function allocates all memory needed per Tx queue */
qede_alloc_mem_txq(struct qede_dev * edev,struct qede_tx_queue * txq)1621 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1622 {
1623 struct qed_chain_init_params params = {
1624 .mode = QED_CHAIN_MODE_PBL,
1625 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1626 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1627 .num_elems = edev->q_num_tx_buffers,
1628 .elem_size = sizeof(union eth_tx_bd_types),
1629 };
1630 int size, rc;
1631
1632 txq->num_tx_buffers = edev->q_num_tx_buffers;
1633
1634 /* Allocate the parallel driver ring for Tx buffers */
1635 if (txq->is_xdp) {
1636 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1637 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1638 if (!txq->sw_tx_ring.xdp)
1639 goto err;
1640 } else {
1641 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1642 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1643 if (!txq->sw_tx_ring.skbs)
1644 goto err;
1645 }
1646
1647 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms);
1648 if (rc)
1649 goto err;
1650
1651 return 0;
1652
1653 err:
1654 qede_free_mem_txq(edev, txq);
1655 return -ENOMEM;
1656 }
1657
1658 /* This function frees all memory of a single fp */
qede_free_mem_fp(struct qede_dev * edev,struct qede_fastpath * fp)1659 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1660 {
1661 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1662
1663 if (fp->type & QEDE_FASTPATH_RX)
1664 qede_free_mem_rxq(edev, fp->rxq);
1665
1666 if (fp->type & QEDE_FASTPATH_XDP)
1667 qede_free_mem_txq(edev, fp->xdp_tx);
1668
1669 if (fp->type & QEDE_FASTPATH_TX) {
1670 int cos;
1671
1672 for_each_cos_in_txq(edev, cos)
1673 qede_free_mem_txq(edev, &fp->txq[cos]);
1674 }
1675 }
1676
1677 /* This function allocates all memory needed for a single fp (i.e. an entity
1678 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1679 */
qede_alloc_mem_fp(struct qede_dev * edev,struct qede_fastpath * fp)1680 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1681 {
1682 int rc = 0;
1683
1684 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1685 if (rc)
1686 goto out;
1687
1688 if (fp->type & QEDE_FASTPATH_RX) {
1689 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1690 if (rc)
1691 goto out;
1692 }
1693
1694 if (fp->type & QEDE_FASTPATH_XDP) {
1695 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1696 if (rc)
1697 goto out;
1698 }
1699
1700 if (fp->type & QEDE_FASTPATH_TX) {
1701 int cos;
1702
1703 for_each_cos_in_txq(edev, cos) {
1704 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1705 if (rc)
1706 goto out;
1707 }
1708 }
1709
1710 out:
1711 return rc;
1712 }
1713
qede_free_mem_load(struct qede_dev * edev)1714 static void qede_free_mem_load(struct qede_dev *edev)
1715 {
1716 int i;
1717
1718 for_each_queue(i) {
1719 struct qede_fastpath *fp = &edev->fp_array[i];
1720
1721 qede_free_mem_fp(edev, fp);
1722 }
1723 }
1724
1725 /* This function allocates all qede memory at NIC load. */
qede_alloc_mem_load(struct qede_dev * edev)1726 static int qede_alloc_mem_load(struct qede_dev *edev)
1727 {
1728 int rc = 0, queue_id;
1729
1730 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1731 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1732
1733 rc = qede_alloc_mem_fp(edev, fp);
1734 if (rc) {
1735 DP_ERR(edev,
1736 "Failed to allocate memory for fastpath - rss id = %d\n",
1737 queue_id);
1738 qede_free_mem_load(edev);
1739 return rc;
1740 }
1741 }
1742
1743 return 0;
1744 }
1745
qede_empty_tx_queue(struct qede_dev * edev,struct qede_tx_queue * txq)1746 static void qede_empty_tx_queue(struct qede_dev *edev,
1747 struct qede_tx_queue *txq)
1748 {
1749 unsigned int pkts_compl = 0, bytes_compl = 0;
1750 struct netdev_queue *netdev_txq;
1751 int rc, len = 0;
1752
1753 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1754
1755 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1756 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1757 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1758 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1759 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1760 qed_chain_get_prod_idx(&txq->tx_pbl));
1761
1762 rc = qede_free_tx_pkt(edev, txq, &len);
1763 if (rc) {
1764 DP_NOTICE(edev,
1765 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1766 txq->index,
1767 qed_chain_get_cons_idx(&txq->tx_pbl),
1768 qed_chain_get_prod_idx(&txq->tx_pbl));
1769 break;
1770 }
1771
1772 bytes_compl += len;
1773 pkts_compl++;
1774 txq->sw_tx_cons++;
1775 }
1776
1777 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1778 }
1779
qede_empty_tx_queues(struct qede_dev * edev)1780 static void qede_empty_tx_queues(struct qede_dev *edev)
1781 {
1782 int i;
1783
1784 for_each_queue(i)
1785 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1786 int cos;
1787
1788 for_each_cos_in_txq(edev, cos) {
1789 struct qede_fastpath *fp;
1790
1791 fp = &edev->fp_array[i];
1792 qede_empty_tx_queue(edev,
1793 &fp->txq[cos]);
1794 }
1795 }
1796 }
1797
1798 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
qede_init_fp(struct qede_dev * edev)1799 static void qede_init_fp(struct qede_dev *edev)
1800 {
1801 int queue_id, rxq_index = 0, txq_index = 0;
1802 struct qede_fastpath *fp;
1803 bool init_xdp = false;
1804
1805 for_each_queue(queue_id) {
1806 fp = &edev->fp_array[queue_id];
1807
1808 fp->edev = edev;
1809 fp->id = queue_id;
1810
1811 if (fp->type & QEDE_FASTPATH_XDP) {
1812 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1813 rxq_index);
1814 fp->xdp_tx->is_xdp = 1;
1815
1816 spin_lock_init(&fp->xdp_tx->xdp_tx_lock);
1817 init_xdp = true;
1818 }
1819
1820 if (fp->type & QEDE_FASTPATH_RX) {
1821 fp->rxq->rxq_id = rxq_index++;
1822
1823 /* Determine how to map buffers for this queue */
1824 if (fp->type & QEDE_FASTPATH_XDP)
1825 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1826 else
1827 fp->rxq->data_direction = DMA_FROM_DEVICE;
1828 fp->rxq->dev = &edev->pdev->dev;
1829
1830 /* Driver have no error path from here */
1831 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1832 fp->rxq->rxq_id, 0) < 0);
1833
1834 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq,
1835 MEM_TYPE_PAGE_ORDER0,
1836 NULL)) {
1837 DP_NOTICE(edev,
1838 "Failed to register XDP memory model\n");
1839 }
1840 }
1841
1842 if (fp->type & QEDE_FASTPATH_TX) {
1843 int cos;
1844
1845 for_each_cos_in_txq(edev, cos) {
1846 struct qede_tx_queue *txq = &fp->txq[cos];
1847 u16 ndev_tx_id;
1848
1849 txq->cos = cos;
1850 txq->index = txq_index;
1851 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1852 txq->ndev_txq_id = ndev_tx_id;
1853
1854 if (edev->dev_info.is_legacy)
1855 txq->is_legacy = true;
1856 txq->dev = &edev->pdev->dev;
1857 }
1858
1859 txq_index++;
1860 }
1861
1862 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1863 edev->ndev->name, queue_id);
1864 }
1865
1866 if (init_xdp) {
1867 edev->total_xdp_queues = QEDE_RSS_COUNT(edev);
1868 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues);
1869 }
1870 }
1871
qede_set_real_num_queues(struct qede_dev * edev)1872 static int qede_set_real_num_queues(struct qede_dev *edev)
1873 {
1874 int rc = 0;
1875
1876 rc = netif_set_real_num_tx_queues(edev->ndev,
1877 QEDE_TSS_COUNT(edev) *
1878 edev->dev_info.num_tc);
1879 if (rc) {
1880 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1881 return rc;
1882 }
1883
1884 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1885 if (rc) {
1886 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1887 return rc;
1888 }
1889
1890 return 0;
1891 }
1892
qede_napi_disable_remove(struct qede_dev * edev)1893 static void qede_napi_disable_remove(struct qede_dev *edev)
1894 {
1895 int i;
1896
1897 for_each_queue(i) {
1898 napi_disable(&edev->fp_array[i].napi);
1899
1900 netif_napi_del(&edev->fp_array[i].napi);
1901 }
1902 }
1903
qede_napi_add_enable(struct qede_dev * edev)1904 static void qede_napi_add_enable(struct qede_dev *edev)
1905 {
1906 int i;
1907
1908 /* Add NAPI objects */
1909 for_each_queue(i) {
1910 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, qede_poll);
1911 napi_enable(&edev->fp_array[i].napi);
1912 }
1913 }
1914
qede_sync_free_irqs(struct qede_dev * edev)1915 static void qede_sync_free_irqs(struct qede_dev *edev)
1916 {
1917 int i;
1918
1919 for (i = 0; i < edev->int_info.used_cnt; i++) {
1920 if (edev->int_info.msix_cnt) {
1921 free_irq(edev->int_info.msix[i].vector,
1922 &edev->fp_array[i]);
1923 } else {
1924 edev->ops->common->simd_handler_clean(edev->cdev, i);
1925 }
1926 }
1927
1928 edev->int_info.used_cnt = 0;
1929 edev->int_info.msix_cnt = 0;
1930 }
1931
qede_req_msix_irqs(struct qede_dev * edev)1932 static int qede_req_msix_irqs(struct qede_dev *edev)
1933 {
1934 int i, rc;
1935
1936 /* Sanitize number of interrupts == number of prepared RSS queues */
1937 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1938 DP_ERR(edev,
1939 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1940 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1941 return -EINVAL;
1942 }
1943
1944 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1945 #ifdef CONFIG_RFS_ACCEL
1946 struct qede_fastpath *fp = &edev->fp_array[i];
1947
1948 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1949 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1950 edev->int_info.msix[i].vector);
1951 if (rc) {
1952 DP_ERR(edev, "Failed to add CPU rmap\n");
1953 qede_free_arfs(edev);
1954 }
1955 }
1956 #endif
1957 rc = request_irq(edev->int_info.msix[i].vector,
1958 qede_msix_fp_int, 0, edev->fp_array[i].name,
1959 &edev->fp_array[i]);
1960 if (rc) {
1961 DP_ERR(edev, "Request fp %d irq failed\n", i);
1962 #ifdef CONFIG_RFS_ACCEL
1963 if (edev->ndev->rx_cpu_rmap)
1964 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
1965
1966 edev->ndev->rx_cpu_rmap = NULL;
1967 #endif
1968 qede_sync_free_irqs(edev);
1969 return rc;
1970 }
1971 DP_VERBOSE(edev, NETIF_MSG_INTR,
1972 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1973 edev->fp_array[i].name, i,
1974 &edev->fp_array[i]);
1975 edev->int_info.used_cnt++;
1976 }
1977
1978 return 0;
1979 }
1980
qede_simd_fp_handler(void * cookie)1981 static void qede_simd_fp_handler(void *cookie)
1982 {
1983 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1984
1985 napi_schedule_irqoff(&fp->napi);
1986 }
1987
qede_setup_irqs(struct qede_dev * edev)1988 static int qede_setup_irqs(struct qede_dev *edev)
1989 {
1990 int i, rc = 0;
1991
1992 /* Learn Interrupt configuration */
1993 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1994 if (rc)
1995 return rc;
1996
1997 if (edev->int_info.msix_cnt) {
1998 rc = qede_req_msix_irqs(edev);
1999 if (rc)
2000 return rc;
2001 edev->ndev->irq = edev->int_info.msix[0].vector;
2002 } else {
2003 const struct qed_common_ops *ops;
2004
2005 /* qed should learn receive the RSS ids and callbacks */
2006 ops = edev->ops->common;
2007 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
2008 ops->simd_handler_config(edev->cdev,
2009 &edev->fp_array[i], i,
2010 qede_simd_fp_handler);
2011 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
2012 }
2013 return 0;
2014 }
2015
qede_drain_txq(struct qede_dev * edev,struct qede_tx_queue * txq,bool allow_drain)2016 static int qede_drain_txq(struct qede_dev *edev,
2017 struct qede_tx_queue *txq, bool allow_drain)
2018 {
2019 int rc, cnt = 1000;
2020
2021 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2022 if (!cnt) {
2023 if (allow_drain) {
2024 DP_NOTICE(edev,
2025 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2026 txq->index);
2027 rc = edev->ops->common->drain(edev->cdev);
2028 if (rc)
2029 return rc;
2030 return qede_drain_txq(edev, txq, false);
2031 }
2032 DP_NOTICE(edev,
2033 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2034 txq->index, txq->sw_tx_prod,
2035 txq->sw_tx_cons);
2036 return -ENODEV;
2037 }
2038 cnt--;
2039 usleep_range(1000, 2000);
2040 barrier();
2041 }
2042
2043 /* FW finished processing, wait for HW to transmit all tx packets */
2044 usleep_range(1000, 2000);
2045
2046 return 0;
2047 }
2048
qede_stop_txq(struct qede_dev * edev,struct qede_tx_queue * txq,int rss_id)2049 static int qede_stop_txq(struct qede_dev *edev,
2050 struct qede_tx_queue *txq, int rss_id)
2051 {
2052 /* delete doorbell from doorbell recovery mechanism */
2053 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
2054 &txq->tx_db);
2055
2056 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
2057 }
2058
qede_stop_queues(struct qede_dev * edev)2059 static int qede_stop_queues(struct qede_dev *edev)
2060 {
2061 struct qed_update_vport_params *vport_update_params;
2062 struct qed_dev *cdev = edev->cdev;
2063 struct qede_fastpath *fp;
2064 int rc, i;
2065
2066 /* Disable the vport */
2067 vport_update_params = vzalloc(sizeof(*vport_update_params));
2068 if (!vport_update_params)
2069 return -ENOMEM;
2070
2071 vport_update_params->vport_id = 0;
2072 vport_update_params->update_vport_active_flg = 1;
2073 vport_update_params->vport_active_flg = 0;
2074 vport_update_params->update_rss_flg = 0;
2075
2076 rc = edev->ops->vport_update(cdev, vport_update_params);
2077 vfree(vport_update_params);
2078
2079 if (rc) {
2080 DP_ERR(edev, "Failed to update vport\n");
2081 return rc;
2082 }
2083
2084 /* Flush Tx queues. If needed, request drain from MCP */
2085 for_each_queue(i) {
2086 fp = &edev->fp_array[i];
2087
2088 if (fp->type & QEDE_FASTPATH_TX) {
2089 int cos;
2090
2091 for_each_cos_in_txq(edev, cos) {
2092 rc = qede_drain_txq(edev, &fp->txq[cos], true);
2093 if (rc)
2094 return rc;
2095 }
2096 }
2097
2098 if (fp->type & QEDE_FASTPATH_XDP) {
2099 rc = qede_drain_txq(edev, fp->xdp_tx, true);
2100 if (rc)
2101 return rc;
2102 }
2103 }
2104
2105 /* Stop all Queues in reverse order */
2106 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2107 fp = &edev->fp_array[i];
2108
2109 /* Stop the Tx Queue(s) */
2110 if (fp->type & QEDE_FASTPATH_TX) {
2111 int cos;
2112
2113 for_each_cos_in_txq(edev, cos) {
2114 rc = qede_stop_txq(edev, &fp->txq[cos], i);
2115 if (rc)
2116 return rc;
2117 }
2118 }
2119
2120 /* Stop the Rx Queue */
2121 if (fp->type & QEDE_FASTPATH_RX) {
2122 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2123 if (rc) {
2124 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2125 return rc;
2126 }
2127 }
2128
2129 /* Stop the XDP forwarding queue */
2130 if (fp->type & QEDE_FASTPATH_XDP) {
2131 rc = qede_stop_txq(edev, fp->xdp_tx, i);
2132 if (rc)
2133 return rc;
2134
2135 bpf_prog_put(fp->rxq->xdp_prog);
2136 }
2137 }
2138
2139 /* Stop the vport */
2140 rc = edev->ops->vport_stop(cdev, 0);
2141 if (rc)
2142 DP_ERR(edev, "Failed to stop VPORT\n");
2143
2144 return rc;
2145 }
2146
qede_start_txq(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_tx_queue * txq,u8 rss_id,u16 sb_idx)2147 static int qede_start_txq(struct qede_dev *edev,
2148 struct qede_fastpath *fp,
2149 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2150 {
2151 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2152 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2153 struct qed_queue_start_common_params params;
2154 struct qed_txq_start_ret_params ret_params;
2155 int rc;
2156
2157 memset(¶ms, 0, sizeof(params));
2158 memset(&ret_params, 0, sizeof(ret_params));
2159
2160 /* Let the XDP queue share the queue-zone with one of the regular txq.
2161 * We don't really care about its coalescing.
2162 */
2163 if (txq->is_xdp)
2164 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2165 else
2166 params.queue_id = txq->index;
2167
2168 params.p_sb = fp->sb_info;
2169 params.sb_idx = sb_idx;
2170 params.tc = txq->cos;
2171
2172 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2173 page_cnt, &ret_params);
2174 if (rc) {
2175 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2176 return rc;
2177 }
2178
2179 txq->doorbell_addr = ret_params.p_doorbell;
2180 txq->handle = ret_params.p_handle;
2181
2182 /* Determine the FW consumer address associated */
2183 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2184
2185 /* Prepare the doorbell parameters */
2186 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2187 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2188 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2189 DQ_XCM_ETH_TX_BD_PROD_CMD);
2190 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2191
2192 /* register doorbell with doorbell recovery mechanism */
2193 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2194 &txq->tx_db, DB_REC_WIDTH_32B,
2195 DB_REC_KERNEL);
2196
2197 return rc;
2198 }
2199
qede_start_queues(struct qede_dev * edev,bool clear_stats)2200 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2201 {
2202 int vlan_removal_en = 1;
2203 struct qed_dev *cdev = edev->cdev;
2204 struct qed_dev_info *qed_info = &edev->dev_info.common;
2205 struct qed_update_vport_params *vport_update_params;
2206 struct qed_queue_start_common_params q_params;
2207 struct qed_start_vport_params start = {0};
2208 int rc, i;
2209
2210 if (!edev->num_queues) {
2211 DP_ERR(edev,
2212 "Cannot update V-VPORT as active as there are no Rx queues\n");
2213 return -EINVAL;
2214 }
2215
2216 vport_update_params = vzalloc(sizeof(*vport_update_params));
2217 if (!vport_update_params)
2218 return -ENOMEM;
2219
2220 start.handle_ptp_pkts = !!(edev->ptp);
2221 start.gro_enable = !edev->gro_disable;
2222 start.mtu = edev->ndev->mtu;
2223 start.vport_id = 0;
2224 start.drop_ttl0 = true;
2225 start.remove_inner_vlan = vlan_removal_en;
2226 start.clear_stats = clear_stats;
2227
2228 rc = edev->ops->vport_start(cdev, &start);
2229
2230 if (rc) {
2231 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2232 goto out;
2233 }
2234
2235 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2236 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2237 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2238
2239 for_each_queue(i) {
2240 struct qede_fastpath *fp = &edev->fp_array[i];
2241 dma_addr_t p_phys_table;
2242 u32 page_cnt;
2243
2244 if (fp->type & QEDE_FASTPATH_RX) {
2245 struct qed_rxq_start_ret_params ret_params;
2246 struct qede_rx_queue *rxq = fp->rxq;
2247 __le16 *val;
2248
2249 memset(&ret_params, 0, sizeof(ret_params));
2250 memset(&q_params, 0, sizeof(q_params));
2251 q_params.queue_id = rxq->rxq_id;
2252 q_params.vport_id = 0;
2253 q_params.p_sb = fp->sb_info;
2254 q_params.sb_idx = RX_PI;
2255
2256 p_phys_table =
2257 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2258 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2259
2260 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2261 rxq->rx_buf_size,
2262 rxq->rx_bd_ring.p_phys_addr,
2263 p_phys_table,
2264 page_cnt, &ret_params);
2265 if (rc) {
2266 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2267 rc);
2268 goto out;
2269 }
2270
2271 /* Use the return parameters */
2272 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2273 rxq->handle = ret_params.p_handle;
2274
2275 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2276 rxq->hw_cons_ptr = val;
2277
2278 qede_update_rx_prod(edev, rxq);
2279 }
2280
2281 if (fp->type & QEDE_FASTPATH_XDP) {
2282 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2283 if (rc)
2284 goto out;
2285
2286 bpf_prog_add(edev->xdp_prog, 1);
2287 fp->rxq->xdp_prog = edev->xdp_prog;
2288 }
2289
2290 if (fp->type & QEDE_FASTPATH_TX) {
2291 int cos;
2292
2293 for_each_cos_in_txq(edev, cos) {
2294 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2295 TX_PI(cos));
2296 if (rc)
2297 goto out;
2298 }
2299 }
2300 }
2301
2302 /* Prepare and send the vport enable */
2303 vport_update_params->vport_id = start.vport_id;
2304 vport_update_params->update_vport_active_flg = 1;
2305 vport_update_params->vport_active_flg = 1;
2306
2307 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2308 qed_info->tx_switching) {
2309 vport_update_params->update_tx_switching_flg = 1;
2310 vport_update_params->tx_switching_flg = 1;
2311 }
2312
2313 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2314 &vport_update_params->update_rss_flg);
2315
2316 rc = edev->ops->vport_update(cdev, vport_update_params);
2317 if (rc)
2318 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2319
2320 out:
2321 vfree(vport_update_params);
2322 return rc;
2323 }
2324
2325 enum qede_unload_mode {
2326 QEDE_UNLOAD_NORMAL,
2327 QEDE_UNLOAD_RECOVERY,
2328 };
2329
qede_unload(struct qede_dev * edev,enum qede_unload_mode mode,bool is_locked)2330 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2331 bool is_locked)
2332 {
2333 struct qed_link_params link_params;
2334 int rc;
2335
2336 DP_INFO(edev, "Starting qede unload\n");
2337
2338 if (!is_locked)
2339 __qede_lock(edev);
2340
2341 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2342
2343 if (mode != QEDE_UNLOAD_RECOVERY)
2344 edev->state = QEDE_STATE_CLOSED;
2345
2346 qede_rdma_dev_event_close(edev);
2347
2348 /* Close OS Tx */
2349 netif_tx_disable(edev->ndev);
2350 netif_carrier_off(edev->ndev);
2351
2352 if (mode != QEDE_UNLOAD_RECOVERY) {
2353 /* Reset the link */
2354 memset(&link_params, 0, sizeof(link_params));
2355 link_params.link_up = false;
2356 edev->ops->common->set_link(edev->cdev, &link_params);
2357
2358 rc = qede_stop_queues(edev);
2359 if (rc) {
2360 #ifdef CONFIG_RFS_ACCEL
2361 if (edev->dev_info.common.b_arfs_capable) {
2362 qede_poll_for_freeing_arfs_filters(edev);
2363 if (edev->ndev->rx_cpu_rmap)
2364 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
2365
2366 edev->ndev->rx_cpu_rmap = NULL;
2367 }
2368 #endif
2369 qede_sync_free_irqs(edev);
2370 goto out;
2371 }
2372
2373 DP_INFO(edev, "Stopped Queues\n");
2374 }
2375
2376 qede_vlan_mark_nonconfigured(edev);
2377 edev->ops->fastpath_stop(edev->cdev);
2378
2379 if (edev->dev_info.common.b_arfs_capable) {
2380 qede_poll_for_freeing_arfs_filters(edev);
2381 qede_free_arfs(edev);
2382 }
2383
2384 /* Release the interrupts */
2385 qede_sync_free_irqs(edev);
2386 edev->ops->common->set_fp_int(edev->cdev, 0);
2387
2388 qede_napi_disable_remove(edev);
2389
2390 if (mode == QEDE_UNLOAD_RECOVERY)
2391 qede_empty_tx_queues(edev);
2392
2393 qede_free_mem_load(edev);
2394 qede_free_fp_array(edev);
2395
2396 out:
2397 if (!is_locked)
2398 __qede_unlock(edev);
2399
2400 if (mode != QEDE_UNLOAD_RECOVERY)
2401 DP_NOTICE(edev, "Link is down\n");
2402
2403 edev->ptp_skip_txts = 0;
2404
2405 DP_INFO(edev, "Ending qede unload\n");
2406 }
2407
2408 enum qede_load_mode {
2409 QEDE_LOAD_NORMAL,
2410 QEDE_LOAD_RELOAD,
2411 QEDE_LOAD_RECOVERY,
2412 };
2413
qede_load(struct qede_dev * edev,enum qede_load_mode mode,bool is_locked)2414 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2415 bool is_locked)
2416 {
2417 struct qed_link_params link_params;
2418 struct ethtool_coalesce coal = {};
2419 u8 num_tc;
2420 int rc, i;
2421
2422 DP_INFO(edev, "Starting qede load\n");
2423
2424 if (!is_locked)
2425 __qede_lock(edev);
2426
2427 rc = qede_set_num_queues(edev);
2428 if (rc)
2429 goto out;
2430
2431 rc = qede_alloc_fp_array(edev);
2432 if (rc)
2433 goto out;
2434
2435 qede_init_fp(edev);
2436
2437 rc = qede_alloc_mem_load(edev);
2438 if (rc)
2439 goto err1;
2440 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2441 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2442
2443 rc = qede_set_real_num_queues(edev);
2444 if (rc)
2445 goto err2;
2446
2447 if (qede_alloc_arfs(edev)) {
2448 edev->ndev->features &= ~NETIF_F_NTUPLE;
2449 edev->dev_info.common.b_arfs_capable = false;
2450 }
2451
2452 qede_napi_add_enable(edev);
2453 DP_INFO(edev, "Napi added and enabled\n");
2454
2455 rc = qede_setup_irqs(edev);
2456 if (rc)
2457 goto err3;
2458 DP_INFO(edev, "Setup IRQs succeeded\n");
2459
2460 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2461 if (rc)
2462 goto err4;
2463 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2464
2465 num_tc = netdev_get_num_tc(edev->ndev);
2466 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2467 qede_setup_tc(edev->ndev, num_tc);
2468
2469 /* Program un-configured VLANs */
2470 qede_configure_vlan_filters(edev);
2471
2472 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2473
2474 /* Ask for link-up using current configuration */
2475 memset(&link_params, 0, sizeof(link_params));
2476 link_params.link_up = true;
2477 edev->ops->common->set_link(edev->cdev, &link_params);
2478
2479 edev->state = QEDE_STATE_OPEN;
2480
2481 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS;
2482 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS;
2483
2484 for_each_queue(i) {
2485 if (edev->coal_entry[i].isvalid) {
2486 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc;
2487 coal.tx_coalesce_usecs = edev->coal_entry[i].txc;
2488 }
2489 __qede_unlock(edev);
2490 qede_set_per_coalesce(edev->ndev, i, &coal);
2491 __qede_lock(edev);
2492 }
2493 DP_INFO(edev, "Ending successfully qede load\n");
2494
2495 goto out;
2496 err4:
2497 qede_sync_free_irqs(edev);
2498 err3:
2499 qede_napi_disable_remove(edev);
2500 err2:
2501 qede_free_mem_load(edev);
2502 err1:
2503 edev->ops->common->set_fp_int(edev->cdev, 0);
2504 qede_free_fp_array(edev);
2505 edev->num_queues = 0;
2506 edev->fp_num_tx = 0;
2507 edev->fp_num_rx = 0;
2508 out:
2509 if (!is_locked)
2510 __qede_unlock(edev);
2511
2512 return rc;
2513 }
2514
2515 /* 'func' should be able to run between unload and reload assuming interface
2516 * is actually running, or afterwards in case it's currently DOWN.
2517 */
qede_reload(struct qede_dev * edev,struct qede_reload_args * args,bool is_locked)2518 void qede_reload(struct qede_dev *edev,
2519 struct qede_reload_args *args, bool is_locked)
2520 {
2521 if (!is_locked)
2522 __qede_lock(edev);
2523
2524 /* Since qede_lock is held, internal state wouldn't change even
2525 * if netdev state would start transitioning. Check whether current
2526 * internal configuration indicates device is up, then reload.
2527 */
2528 if (edev->state == QEDE_STATE_OPEN) {
2529 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2530 if (args)
2531 args->func(edev, args);
2532 qede_load(edev, QEDE_LOAD_RELOAD, true);
2533
2534 /* Since no one is going to do it for us, re-configure */
2535 qede_config_rx_mode(edev->ndev);
2536 } else if (args) {
2537 args->func(edev, args);
2538 }
2539
2540 if (!is_locked)
2541 __qede_unlock(edev);
2542 }
2543
2544 /* called with rtnl_lock */
qede_open(struct net_device * ndev)2545 static int qede_open(struct net_device *ndev)
2546 {
2547 struct qede_dev *edev = netdev_priv(ndev);
2548 int rc;
2549
2550 netif_carrier_off(ndev);
2551
2552 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2553
2554 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2555 if (rc)
2556 return rc;
2557
2558 udp_tunnel_nic_reset_ntf(ndev);
2559
2560 edev->ops->common->update_drv_state(edev->cdev, true);
2561
2562 return 0;
2563 }
2564
qede_close(struct net_device * ndev)2565 static int qede_close(struct net_device *ndev)
2566 {
2567 struct qede_dev *edev = netdev_priv(ndev);
2568
2569 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2570
2571 if (edev->cdev)
2572 edev->ops->common->update_drv_state(edev->cdev, false);
2573
2574 return 0;
2575 }
2576
qede_link_update(void * dev,struct qed_link_output * link)2577 static void qede_link_update(void *dev, struct qed_link_output *link)
2578 {
2579 struct qede_dev *edev = dev;
2580
2581 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2582 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2583 return;
2584 }
2585
2586 if (link->link_up) {
2587 if (!netif_carrier_ok(edev->ndev)) {
2588 DP_NOTICE(edev, "Link is up\n");
2589 netif_tx_start_all_queues(edev->ndev);
2590 netif_carrier_on(edev->ndev);
2591 qede_rdma_dev_event_open(edev);
2592 }
2593 } else {
2594 if (netif_carrier_ok(edev->ndev)) {
2595 DP_NOTICE(edev, "Link is down\n");
2596 netif_tx_disable(edev->ndev);
2597 netif_carrier_off(edev->ndev);
2598 qede_rdma_dev_event_close(edev);
2599 }
2600 }
2601 }
2602
qede_schedule_recovery_handler(void * dev)2603 static void qede_schedule_recovery_handler(void *dev)
2604 {
2605 struct qede_dev *edev = dev;
2606
2607 if (edev->state == QEDE_STATE_RECOVERY) {
2608 DP_NOTICE(edev,
2609 "Avoid scheduling a recovery handling since already in recovery state\n");
2610 return;
2611 }
2612
2613 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2614 schedule_delayed_work(&edev->sp_task, 0);
2615
2616 DP_INFO(edev, "Scheduled a recovery handler\n");
2617 }
2618
qede_recovery_failed(struct qede_dev * edev)2619 static void qede_recovery_failed(struct qede_dev *edev)
2620 {
2621 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2622
2623 netif_device_detach(edev->ndev);
2624
2625 if (edev->cdev)
2626 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2627 }
2628
qede_recovery_handler(struct qede_dev * edev)2629 static void qede_recovery_handler(struct qede_dev *edev)
2630 {
2631 u32 curr_state = edev->state;
2632 int rc;
2633
2634 DP_NOTICE(edev, "Starting a recovery process\n");
2635
2636 /* No need to acquire first the qede_lock since is done by qede_sp_task
2637 * before calling this function.
2638 */
2639 edev->state = QEDE_STATE_RECOVERY;
2640
2641 edev->ops->common->recovery_prolog(edev->cdev);
2642
2643 if (curr_state == QEDE_STATE_OPEN)
2644 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2645
2646 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2647
2648 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2649 IS_VF(edev), QEDE_PROBE_RECOVERY);
2650 if (rc) {
2651 edev->cdev = NULL;
2652 goto err;
2653 }
2654
2655 if (curr_state == QEDE_STATE_OPEN) {
2656 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2657 if (rc)
2658 goto err;
2659
2660 qede_config_rx_mode(edev->ndev);
2661 udp_tunnel_nic_reset_ntf(edev->ndev);
2662 }
2663
2664 edev->state = curr_state;
2665
2666 DP_NOTICE(edev, "Recovery handling is done\n");
2667
2668 return;
2669
2670 err:
2671 qede_recovery_failed(edev);
2672 }
2673
qede_atomic_hw_err_handler(struct qede_dev * edev)2674 static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2675 {
2676 struct qed_dev *cdev = edev->cdev;
2677
2678 DP_NOTICE(edev,
2679 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2680 edev->err_flags);
2681
2682 /* Get a call trace of the flow that led to the error */
2683 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2684
2685 /* Prevent HW attentions from being reasserted */
2686 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2687 edev->ops->common->attn_clr_enable(cdev, true);
2688
2689 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2690 }
2691
qede_generic_hw_err_handler(struct qede_dev * edev)2692 static void qede_generic_hw_err_handler(struct qede_dev *edev)
2693 {
2694 DP_NOTICE(edev,
2695 "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2696 edev->err_flags);
2697
2698 if (edev->devlink) {
2699 DP_NOTICE(edev, "Reporting fatal error to devlink\n");
2700 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type);
2701 }
2702
2703 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2704
2705 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2706 }
2707
qede_set_hw_err_flags(struct qede_dev * edev,enum qed_hw_err_type err_type)2708 static void qede_set_hw_err_flags(struct qede_dev *edev,
2709 enum qed_hw_err_type err_type)
2710 {
2711 unsigned long err_flags = 0;
2712
2713 switch (err_type) {
2714 case QED_HW_ERR_DMAE_FAIL:
2715 set_bit(QEDE_ERR_WARN, &err_flags);
2716 fallthrough;
2717 case QED_HW_ERR_MFW_RESP_FAIL:
2718 case QED_HW_ERR_HW_ATTN:
2719 case QED_HW_ERR_RAMROD_FAIL:
2720 case QED_HW_ERR_FW_ASSERT:
2721 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2722 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2723 /* make this error as recoverable and start recovery*/
2724 set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags);
2725 break;
2726
2727 default:
2728 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2729 break;
2730 }
2731
2732 edev->err_flags |= err_flags;
2733 }
2734
qede_schedule_hw_err_handler(void * dev,enum qed_hw_err_type err_type)2735 static void qede_schedule_hw_err_handler(void *dev,
2736 enum qed_hw_err_type err_type)
2737 {
2738 struct qede_dev *edev = dev;
2739
2740 /* Fan failure cannot be masked by handling of another HW error or by a
2741 * concurrent recovery process.
2742 */
2743 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2744 edev->state == QEDE_STATE_RECOVERY) &&
2745 err_type != QED_HW_ERR_FAN_FAIL) {
2746 DP_INFO(edev,
2747 "Avoid scheduling an error handling while another HW error is being handled\n");
2748 return;
2749 }
2750
2751 if (err_type >= QED_HW_ERR_LAST) {
2752 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2753 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2754 return;
2755 }
2756
2757 edev->last_err_type = err_type;
2758 qede_set_hw_err_flags(edev, err_type);
2759 qede_atomic_hw_err_handler(edev);
2760 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2761 schedule_delayed_work(&edev->sp_task, 0);
2762
2763 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2764 }
2765
qede_is_txq_full(struct qede_dev * edev,struct qede_tx_queue * txq)2766 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2767 {
2768 struct netdev_queue *netdev_txq;
2769
2770 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2771 if (netif_xmit_stopped(netdev_txq))
2772 return true;
2773
2774 return false;
2775 }
2776
qede_get_generic_tlv_data(void * dev,struct qed_generic_tlvs * data)2777 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2778 {
2779 struct qede_dev *edev = dev;
2780 struct netdev_hw_addr *ha;
2781 int i;
2782
2783 if (edev->ndev->features & NETIF_F_IP_CSUM)
2784 data->feat_flags |= QED_TLV_IP_CSUM;
2785 if (edev->ndev->features & NETIF_F_TSO)
2786 data->feat_flags |= QED_TLV_LSO;
2787
2788 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2789 eth_zero_addr(data->mac[1]);
2790 eth_zero_addr(data->mac[2]);
2791 /* Copy the first two UC macs */
2792 netif_addr_lock_bh(edev->ndev);
2793 i = 1;
2794 netdev_for_each_uc_addr(ha, edev->ndev) {
2795 ether_addr_copy(data->mac[i++], ha->addr);
2796 if (i == QED_TLV_MAC_COUNT)
2797 break;
2798 }
2799
2800 netif_addr_unlock_bh(edev->ndev);
2801 }
2802
qede_get_eth_tlv_data(void * dev,void * data)2803 static void qede_get_eth_tlv_data(void *dev, void *data)
2804 {
2805 struct qed_mfw_tlv_eth *etlv = data;
2806 struct qede_dev *edev = dev;
2807 struct qede_fastpath *fp;
2808 int i;
2809
2810 etlv->lso_maxoff_size = 0XFFFF;
2811 etlv->lso_maxoff_size_set = true;
2812 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2813 etlv->lso_minseg_size_set = true;
2814 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2815 etlv->prom_mode_set = true;
2816 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2817 etlv->tx_descr_size_set = true;
2818 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2819 etlv->rx_descr_size_set = true;
2820 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2821 etlv->iov_offload_set = true;
2822
2823 /* Fill information regarding queues; Should be done under the qede
2824 * lock to guarantee those don't change beneath our feet.
2825 */
2826 etlv->txqs_empty = true;
2827 etlv->rxqs_empty = true;
2828 etlv->num_txqs_full = 0;
2829 etlv->num_rxqs_full = 0;
2830
2831 __qede_lock(edev);
2832 for_each_queue(i) {
2833 fp = &edev->fp_array[i];
2834 if (fp->type & QEDE_FASTPATH_TX) {
2835 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2836
2837 if (txq->sw_tx_cons != txq->sw_tx_prod)
2838 etlv->txqs_empty = false;
2839 if (qede_is_txq_full(edev, txq))
2840 etlv->num_txqs_full++;
2841 }
2842 if (fp->type & QEDE_FASTPATH_RX) {
2843 if (qede_has_rx_work(fp->rxq))
2844 etlv->rxqs_empty = false;
2845
2846 /* This one is a bit tricky; Firmware might stop
2847 * placing packets if ring is not yet full.
2848 * Give an approximation.
2849 */
2850 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2851 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2852 RX_RING_SIZE - 100)
2853 etlv->num_rxqs_full++;
2854 }
2855 }
2856 __qede_unlock(edev);
2857
2858 etlv->txqs_empty_set = true;
2859 etlv->rxqs_empty_set = true;
2860 etlv->num_txqs_full_set = true;
2861 etlv->num_rxqs_full_set = true;
2862 }
2863
2864 /**
2865 * qede_io_error_detected(): Called when PCI error is detected
2866 *
2867 * @pdev: Pointer to PCI device
2868 * @state: The current pci connection state
2869 *
2870 *Return: pci_ers_result_t.
2871 *
2872 * This function is called after a PCI bus error affecting
2873 * this device has been detected.
2874 */
2875 static pci_ers_result_t
qede_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)2876 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2877 {
2878 struct net_device *dev = pci_get_drvdata(pdev);
2879 struct qede_dev *edev = netdev_priv(dev);
2880
2881 if (!edev)
2882 return PCI_ERS_RESULT_NONE;
2883
2884 DP_NOTICE(edev, "IO error detected [%d]\n", state);
2885
2886 __qede_lock(edev);
2887 if (edev->state == QEDE_STATE_RECOVERY) {
2888 DP_NOTICE(edev, "Device already in the recovery state\n");
2889 __qede_unlock(edev);
2890 return PCI_ERS_RESULT_NONE;
2891 }
2892
2893 /* PF handles the recovery of its VFs */
2894 if (IS_VF(edev)) {
2895 DP_VERBOSE(edev, QED_MSG_IOV,
2896 "VF recovery is handled by its PF\n");
2897 __qede_unlock(edev);
2898 return PCI_ERS_RESULT_RECOVERED;
2899 }
2900
2901 /* Close OS Tx */
2902 netif_tx_disable(edev->ndev);
2903 netif_carrier_off(edev->ndev);
2904
2905 set_bit(QEDE_SP_AER, &edev->sp_flags);
2906 schedule_delayed_work(&edev->sp_task, 0);
2907
2908 __qede_unlock(edev);
2909
2910 return PCI_ERS_RESULT_CAN_RECOVER;
2911 }
2912