1  /*
2   *   Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
3   *   Copyright (c) 2014, I2SE GmbH
4   *
5   *   Permission to use, copy, modify, and/or distribute this software
6   *   for any purpose with or without fee is hereby granted, provided
7   *   that the above copyright notice and this permission notice appear
8   *   in all copies.
9   *
10   *   THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11   *   WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12   *   WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
13   *   THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
14   *   CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
15   *   LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
16   *   NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
17   *   CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18   */
19  
20  /*   Qualcomm Atheros SPI register definition.
21   *
22   *   This module is designed to define the Qualcomm Atheros SPI register
23   *   placeholders;
24   */
25  
26  #ifndef _QCA_SPI_H
27  #define _QCA_SPI_H
28  
29  #include <linux/netdevice.h>
30  #include <linux/sched.h>
31  #include <linux/skbuff.h>
32  #include <linux/spi/spi.h>
33  #include <linux/types.h>
34  
35  #include "qca_7k_common.h"
36  
37  #define QCASPI_DRV_VERSION "0.2.7-i"
38  #define QCASPI_DRV_NAME    "qcaspi"
39  
40  #define QCASPI_GOOD_SIGNATURE 0xAA55
41  
42  #define TX_RING_MAX_LEN 10
43  #define TX_RING_MIN_LEN 2
44  
45  /* sync related constants */
46  #define QCASPI_SYNC_UNKNOWN 0
47  #define QCASPI_SYNC_RESET   1
48  #define QCASPI_SYNC_READY   2
49  
50  #define QCASPI_RESET_TIMEOUT 10
51  
52  /* sync events */
53  #define QCASPI_EVENT_UPDATE 0
54  #define QCASPI_EVENT_CPUON  1
55  
56  struct tx_ring {
57  	struct sk_buff *skb[TX_RING_MAX_LEN];
58  	u16 head;
59  	u16 tail;
60  	u16 size;
61  	u16 count;
62  };
63  
64  struct qcaspi_stats {
65  	u64 trig_reset;
66  	u64 device_reset;
67  	u64 reset_timeout;
68  	u64 read_err;
69  	u64 write_err;
70  	u64 read_buf_err;
71  	u64 write_buf_err;
72  	u64 out_of_mem;
73  	u64 write_buf_miss;
74  	u64 ring_full;
75  	u64 spi_err;
76  	u64 write_verify_failed;
77  	u64 buf_avail_err;
78  	u64 bad_signature;
79  };
80  
81  struct qcaspi {
82  	struct net_device *net_dev;
83  	struct spi_device *spi_dev;
84  	struct task_struct *spi_thread;
85  
86  	struct tx_ring txr;
87  	struct qcaspi_stats stats;
88  
89  	u8 *rx_buffer;
90  	u32 buffer_size;
91  	u8 sync;
92  
93  	struct qcafrm_handle frm_handle;
94  	struct sk_buff *rx_skb;
95  
96  	unsigned int intr_req;
97  	unsigned int intr_svc;
98  	u16 reset_count;
99  
100  #ifdef CONFIG_DEBUG_FS
101  	struct dentry *device_root;
102  #endif
103  
104  	/* user configurable options */
105  	u32 clkspeed;
106  	u8 legacy_mode;
107  	u16 burst_len;
108  };
109  
110  #endif /* _QCA_SPI_H */
111