1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. */
3 
4 #include <linux/err.h>
5 #include <linux/init.h>
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/mutex.h>
9 #include <linux/pm_domain.h>
10 #include <linux/of.h>
11 #include <linux/of_device.h>
12 #include <linux/platform_device.h>
13 #include <linux/pm_opp.h>
14 #include <linux/soc/qcom/smd-rpm.h>
15 
16 #include <dt-bindings/power/qcom-rpmpd.h>
17 
18 #define domain_to_rpmpd(domain) container_of(domain, struct rpmpd, pd)
19 
20 /* Resource types:
21  * RPMPD_X is X encoded as a little-endian, lower-case, ASCII string */
22 #define RPMPD_SMPA 0x61706d73
23 #define RPMPD_LDOA 0x616f646c
24 #define RPMPD_SMPB 0x62706d73
25 #define RPMPD_LDOB 0x626f646c
26 #define RPMPD_RWCX 0x78637772
27 #define RPMPD_RWMX 0x786d7772
28 #define RPMPD_RWLC 0x636c7772
29 #define RPMPD_RWLM 0x6d6c7772
30 #define RPMPD_RWSC 0x63737772
31 #define RPMPD_RWSM 0x6d737772
32 #define RPMPD_RWGX 0x78677772
33 
34 /* Operation Keys */
35 #define KEY_CORNER		0x6e726f63 /* corn */
36 #define KEY_ENABLE		0x6e657773 /* swen */
37 #define KEY_FLOOR_CORNER	0x636676   /* vfc */
38 #define KEY_FLOOR_LEVEL		0x6c6676   /* vfl */
39 #define KEY_LEVEL		0x6c766c76 /* vlvl */
40 
41 #define MAX_CORNER_RPMPD_STATE	6
42 
43 #define DEFINE_RPMPD_PAIR(_platform, _name, _active, r_type, r_key,	\
44 			  r_id)						\
45 	static struct rpmpd _platform##_##_active;			\
46 	static struct rpmpd _platform##_##_name = {			\
47 		.pd = {	.name = #_name,	},				\
48 		.peer = &_platform##_##_active,				\
49 		.res_type = RPMPD_##r_type,				\
50 		.res_id = r_id,						\
51 		.key = KEY_##r_key,					\
52 	};								\
53 	static struct rpmpd _platform##_##_active = {			\
54 		.pd = { .name = #_active, },				\
55 		.peer = &_platform##_##_name,				\
56 		.active_only = true,					\
57 		.res_type = RPMPD_##r_type,				\
58 		.res_id = r_id,						\
59 		.key = KEY_##r_key,					\
60 	}
61 
62 #define DEFINE_RPMPD_CORNER(_platform, _name, r_type, r_id)		\
63 	static struct rpmpd _platform##_##_name = {			\
64 		.pd = { .name = #_name, },				\
65 		.res_type = RPMPD_##r_type,				\
66 		.res_id = r_id,						\
67 		.key = KEY_CORNER,					\
68 	}
69 
70 #define DEFINE_RPMPD_LEVEL(_platform, _name, r_type, r_id)		\
71 	static struct rpmpd _platform##_##_name = {			\
72 		.pd = { .name = #_name, },				\
73 		.res_type = RPMPD_##r_type,				\
74 		.res_id = r_id,						\
75 		.key = KEY_LEVEL,					\
76 	}
77 
78 #define DEFINE_RPMPD_VFC(_platform, _name, r_type, r_id)		\
79 	static struct rpmpd _platform##_##_name = {			\
80 		.pd = { .name = #_name, },				\
81 		.res_type = RPMPD_##r_type,				\
82 		.res_id = r_id,						\
83 		.key = KEY_FLOOR_CORNER,				\
84 	}
85 
86 #define DEFINE_RPMPD_VFL(_platform, _name, r_type, r_id)		\
87 	static struct rpmpd _platform##_##_name = {			\
88 		.pd = { .name = #_name, },				\
89 		.res_type = RPMPD_##r_type,				\
90 		.res_id = r_id,						\
91 		.key = KEY_FLOOR_LEVEL,					\
92 	}
93 
94 struct rpmpd_req {
95 	__le32 key;
96 	__le32 nbytes;
97 	__le32 value;
98 };
99 
100 struct rpmpd {
101 	struct generic_pm_domain pd;
102 	struct rpmpd *peer;
103 	const bool active_only;
104 	unsigned int corner;
105 	bool enabled;
106 	const int res_type;
107 	const int res_id;
108 	struct qcom_smd_rpm *rpm;
109 	unsigned int max_state;
110 	__le32 key;
111 };
112 
113 struct rpmpd_desc {
114 	struct rpmpd **rpmpds;
115 	size_t num_pds;
116 	unsigned int max_state;
117 };
118 
119 static DEFINE_MUTEX(rpmpd_lock);
120 
121 /* mdm9607 RPM Power Domains */
122 DEFINE_RPMPD_PAIR(mdm9607, vddcx, vddcx_ao, SMPA, LEVEL, 3);
123 DEFINE_RPMPD_VFL(mdm9607, vddcx_vfl, SMPA, 3);
124 
125 DEFINE_RPMPD_PAIR(mdm9607, vddmx, vddmx_ao, LDOA, LEVEL, 12);
126 DEFINE_RPMPD_VFL(mdm9607, vddmx_vfl, LDOA, 12);
127 static struct rpmpd *mdm9607_rpmpds[] = {
128 	[MDM9607_VDDCX] =	&mdm9607_vddcx,
129 	[MDM9607_VDDCX_AO] =	&mdm9607_vddcx_ao,
130 	[MDM9607_VDDCX_VFL] =	&mdm9607_vddcx_vfl,
131 	[MDM9607_VDDMX] =	&mdm9607_vddmx,
132 	[MDM9607_VDDMX_AO] =	&mdm9607_vddmx_ao,
133 	[MDM9607_VDDMX_VFL] =	&mdm9607_vddmx_vfl,
134 };
135 
136 static const struct rpmpd_desc mdm9607_desc = {
137 	.rpmpds = mdm9607_rpmpds,
138 	.num_pds = ARRAY_SIZE(mdm9607_rpmpds),
139 	.max_state = RPM_SMD_LEVEL_TURBO,
140 };
141 
142 /* msm8226 RPM Power Domains */
143 DEFINE_RPMPD_PAIR(msm8226, vddcx, vddcx_ao, SMPA, CORNER, 1);
144 DEFINE_RPMPD_VFC(msm8226, vddcx_vfc, SMPA, 1);
145 
146 static struct rpmpd *msm8226_rpmpds[] = {
147 	[MSM8226_VDDCX] =	&msm8226_vddcx,
148 	[MSM8226_VDDCX_AO] =	&msm8226_vddcx_ao,
149 	[MSM8226_VDDCX_VFC] =	&msm8226_vddcx_vfc,
150 };
151 
152 static const struct rpmpd_desc msm8226_desc = {
153 	.rpmpds = msm8226_rpmpds,
154 	.num_pds = ARRAY_SIZE(msm8226_rpmpds),
155 	.max_state = MAX_CORNER_RPMPD_STATE,
156 };
157 
158 /* msm8939 RPM Power Domains */
159 DEFINE_RPMPD_PAIR(msm8939, vddmd, vddmd_ao, SMPA, CORNER, 1);
160 DEFINE_RPMPD_VFC(msm8939, vddmd_vfc, SMPA, 1);
161 
162 DEFINE_RPMPD_PAIR(msm8939, vddcx, vddcx_ao, SMPA, CORNER, 2);
163 DEFINE_RPMPD_VFC(msm8939, vddcx_vfc, SMPA, 2);
164 
165 DEFINE_RPMPD_PAIR(msm8939, vddmx, vddmx_ao, LDOA, CORNER, 3);
166 
167 static struct rpmpd *msm8939_rpmpds[] = {
168 	[MSM8939_VDDMDCX] =	&msm8939_vddmd,
169 	[MSM8939_VDDMDCX_AO] =	&msm8939_vddmd_ao,
170 	[MSM8939_VDDMDCX_VFC] =	&msm8939_vddmd_vfc,
171 	[MSM8939_VDDCX] =	&msm8939_vddcx,
172 	[MSM8939_VDDCX_AO] =	&msm8939_vddcx_ao,
173 	[MSM8939_VDDCX_VFC] =	&msm8939_vddcx_vfc,
174 	[MSM8939_VDDMX] =	&msm8939_vddmx,
175 	[MSM8939_VDDMX_AO] =	&msm8939_vddmx_ao,
176 };
177 
178 static const struct rpmpd_desc msm8939_desc = {
179 	.rpmpds = msm8939_rpmpds,
180 	.num_pds = ARRAY_SIZE(msm8939_rpmpds),
181 	.max_state = MAX_CORNER_RPMPD_STATE,
182 };
183 
184 /* msm8916 RPM Power Domains */
185 DEFINE_RPMPD_PAIR(msm8916, vddcx, vddcx_ao, SMPA, CORNER, 1);
186 DEFINE_RPMPD_PAIR(msm8916, vddmx, vddmx_ao, LDOA, CORNER, 3);
187 
188 DEFINE_RPMPD_VFC(msm8916, vddcx_vfc, SMPA, 1);
189 
190 static struct rpmpd *msm8916_rpmpds[] = {
191 	[MSM8916_VDDCX] =	&msm8916_vddcx,
192 	[MSM8916_VDDCX_AO] =	&msm8916_vddcx_ao,
193 	[MSM8916_VDDCX_VFC] =	&msm8916_vddcx_vfc,
194 	[MSM8916_VDDMX] =	&msm8916_vddmx,
195 	[MSM8916_VDDMX_AO] =	&msm8916_vddmx_ao,
196 };
197 
198 static const struct rpmpd_desc msm8916_desc = {
199 	.rpmpds = msm8916_rpmpds,
200 	.num_pds = ARRAY_SIZE(msm8916_rpmpds),
201 	.max_state = MAX_CORNER_RPMPD_STATE,
202 };
203 
204 /* msm8953 RPM Power Domains */
205 DEFINE_RPMPD_PAIR(msm8953, vddmd, vddmd_ao, SMPA, LEVEL, 1);
206 DEFINE_RPMPD_PAIR(msm8953, vddcx, vddcx_ao, SMPA, LEVEL, 2);
207 DEFINE_RPMPD_PAIR(msm8953, vddmx, vddmx_ao, SMPA, LEVEL, 7);
208 
209 DEFINE_RPMPD_VFL(msm8953, vddcx_vfl, SMPA, 2);
210 
211 static struct rpmpd *msm8953_rpmpds[] = {
212 	[MSM8953_VDDMD] =	&msm8953_vddmd,
213 	[MSM8953_VDDMD_AO] =	&msm8953_vddmd_ao,
214 	[MSM8953_VDDCX] =	&msm8953_vddcx,
215 	[MSM8953_VDDCX_AO] =	&msm8953_vddcx_ao,
216 	[MSM8953_VDDCX_VFL] =	&msm8953_vddcx_vfl,
217 	[MSM8953_VDDMX] =	&msm8953_vddmx,
218 	[MSM8953_VDDMX_AO] =	&msm8953_vddmx_ao,
219 };
220 
221 static const struct rpmpd_desc msm8953_desc = {
222 	.rpmpds = msm8953_rpmpds,
223 	.num_pds = ARRAY_SIZE(msm8953_rpmpds),
224 	.max_state = RPM_SMD_LEVEL_TURBO,
225 };
226 
227 /* msm8976 RPM Power Domains */
228 DEFINE_RPMPD_PAIR(msm8976, vddcx, vddcx_ao, SMPA, LEVEL, 2);
229 DEFINE_RPMPD_PAIR(msm8976, vddmx, vddmx_ao, SMPA, LEVEL, 6);
230 
231 DEFINE_RPMPD_VFL(msm8976, vddcx_vfl, RWSC, 2);
232 DEFINE_RPMPD_VFL(msm8976, vddmx_vfl, RWSM, 6);
233 
234 static struct rpmpd *msm8976_rpmpds[] = {
235 	[MSM8976_VDDCX] =	&msm8976_vddcx,
236 	[MSM8976_VDDCX_AO] =	&msm8976_vddcx_ao,
237 	[MSM8976_VDDCX_VFL] =	&msm8976_vddcx_vfl,
238 	[MSM8976_VDDMX] =	&msm8976_vddmx,
239 	[MSM8976_VDDMX_AO] =	&msm8976_vddmx_ao,
240 	[MSM8976_VDDMX_VFL] =	&msm8976_vddmx_vfl,
241 };
242 
243 static const struct rpmpd_desc msm8976_desc = {
244 	.rpmpds = msm8976_rpmpds,
245 	.num_pds = ARRAY_SIZE(msm8976_rpmpds),
246 	.max_state = RPM_SMD_LEVEL_TURBO_HIGH,
247 };
248 
249 /* msm8994 RPM Power domains */
250 DEFINE_RPMPD_PAIR(msm8994, vddcx, vddcx_ao, SMPA, CORNER, 1);
251 DEFINE_RPMPD_PAIR(msm8994, vddmx, vddmx_ao, SMPA, CORNER, 2);
252 /* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */
253 DEFINE_RPMPD_CORNER(msm8994, vddgfx, SMPB, 2);
254 
255 DEFINE_RPMPD_VFC(msm8994, vddcx_vfc, SMPA, 1);
256 DEFINE_RPMPD_VFC(msm8994, vddgfx_vfc, SMPB, 2);
257 
258 static struct rpmpd *msm8994_rpmpds[] = {
259 	[MSM8994_VDDCX] =	&msm8994_vddcx,
260 	[MSM8994_VDDCX_AO] =	&msm8994_vddcx_ao,
261 	[MSM8994_VDDCX_VFC] =	&msm8994_vddcx_vfc,
262 	[MSM8994_VDDMX] =	&msm8994_vddmx,
263 	[MSM8994_VDDMX_AO] =	&msm8994_vddmx_ao,
264 	[MSM8994_VDDGFX] =	&msm8994_vddgfx,
265 	[MSM8994_VDDGFX_VFC] =	&msm8994_vddgfx_vfc,
266 };
267 
268 static const struct rpmpd_desc msm8994_desc = {
269 	.rpmpds = msm8994_rpmpds,
270 	.num_pds = ARRAY_SIZE(msm8994_rpmpds),
271 	.max_state = MAX_CORNER_RPMPD_STATE,
272 };
273 
274 /* msm8996 RPM Power domains */
275 DEFINE_RPMPD_PAIR(msm8996, vddcx, vddcx_ao, SMPA, CORNER, 1);
276 DEFINE_RPMPD_PAIR(msm8996, vddmx, vddmx_ao, SMPA, CORNER, 2);
277 DEFINE_RPMPD_CORNER(msm8996, vddsscx, LDOA, 26);
278 
279 DEFINE_RPMPD_VFC(msm8996, vddcx_vfc, SMPA, 1);
280 DEFINE_RPMPD_VFC(msm8996, vddsscx_vfc, LDOA, 26);
281 
282 static struct rpmpd *msm8996_rpmpds[] = {
283 	[MSM8996_VDDCX] =	&msm8996_vddcx,
284 	[MSM8996_VDDCX_AO] =	&msm8996_vddcx_ao,
285 	[MSM8996_VDDCX_VFC] =	&msm8996_vddcx_vfc,
286 	[MSM8996_VDDMX] =	&msm8996_vddmx,
287 	[MSM8996_VDDMX_AO] =	&msm8996_vddmx_ao,
288 	[MSM8996_VDDSSCX] =	&msm8996_vddsscx,
289 	[MSM8996_VDDSSCX_VFC] =	&msm8996_vddsscx_vfc,
290 };
291 
292 static const struct rpmpd_desc msm8996_desc = {
293 	.rpmpds = msm8996_rpmpds,
294 	.num_pds = ARRAY_SIZE(msm8996_rpmpds),
295 	.max_state = MAX_CORNER_RPMPD_STATE,
296 };
297 
298 /* msm8998 RPM Power domains */
299 DEFINE_RPMPD_PAIR(msm8998, vddcx, vddcx_ao, RWCX, LEVEL, 0);
300 DEFINE_RPMPD_VFL(msm8998, vddcx_vfl, RWCX, 0);
301 
302 DEFINE_RPMPD_PAIR(msm8998, vddmx, vddmx_ao, RWMX, LEVEL, 0);
303 DEFINE_RPMPD_VFL(msm8998, vddmx_vfl, RWMX, 0);
304 
305 DEFINE_RPMPD_LEVEL(msm8998, vdd_ssccx, RWSC, 0);
306 DEFINE_RPMPD_VFL(msm8998, vdd_ssccx_vfl, RWSC, 0);
307 
308 DEFINE_RPMPD_LEVEL(msm8998, vdd_sscmx, RWSM, 0);
309 DEFINE_RPMPD_VFL(msm8998, vdd_sscmx_vfl, RWSM, 0);
310 
311 static struct rpmpd *msm8998_rpmpds[] = {
312 	[MSM8998_VDDCX] =		&msm8998_vddcx,
313 	[MSM8998_VDDCX_AO] =		&msm8998_vddcx_ao,
314 	[MSM8998_VDDCX_VFL] =		&msm8998_vddcx_vfl,
315 	[MSM8998_VDDMX] =		&msm8998_vddmx,
316 	[MSM8998_VDDMX_AO] =		&msm8998_vddmx_ao,
317 	[MSM8998_VDDMX_VFL] =		&msm8998_vddmx_vfl,
318 	[MSM8998_SSCCX] =		&msm8998_vdd_ssccx,
319 	[MSM8998_SSCCX_VFL] =		&msm8998_vdd_ssccx_vfl,
320 	[MSM8998_SSCMX] =		&msm8998_vdd_sscmx,
321 	[MSM8998_SSCMX_VFL] =		&msm8998_vdd_sscmx_vfl,
322 };
323 
324 static const struct rpmpd_desc msm8998_desc = {
325 	.rpmpds = msm8998_rpmpds,
326 	.num_pds = ARRAY_SIZE(msm8998_rpmpds),
327 	.max_state = RPM_SMD_LEVEL_BINNING,
328 };
329 
330 /* qcs404 RPM Power domains */
331 DEFINE_RPMPD_PAIR(qcs404, vddmx, vddmx_ao, RWMX, LEVEL, 0);
332 DEFINE_RPMPD_VFL(qcs404, vddmx_vfl, RWMX, 0);
333 
334 DEFINE_RPMPD_LEVEL(qcs404, vdd_lpicx, RWLC, 0);
335 DEFINE_RPMPD_VFL(qcs404, vdd_lpicx_vfl, RWLC, 0);
336 
337 DEFINE_RPMPD_LEVEL(qcs404, vdd_lpimx, RWLM, 0);
338 DEFINE_RPMPD_VFL(qcs404, vdd_lpimx_vfl, RWLM, 0);
339 
340 static struct rpmpd *qcs404_rpmpds[] = {
341 	[QCS404_VDDMX] = &qcs404_vddmx,
342 	[QCS404_VDDMX_AO] = &qcs404_vddmx_ao,
343 	[QCS404_VDDMX_VFL] = &qcs404_vddmx_vfl,
344 	[QCS404_LPICX] = &qcs404_vdd_lpicx,
345 	[QCS404_LPICX_VFL] = &qcs404_vdd_lpicx_vfl,
346 	[QCS404_LPIMX] = &qcs404_vdd_lpimx,
347 	[QCS404_LPIMX_VFL] = &qcs404_vdd_lpimx_vfl,
348 };
349 
350 static const struct rpmpd_desc qcs404_desc = {
351 	.rpmpds = qcs404_rpmpds,
352 	.num_pds = ARRAY_SIZE(qcs404_rpmpds),
353 	.max_state = RPM_SMD_LEVEL_BINNING,
354 };
355 
356 /* sdm660 RPM Power domains */
357 DEFINE_RPMPD_PAIR(sdm660, vddcx, vddcx_ao, RWCX, LEVEL, 0);
358 DEFINE_RPMPD_VFL(sdm660, vddcx_vfl, RWCX, 0);
359 
360 DEFINE_RPMPD_PAIR(sdm660, vddmx, vddmx_ao, RWMX, LEVEL, 0);
361 DEFINE_RPMPD_VFL(sdm660, vddmx_vfl, RWMX, 0);
362 
363 DEFINE_RPMPD_LEVEL(sdm660, vdd_ssccx, RWLC, 0);
364 DEFINE_RPMPD_VFL(sdm660, vdd_ssccx_vfl, RWLC, 0);
365 
366 DEFINE_RPMPD_LEVEL(sdm660, vdd_sscmx, RWLM, 0);
367 DEFINE_RPMPD_VFL(sdm660, vdd_sscmx_vfl, RWLM, 0);
368 
369 static struct rpmpd *sdm660_rpmpds[] = {
370 	[SDM660_VDDCX] =		&sdm660_vddcx,
371 	[SDM660_VDDCX_AO] =		&sdm660_vddcx_ao,
372 	[SDM660_VDDCX_VFL] =		&sdm660_vddcx_vfl,
373 	[SDM660_VDDMX] =		&sdm660_vddmx,
374 	[SDM660_VDDMX_AO] =		&sdm660_vddmx_ao,
375 	[SDM660_VDDMX_VFL] =		&sdm660_vddmx_vfl,
376 	[SDM660_SSCCX] =		&sdm660_vdd_ssccx,
377 	[SDM660_SSCCX_VFL] =		&sdm660_vdd_ssccx_vfl,
378 	[SDM660_SSCMX] =		&sdm660_vdd_sscmx,
379 	[SDM660_SSCMX_VFL] =		&sdm660_vdd_sscmx_vfl,
380 };
381 
382 static const struct rpmpd_desc sdm660_desc = {
383 	.rpmpds = sdm660_rpmpds,
384 	.num_pds = ARRAY_SIZE(sdm660_rpmpds),
385 	.max_state = RPM_SMD_LEVEL_TURBO,
386 };
387 
388 /* sm4250/6115 RPM Power domains */
389 DEFINE_RPMPD_PAIR(sm6115, vddcx, vddcx_ao, RWCX, LEVEL, 0);
390 DEFINE_RPMPD_VFL(sm6115, vddcx_vfl, RWCX, 0);
391 
392 DEFINE_RPMPD_PAIR(sm6115, vddmx, vddmx_ao, RWMX, LEVEL, 0);
393 DEFINE_RPMPD_VFL(sm6115, vddmx_vfl, RWMX, 0);
394 
395 DEFINE_RPMPD_LEVEL(sm6115, vdd_lpi_cx, RWLC, 0);
396 DEFINE_RPMPD_LEVEL(sm6115, vdd_lpi_mx, RWLM, 0);
397 
398 static struct rpmpd *sm6115_rpmpds[] = {
399 	[SM6115_VDDCX] =		&sm6115_vddcx,
400 	[SM6115_VDDCX_AO] =		&sm6115_vddcx_ao,
401 	[SM6115_VDDCX_VFL] =		&sm6115_vddcx_vfl,
402 	[SM6115_VDDMX] =		&sm6115_vddmx,
403 	[SM6115_VDDMX_AO] =		&sm6115_vddmx_ao,
404 	[SM6115_VDDMX_VFL] =		&sm6115_vddmx_vfl,
405 	[SM6115_VDD_LPI_CX] =		&sm6115_vdd_lpi_cx,
406 	[SM6115_VDD_LPI_MX] =		&sm6115_vdd_lpi_mx,
407 };
408 
409 static const struct rpmpd_desc sm6115_desc = {
410 	.rpmpds = sm6115_rpmpds,
411 	.num_pds = ARRAY_SIZE(sm6115_rpmpds),
412 	.max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
413 };
414 
415 /* sm6125 RPM Power domains */
416 DEFINE_RPMPD_PAIR(sm6125, vddcx, vddcx_ao, RWCX, LEVEL, 0);
417 DEFINE_RPMPD_VFL(sm6125, vddcx_vfl, RWCX, 0);
418 
419 DEFINE_RPMPD_PAIR(sm6125, vddmx, vddmx_ao, RWMX, LEVEL, 0);
420 DEFINE_RPMPD_VFL(sm6125, vddmx_vfl, RWMX, 0);
421 
422 static struct rpmpd *sm6125_rpmpds[] = {
423 	[SM6125_VDDCX] =		&sm6125_vddcx,
424 	[SM6125_VDDCX_AO] =		&sm6125_vddcx_ao,
425 	[SM6125_VDDCX_VFL] =		&sm6125_vddcx_vfl,
426 	[SM6125_VDDMX] =		&sm6125_vddmx,
427 	[SM6125_VDDMX_AO] =		&sm6125_vddmx_ao,
428 	[SM6125_VDDMX_VFL] =		&sm6125_vddmx_vfl,
429 };
430 
431 static const struct rpmpd_desc sm6125_desc = {
432 	.rpmpds = sm6125_rpmpds,
433 	.num_pds = ARRAY_SIZE(sm6125_rpmpds),
434 	.max_state = RPM_SMD_LEVEL_BINNING,
435 };
436 
437 DEFINE_RPMPD_PAIR(sm6375, vddgx, vddgx_ao, RWGX, LEVEL, 0);
438 static struct rpmpd *sm6375_rpmpds[] = {
439 	[SM6375_VDDCX] = &sm6125_vddcx,
440 	[SM6375_VDDCX_AO] = &sm6125_vddcx_ao,
441 	[SM6375_VDDCX_VFL] = &sm6125_vddcx_vfl,
442 	[SM6375_VDDMX] = &sm6125_vddmx,
443 	[SM6375_VDDMX_AO] = &sm6125_vddmx_ao,
444 	[SM6375_VDDMX_VFL] = &sm6125_vddmx_vfl,
445 	[SM6375_VDDGX] = &sm6375_vddgx,
446 	[SM6375_VDDGX_AO] = &sm6375_vddgx_ao,
447 	[SM6375_VDD_LPI_CX] = &sm6115_vdd_lpi_cx,
448 	[SM6375_VDD_LPI_MX] = &sm6115_vdd_lpi_mx,
449 };
450 
451 static const struct rpmpd_desc sm6375_desc = {
452 	.rpmpds = sm6375_rpmpds,
453 	.num_pds = ARRAY_SIZE(sm6375_rpmpds),
454 	.max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
455 };
456 
457 static struct rpmpd *qcm2290_rpmpds[] = {
458 	[QCM2290_VDDCX] = &sm6115_vddcx,
459 	[QCM2290_VDDCX_AO] = &sm6115_vddcx_ao,
460 	[QCM2290_VDDCX_VFL] = &sm6115_vddcx_vfl,
461 	[QCM2290_VDDMX] = &sm6115_vddmx,
462 	[QCM2290_VDDMX_AO] = &sm6115_vddmx_ao,
463 	[QCM2290_VDDMX_VFL] = &sm6115_vddmx_vfl,
464 	[QCM2290_VDD_LPI_CX] = &sm6115_vdd_lpi_cx,
465 	[QCM2290_VDD_LPI_MX] = &sm6115_vdd_lpi_mx,
466 };
467 
468 static const struct rpmpd_desc qcm2290_desc = {
469 	.rpmpds = qcm2290_rpmpds,
470 	.num_pds = ARRAY_SIZE(qcm2290_rpmpds),
471 	.max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
472 };
473 
474 static const struct of_device_id rpmpd_match_table[] = {
475 	{ .compatible = "qcom,mdm9607-rpmpd", .data = &mdm9607_desc },
476 	{ .compatible = "qcom,msm8226-rpmpd", .data = &msm8226_desc },
477 	{ .compatible = "qcom,msm8909-rpmpd", .data = &msm8916_desc },
478 	{ .compatible = "qcom,msm8916-rpmpd", .data = &msm8916_desc },
479 	{ .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
480 	{ .compatible = "qcom,msm8953-rpmpd", .data = &msm8953_desc },
481 	{ .compatible = "qcom,msm8976-rpmpd", .data = &msm8976_desc },
482 	{ .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
483 	{ .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
484 	{ .compatible = "qcom,msm8998-rpmpd", .data = &msm8998_desc },
485 	{ .compatible = "qcom,qcm2290-rpmpd", .data = &qcm2290_desc },
486 	{ .compatible = "qcom,qcs404-rpmpd", .data = &qcs404_desc },
487 	{ .compatible = "qcom,sdm660-rpmpd", .data = &sdm660_desc },
488 	{ .compatible = "qcom,sm6115-rpmpd", .data = &sm6115_desc },
489 	{ .compatible = "qcom,sm6125-rpmpd", .data = &sm6125_desc },
490 	{ .compatible = "qcom,sm6375-rpmpd", .data = &sm6375_desc },
491 	{ }
492 };
493 MODULE_DEVICE_TABLE(of, rpmpd_match_table);
494 
rpmpd_send_enable(struct rpmpd * pd,bool enable)495 static int rpmpd_send_enable(struct rpmpd *pd, bool enable)
496 {
497 	struct rpmpd_req req = {
498 		.key = KEY_ENABLE,
499 		.nbytes = cpu_to_le32(sizeof(u32)),
500 		.value = cpu_to_le32(enable),
501 	};
502 
503 	return qcom_rpm_smd_write(pd->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
504 				  pd->res_type, pd->res_id, &req, sizeof(req));
505 }
506 
rpmpd_send_corner(struct rpmpd * pd,int state,unsigned int corner)507 static int rpmpd_send_corner(struct rpmpd *pd, int state, unsigned int corner)
508 {
509 	struct rpmpd_req req = {
510 		.key = pd->key,
511 		.nbytes = cpu_to_le32(sizeof(u32)),
512 		.value = cpu_to_le32(corner),
513 	};
514 
515 	return qcom_rpm_smd_write(pd->rpm, state, pd->res_type, pd->res_id,
516 				  &req, sizeof(req));
517 };
518 
to_active_sleep(struct rpmpd * pd,unsigned int corner,unsigned int * active,unsigned int * sleep)519 static void to_active_sleep(struct rpmpd *pd, unsigned int corner,
520 			    unsigned int *active, unsigned int *sleep)
521 {
522 	*active = corner;
523 
524 	if (pd->active_only)
525 		*sleep = 0;
526 	else
527 		*sleep = *active;
528 }
529 
rpmpd_aggregate_corner(struct rpmpd * pd)530 static int rpmpd_aggregate_corner(struct rpmpd *pd)
531 {
532 	int ret;
533 	struct rpmpd *peer = pd->peer;
534 	unsigned int active_corner, sleep_corner;
535 	unsigned int this_active_corner = 0, this_sleep_corner = 0;
536 	unsigned int peer_active_corner = 0, peer_sleep_corner = 0;
537 
538 	to_active_sleep(pd, pd->corner, &this_active_corner, &this_sleep_corner);
539 
540 	if (peer && peer->enabled)
541 		to_active_sleep(peer, peer->corner, &peer_active_corner,
542 				&peer_sleep_corner);
543 
544 	active_corner = max(this_active_corner, peer_active_corner);
545 
546 	ret = rpmpd_send_corner(pd, QCOM_SMD_RPM_ACTIVE_STATE, active_corner);
547 	if (ret)
548 		return ret;
549 
550 	sleep_corner = max(this_sleep_corner, peer_sleep_corner);
551 
552 	return rpmpd_send_corner(pd, QCOM_SMD_RPM_SLEEP_STATE, sleep_corner);
553 }
554 
rpmpd_power_on(struct generic_pm_domain * domain)555 static int rpmpd_power_on(struct generic_pm_domain *domain)
556 {
557 	int ret;
558 	struct rpmpd *pd = domain_to_rpmpd(domain);
559 
560 	mutex_lock(&rpmpd_lock);
561 
562 	ret = rpmpd_send_enable(pd, true);
563 	if (ret)
564 		goto out;
565 
566 	pd->enabled = true;
567 
568 	if (pd->corner)
569 		ret = rpmpd_aggregate_corner(pd);
570 
571 out:
572 	mutex_unlock(&rpmpd_lock);
573 
574 	return ret;
575 }
576 
rpmpd_power_off(struct generic_pm_domain * domain)577 static int rpmpd_power_off(struct generic_pm_domain *domain)
578 {
579 	int ret;
580 	struct rpmpd *pd = domain_to_rpmpd(domain);
581 
582 	mutex_lock(&rpmpd_lock);
583 
584 	ret = rpmpd_send_enable(pd, false);
585 	if (!ret)
586 		pd->enabled = false;
587 
588 	mutex_unlock(&rpmpd_lock);
589 
590 	return ret;
591 }
592 
rpmpd_set_performance(struct generic_pm_domain * domain,unsigned int state)593 static int rpmpd_set_performance(struct generic_pm_domain *domain,
594 				 unsigned int state)
595 {
596 	int ret = 0;
597 	struct rpmpd *pd = domain_to_rpmpd(domain);
598 
599 	if (state > pd->max_state)
600 		state = pd->max_state;
601 
602 	mutex_lock(&rpmpd_lock);
603 
604 	pd->corner = state;
605 
606 	/* Always send updates for vfc and vfl */
607 	if (!pd->enabled && pd->key != KEY_FLOOR_CORNER &&
608 	    pd->key != KEY_FLOOR_LEVEL)
609 		goto out;
610 
611 	ret = rpmpd_aggregate_corner(pd);
612 
613 out:
614 	mutex_unlock(&rpmpd_lock);
615 
616 	return ret;
617 }
618 
rpmpd_get_performance(struct generic_pm_domain * genpd,struct dev_pm_opp * opp)619 static unsigned int rpmpd_get_performance(struct generic_pm_domain *genpd,
620 					  struct dev_pm_opp *opp)
621 {
622 	return dev_pm_opp_get_level(opp);
623 }
624 
rpmpd_probe(struct platform_device * pdev)625 static int rpmpd_probe(struct platform_device *pdev)
626 {
627 	int i;
628 	size_t num;
629 	struct genpd_onecell_data *data;
630 	struct qcom_smd_rpm *rpm;
631 	struct rpmpd **rpmpds;
632 	const struct rpmpd_desc *desc;
633 
634 	rpm = dev_get_drvdata(pdev->dev.parent);
635 	if (!rpm) {
636 		dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n");
637 		return -ENODEV;
638 	}
639 
640 	desc = of_device_get_match_data(&pdev->dev);
641 	if (!desc)
642 		return -EINVAL;
643 
644 	rpmpds = desc->rpmpds;
645 	num = desc->num_pds;
646 
647 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
648 	if (!data)
649 		return -ENOMEM;
650 
651 	data->domains = devm_kcalloc(&pdev->dev, num, sizeof(*data->domains),
652 				     GFP_KERNEL);
653 	if (!data->domains)
654 		return -ENOMEM;
655 
656 	data->num_domains = num;
657 
658 	for (i = 0; i < num; i++) {
659 		if (!rpmpds[i]) {
660 			dev_warn(&pdev->dev, "rpmpds[] with empty entry at index=%d\n",
661 				 i);
662 			continue;
663 		}
664 
665 		rpmpds[i]->rpm = rpm;
666 		rpmpds[i]->max_state = desc->max_state;
667 		rpmpds[i]->pd.power_off = rpmpd_power_off;
668 		rpmpds[i]->pd.power_on = rpmpd_power_on;
669 		rpmpds[i]->pd.set_performance_state = rpmpd_set_performance;
670 		rpmpds[i]->pd.opp_to_performance_state = rpmpd_get_performance;
671 		pm_genpd_init(&rpmpds[i]->pd, NULL, true);
672 
673 		data->domains[i] = &rpmpds[i]->pd;
674 	}
675 
676 	return of_genpd_add_provider_onecell(pdev->dev.of_node, data);
677 }
678 
679 static struct platform_driver rpmpd_driver = {
680 	.driver = {
681 		.name = "qcom-rpmpd",
682 		.of_match_table = rpmpd_match_table,
683 		.suppress_bind_attrs = true,
684 	},
685 	.probe = rpmpd_probe,
686 };
687 
rpmpd_init(void)688 static int __init rpmpd_init(void)
689 {
690 	return platform_driver_register(&rpmpd_driver);
691 }
692 core_initcall(rpmpd_init);
693 
694 MODULE_DESCRIPTION("Qualcomm Technologies, Inc. RPM Power Domain Driver");
695 MODULE_LICENSE("GPL v2");
696