1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2017-2019, Linaro Ltd.
5 */
6
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/random.h>
12 #include <linux/slab.h>
13 #include <linux/soc/qcom/smem.h>
14 #include <linux/string.h>
15 #include <linux/stringify.h>
16 #include <linux/sys_soc.h>
17 #include <linux/types.h>
18
19 #include <asm/unaligned.h>
20
21 #include <dt-bindings/arm/qcom,ids.h>
22
23 /*
24 * SoC version type with major number in the upper 16 bits and minor
25 * number in the lower 16 bits.
26 */
27 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
28 #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
29 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
30
31 /* Helper macros to create soc_id table */
32 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id)
33 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name)
34
35 #define SMEM_SOCINFO_BUILD_ID_LENGTH 32
36 #define SMEM_SOCINFO_CHIP_ID_LENGTH 32
37
38 /*
39 * SMEM item id, used to acquire handles to respective
40 * SMEM region.
41 */
42 #define SMEM_HW_SW_BUILD_ID 137
43
44 #ifdef CONFIG_DEBUG_FS
45 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
46 #define SMEM_IMAGE_VERSION_SIZE 4096
47 #define SMEM_IMAGE_VERSION_NAME_SIZE 75
48 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20
49 #define SMEM_IMAGE_VERSION_OEM_SIZE 32
50
51 /*
52 * SMEM Image table indices
53 */
54 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0
55 #define SMEM_IMAGE_TABLE_TZ_INDEX 1
56 #define SMEM_IMAGE_TABLE_RPM_INDEX 3
57 #define SMEM_IMAGE_TABLE_APPS_INDEX 10
58 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11
59 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12
60 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13
61 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14
62 #define SMEM_IMAGE_VERSION_TABLE 469
63
64 /*
65 * SMEM Image table names
66 */
67 static const char *const socinfo_image_names[] = {
68 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
69 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
70 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
71 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
72 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
73 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
74 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
75 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
76 };
77
78 static const char *const pmic_models[] = {
79 [0] = "Unknown PMIC model",
80 [1] = "PM8941",
81 [2] = "PM8841",
82 [3] = "PM8019",
83 [4] = "PM8226",
84 [5] = "PM8110",
85 [6] = "PMA8084",
86 [7] = "PMI8962",
87 [8] = "PMD9635",
88 [9] = "PM8994",
89 [10] = "PMI8994",
90 [11] = "PM8916",
91 [12] = "PM8004",
92 [13] = "PM8909/PM8058",
93 [14] = "PM8028",
94 [15] = "PM8901",
95 [16] = "PM8950/PM8027",
96 [17] = "PMI8950/ISL9519",
97 [18] = "PMK8001/PM8921",
98 [19] = "PMI8996/PM8018",
99 [20] = "PM8998/PM8015",
100 [21] = "PMI8998/PM8014",
101 [22] = "PM8821",
102 [23] = "PM8038",
103 [24] = "PM8005/PM8922",
104 [25] = "PM8917",
105 [26] = "PM660L",
106 [27] = "PM660",
107 [30] = "PM8150",
108 [31] = "PM8150L",
109 [32] = "PM8150B",
110 [33] = "PMK8002",
111 [36] = "PM8009",
112 [38] = "PM8150C",
113 [41] = "SMB2351",
114 [45] = "PM6125",
115 [47] = "PMK8350",
116 [48] = "PM8350",
117 [49] = "PM8350C",
118 [50] = "PM8350B",
119 [51] = "PMR735A",
120 [52] = "PMR735B",
121 [58] = "PM8450",
122 [65] = "PM8010",
123 };
124 #endif /* CONFIG_DEBUG_FS */
125
126 /* Socinfo SMEM item structure */
127 struct socinfo {
128 __le32 fmt;
129 __le32 id;
130 __le32 ver;
131 char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
132 /* Version 2 */
133 __le32 raw_id;
134 __le32 raw_ver;
135 /* Version 3 */
136 __le32 hw_plat;
137 /* Version 4 */
138 __le32 plat_ver;
139 /* Version 5 */
140 __le32 accessory_chip;
141 /* Version 6 */
142 __le32 hw_plat_subtype;
143 /* Version 7 */
144 __le32 pmic_model;
145 __le32 pmic_die_rev;
146 /* Version 8 */
147 __le32 pmic_model_1;
148 __le32 pmic_die_rev_1;
149 __le32 pmic_model_2;
150 __le32 pmic_die_rev_2;
151 /* Version 9 */
152 __le32 foundry_id;
153 /* Version 10 */
154 __le32 serial_num;
155 /* Version 11 */
156 __le32 num_pmics;
157 __le32 pmic_array_offset;
158 /* Version 12 */
159 __le32 chip_family;
160 __le32 raw_device_family;
161 __le32 raw_device_num;
162 /* Version 13 */
163 __le32 nproduct_id;
164 char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
165 /* Version 14 */
166 __le32 num_clusters;
167 __le32 ncluster_array_offset;
168 __le32 num_defective_parts;
169 __le32 ndefective_parts_array_offset;
170 /* Version 15 */
171 __le32 nmodem_supported;
172 /* Version 16 */
173 __le32 feature_code;
174 __le32 pcode;
175 __le32 npartnamemap_offset;
176 __le32 nnum_partname_mapping;
177 /* Version 17 */
178 __le32 oem_variant;
179 };
180
181 #ifdef CONFIG_DEBUG_FS
182 struct socinfo_params {
183 u32 raw_device_family;
184 u32 hw_plat_subtype;
185 u32 accessory_chip;
186 u32 raw_device_num;
187 u32 chip_family;
188 u32 foundry_id;
189 u32 plat_ver;
190 u32 raw_ver;
191 u32 hw_plat;
192 u32 fmt;
193 u32 nproduct_id;
194 u32 num_clusters;
195 u32 ncluster_array_offset;
196 u32 num_defective_parts;
197 u32 ndefective_parts_array_offset;
198 u32 nmodem_supported;
199 u32 feature_code;
200 u32 pcode;
201 u32 oem_variant;
202 };
203
204 struct smem_image_version {
205 char name[SMEM_IMAGE_VERSION_NAME_SIZE];
206 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
207 char pad;
208 char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
209 };
210 #endif /* CONFIG_DEBUG_FS */
211
212 struct qcom_socinfo {
213 struct soc_device *soc_dev;
214 struct soc_device_attribute attr;
215 #ifdef CONFIG_DEBUG_FS
216 struct dentry *dbg_root;
217 struct socinfo_params info;
218 #endif /* CONFIG_DEBUG_FS */
219 };
220
221 struct soc_id {
222 unsigned int id;
223 const char *name;
224 };
225
226 static const struct soc_id soc_id[] = {
227 { qcom_board_id(MSM8260) },
228 { qcom_board_id(MSM8660) },
229 { qcom_board_id(APQ8060) },
230 { qcom_board_id(MSM8960) },
231 { qcom_board_id(APQ8064) },
232 { qcom_board_id(MSM8930) },
233 { qcom_board_id(MSM8630) },
234 { qcom_board_id(MSM8230) },
235 { qcom_board_id(APQ8030) },
236 { qcom_board_id(MSM8627) },
237 { qcom_board_id(MSM8227) },
238 { qcom_board_id(MSM8660A) },
239 { qcom_board_id(MSM8260A) },
240 { qcom_board_id(APQ8060A) },
241 { qcom_board_id(MSM8974) },
242 { qcom_board_id(MSM8225) },
243 { qcom_board_id(MSM8625) },
244 { qcom_board_id(MPQ8064) },
245 { qcom_board_id(MSM8960AB) },
246 { qcom_board_id(APQ8060AB) },
247 { qcom_board_id(MSM8260AB) },
248 { qcom_board_id(MSM8660AB) },
249 { qcom_board_id(MSM8930AA) },
250 { qcom_board_id(MSM8630AA) },
251 { qcom_board_id(MSM8230AA) },
252 { qcom_board_id(MSM8626) },
253 { qcom_board_id(MSM8610) },
254 { qcom_board_id(APQ8064AB) },
255 { qcom_board_id(MSM8930AB) },
256 { qcom_board_id(MSM8630AB) },
257 { qcom_board_id(MSM8230AB) },
258 { qcom_board_id(APQ8030AB) },
259 { qcom_board_id(MSM8226) },
260 { qcom_board_id(MSM8526) },
261 { qcom_board_id(APQ8030AA) },
262 { qcom_board_id(MSM8110) },
263 { qcom_board_id(MSM8210) },
264 { qcom_board_id(MSM8810) },
265 { qcom_board_id(MSM8212) },
266 { qcom_board_id(MSM8612) },
267 { qcom_board_id(MSM8112) },
268 { qcom_board_id(MSM8125) },
269 { qcom_board_id(MSM8225Q) },
270 { qcom_board_id(MSM8625Q) },
271 { qcom_board_id(MSM8125Q) },
272 { qcom_board_id(APQ8064AA) },
273 { qcom_board_id(APQ8084) },
274 { qcom_board_id(MSM8130) },
275 { qcom_board_id(MSM8130AA) },
276 { qcom_board_id(MSM8130AB) },
277 { qcom_board_id(MSM8627AA) },
278 { qcom_board_id(MSM8227AA) },
279 { qcom_board_id(APQ8074) },
280 { qcom_board_id(MSM8274) },
281 { qcom_board_id(MSM8674) },
282 { qcom_board_id(MDM9635) },
283 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") },
284 { qcom_board_id(MSM8126) },
285 { qcom_board_id(APQ8026) },
286 { qcom_board_id(MSM8926) },
287 { qcom_board_id(IPQ8062) },
288 { qcom_board_id(IPQ8064) },
289 { qcom_board_id(IPQ8066) },
290 { qcom_board_id(IPQ8068) },
291 { qcom_board_id(MSM8326) },
292 { qcom_board_id(MSM8916) },
293 { qcom_board_id(MSM8994) },
294 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") },
295 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") },
296 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") },
297 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") },
298 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") },
299 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") },
300 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") },
301 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") },
302 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") },
303 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") },
304 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") },
305 { qcom_board_id(APQ8028) },
306 { qcom_board_id(MSM8128) },
307 { qcom_board_id(MSM8228) },
308 { qcom_board_id(MSM8528) },
309 { qcom_board_id(MSM8628) },
310 { qcom_board_id(MSM8928) },
311 { qcom_board_id(MSM8510) },
312 { qcom_board_id(MSM8512) },
313 { qcom_board_id(MSM8936) },
314 { qcom_board_id(MDM9640) },
315 { qcom_board_id(MSM8939) },
316 { qcom_board_id(APQ8036) },
317 { qcom_board_id(APQ8039) },
318 { qcom_board_id(MSM8236) },
319 { qcom_board_id(MSM8636) },
320 { qcom_board_id(MSM8909) },
321 { qcom_board_id(MSM8996) },
322 { qcom_board_id(APQ8016) },
323 { qcom_board_id(MSM8216) },
324 { qcom_board_id(MSM8116) },
325 { qcom_board_id(MSM8616) },
326 { qcom_board_id(MSM8992) },
327 { qcom_board_id(APQ8092) },
328 { qcom_board_id(APQ8094) },
329 { qcom_board_id(MSM8209) },
330 { qcom_board_id(MSM8208) },
331 { qcom_board_id(MDM9209) },
332 { qcom_board_id(MDM9309) },
333 { qcom_board_id(MDM9609) },
334 { qcom_board_id(MSM8239) },
335 { qcom_board_id(MSM8952) },
336 { qcom_board_id(APQ8009) },
337 { qcom_board_id(MSM8956) },
338 { qcom_board_id(MSM8929) },
339 { qcom_board_id(MSM8629) },
340 { qcom_board_id(MSM8229) },
341 { qcom_board_id(APQ8029) },
342 { qcom_board_id(APQ8056) },
343 { qcom_board_id(MSM8609) },
344 { qcom_board_id(APQ8076) },
345 { qcom_board_id(MSM8976) },
346 { qcom_board_id(IPQ8065) },
347 { qcom_board_id(IPQ8069) },
348 { qcom_board_id(MDM9650) },
349 { qcom_board_id(MDM9655) },
350 { qcom_board_id(MDM9250) },
351 { qcom_board_id(MDM9255) },
352 { qcom_board_id(MDM9350) },
353 { qcom_board_id(APQ8052) },
354 { qcom_board_id(MDM9607) },
355 { qcom_board_id(APQ8096) },
356 { qcom_board_id(MSM8998) },
357 { qcom_board_id(MSM8953) },
358 { qcom_board_id(MSM8937) },
359 { qcom_board_id(APQ8037) },
360 { qcom_board_id(MDM8207) },
361 { qcom_board_id(MDM9207) },
362 { qcom_board_id(MDM9307) },
363 { qcom_board_id(MDM9628) },
364 { qcom_board_id(MSM8909W) },
365 { qcom_board_id(APQ8009W) },
366 { qcom_board_id(MSM8996L) },
367 { qcom_board_id(MSM8917) },
368 { qcom_board_id(APQ8053) },
369 { qcom_board_id(MSM8996SG) },
370 { qcom_board_id(APQ8017) },
371 { qcom_board_id(MSM8217) },
372 { qcom_board_id(MSM8617) },
373 { qcom_board_id(MSM8996AU) },
374 { qcom_board_id(APQ8096AU) },
375 { qcom_board_id(APQ8096SG) },
376 { qcom_board_id(MSM8940) },
377 { qcom_board_id(SDX201) },
378 { qcom_board_id(SDM660) },
379 { qcom_board_id(SDM630) },
380 { qcom_board_id(APQ8098) },
381 { qcom_board_id(MSM8920) },
382 { qcom_board_id(SDM845) },
383 { qcom_board_id(MDM9206) },
384 { qcom_board_id(IPQ8074) },
385 { qcom_board_id(SDA660) },
386 { qcom_board_id(SDM658) },
387 { qcom_board_id(SDA658) },
388 { qcom_board_id(SDA630) },
389 { qcom_board_id(MSM8905) },
390 { qcom_board_id(SDX202) },
391 { qcom_board_id(SDM450) },
392 { qcom_board_id(SM8150) },
393 { qcom_board_id(SDA845) },
394 { qcom_board_id(IPQ8072) },
395 { qcom_board_id(IPQ8076) },
396 { qcom_board_id(IPQ8078) },
397 { qcom_board_id(SDM636) },
398 { qcom_board_id(SDA636) },
399 { qcom_board_id(SDM632) },
400 { qcom_board_id(SDA632) },
401 { qcom_board_id(SDA450) },
402 { qcom_board_id(SDM439) },
403 { qcom_board_id(SDM429) },
404 { qcom_board_id(SM8250) },
405 { qcom_board_id(SA8155) },
406 { qcom_board_id(SDA439) },
407 { qcom_board_id(SDA429) },
408 { qcom_board_id(IPQ8070) },
409 { qcom_board_id(IPQ8071) },
410 { qcom_board_id(QM215) },
411 { qcom_board_id(IPQ8072A) },
412 { qcom_board_id(IPQ8074A) },
413 { qcom_board_id(IPQ8076A) },
414 { qcom_board_id(IPQ8078A) },
415 { qcom_board_id(SM6125) },
416 { qcom_board_id(IPQ8070A) },
417 { qcom_board_id(IPQ8071A) },
418 { qcom_board_id(IPQ6018) },
419 { qcom_board_id(IPQ6028) },
420 { qcom_board_id(SDM429W) },
421 { qcom_board_id(SM4250) },
422 { qcom_board_id(IPQ6000) },
423 { qcom_board_id(IPQ6010) },
424 { qcom_board_id(SC7180) },
425 { qcom_board_id(SM6350) },
426 { qcom_board_id(QCM2150) },
427 { qcom_board_id(SDA429W) },
428 { qcom_board_id(SM8350) },
429 { qcom_board_id(SM6115) },
430 { qcom_board_id(SC8280XP) },
431 { qcom_board_id(IPQ6005) },
432 { qcom_board_id(QRB5165) },
433 { qcom_board_id(SM8450) },
434 { qcom_board_id(SM7225) },
435 { qcom_board_id(SA8295P) },
436 { qcom_board_id(SA8540P) },
437 { qcom_board_id(QCM4290) },
438 { qcom_board_id(QCS4290) },
439 { qcom_board_id_named(SM8450_2, "SM8450") },
440 { qcom_board_id_named(SM8450_3, "SM8450") },
441 { qcom_board_id(SC7280) },
442 { qcom_board_id(SC7180P) },
443 { qcom_board_id(SM6375) },
444 { qcom_board_id(SM8550) },
445 { qcom_board_id(QRU1000) },
446 { qcom_board_id(QDU1000) },
447 { qcom_board_id(QDU1010) },
448 { qcom_board_id(QRU1032) },
449 { qcom_board_id(QRU1052) },
450 { qcom_board_id(QRU1062) },
451 { qcom_board_id(IPQ5332) },
452 { qcom_board_id(IPQ5322) },
453 };
454
socinfo_machine(struct device * dev,unsigned int id)455 static const char *socinfo_machine(struct device *dev, unsigned int id)
456 {
457 int idx;
458
459 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
460 if (soc_id[idx].id == id)
461 return soc_id[idx].name;
462 }
463
464 return NULL;
465 }
466
467 #ifdef CONFIG_DEBUG_FS
468
469 #define QCOM_OPEN(name, _func) \
470 static int qcom_open_##name(struct inode *inode, struct file *file) \
471 { \
472 return single_open(file, _func, inode->i_private); \
473 } \
474 \
475 static const struct file_operations qcom_ ##name## _ops = { \
476 .open = qcom_open_##name, \
477 .read = seq_read, \
478 .llseek = seq_lseek, \
479 .release = single_release, \
480 }
481
482 #define DEBUGFS_ADD(info, name) \
483 debugfs_create_file(__stringify(name), 0444, \
484 qcom_socinfo->dbg_root, \
485 info, &qcom_ ##name## _ops)
486
487
qcom_show_build_id(struct seq_file * seq,void * p)488 static int qcom_show_build_id(struct seq_file *seq, void *p)
489 {
490 struct socinfo *socinfo = seq->private;
491
492 seq_printf(seq, "%s\n", socinfo->build_id);
493
494 return 0;
495 }
496
qcom_show_pmic_model(struct seq_file * seq,void * p)497 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
498 {
499 struct socinfo *socinfo = seq->private;
500 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
501
502 if (model < 0)
503 return -EINVAL;
504
505 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
506 seq_printf(seq, "%s\n", pmic_models[model]);
507 else
508 seq_printf(seq, "unknown (%d)\n", model);
509
510 return 0;
511 }
512
qcom_show_pmic_model_array(struct seq_file * seq,void * p)513 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p)
514 {
515 struct socinfo *socinfo = seq->private;
516 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics);
517 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset);
518 int i;
519 void *ptr = socinfo;
520
521 ptr += pmic_array_offset;
522
523 /* No need for bounds checking, it happened at socinfo_debugfs_init */
524 for (i = 0; i < num_pmics; i++) {
525 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32)));
526 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32));
527
528 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
529 seq_printf(seq, "%s %u.%u\n", pmic_models[model],
530 SOCINFO_MAJOR(die_rev),
531 SOCINFO_MINOR(die_rev));
532 else
533 seq_printf(seq, "unknown (%d)\n", model);
534 }
535
536 return 0;
537 }
538
qcom_show_pmic_die_revision(struct seq_file * seq,void * p)539 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
540 {
541 struct socinfo *socinfo = seq->private;
542
543 seq_printf(seq, "%u.%u\n",
544 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
545 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
546
547 return 0;
548 }
549
qcom_show_chip_id(struct seq_file * seq,void * p)550 static int qcom_show_chip_id(struct seq_file *seq, void *p)
551 {
552 struct socinfo *socinfo = seq->private;
553
554 seq_printf(seq, "%s\n", socinfo->chip_id);
555
556 return 0;
557 }
558
559 QCOM_OPEN(build_id, qcom_show_build_id);
560 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
561 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array);
562 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
563 QCOM_OPEN(chip_id, qcom_show_chip_id);
564
565 #define DEFINE_IMAGE_OPS(type) \
566 static int show_image_##type(struct seq_file *seq, void *p) \
567 { \
568 struct smem_image_version *image_version = seq->private; \
569 if (image_version->type[0] != '\0') \
570 seq_printf(seq, "%s\n", image_version->type); \
571 return 0; \
572 } \
573 static int open_image_##type(struct inode *inode, struct file *file) \
574 { \
575 return single_open(file, show_image_##type, inode->i_private); \
576 } \
577 \
578 static const struct file_operations qcom_image_##type##_ops = { \
579 .open = open_image_##type, \
580 .read = seq_read, \
581 .llseek = seq_lseek, \
582 .release = single_release, \
583 }
584
585 DEFINE_IMAGE_OPS(name);
586 DEFINE_IMAGE_OPS(variant);
587 DEFINE_IMAGE_OPS(oem);
588
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)589 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
590 struct socinfo *info, size_t info_size)
591 {
592 struct smem_image_version *versions;
593 struct dentry *dentry;
594 size_t size;
595 int i;
596 unsigned int num_pmics;
597 unsigned int pmic_array_offset;
598
599 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
600
601 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
602
603 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root,
604 &qcom_socinfo->info.fmt);
605
606 switch (qcom_socinfo->info.fmt) {
607 case SOCINFO_VERSION(0, 17):
608 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant);
609 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root,
610 &qcom_socinfo->info.oem_variant);
611 fallthrough;
612 case SOCINFO_VERSION(0, 16):
613 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code);
614 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode);
615
616 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root,
617 &qcom_socinfo->info.feature_code);
618 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root,
619 &qcom_socinfo->info.pcode);
620 fallthrough;
621 case SOCINFO_VERSION(0, 15):
622 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
623
624 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root,
625 &qcom_socinfo->info.nmodem_supported);
626 fallthrough;
627 case SOCINFO_VERSION(0, 14):
628 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
629 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
630 qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts);
631 qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset);
632
633 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root,
634 &qcom_socinfo->info.num_clusters);
635 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root,
636 &qcom_socinfo->info.ncluster_array_offset);
637 debugfs_create_u32("num_defective_parts", 0444, qcom_socinfo->dbg_root,
638 &qcom_socinfo->info.num_defective_parts);
639 debugfs_create_u32("ndefective_parts_array_offset", 0444, qcom_socinfo->dbg_root,
640 &qcom_socinfo->info.ndefective_parts_array_offset);
641 fallthrough;
642 case SOCINFO_VERSION(0, 13):
643 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
644
645 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root,
646 &qcom_socinfo->info.nproduct_id);
647 DEBUGFS_ADD(info, chip_id);
648 fallthrough;
649 case SOCINFO_VERSION(0, 12):
650 qcom_socinfo->info.chip_family =
651 __le32_to_cpu(info->chip_family);
652 qcom_socinfo->info.raw_device_family =
653 __le32_to_cpu(info->raw_device_family);
654 qcom_socinfo->info.raw_device_num =
655 __le32_to_cpu(info->raw_device_num);
656
657 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root,
658 &qcom_socinfo->info.chip_family);
659 debugfs_create_x32("raw_device_family", 0444,
660 qcom_socinfo->dbg_root,
661 &qcom_socinfo->info.raw_device_family);
662 debugfs_create_x32("raw_device_number", 0444,
663 qcom_socinfo->dbg_root,
664 &qcom_socinfo->info.raw_device_num);
665 fallthrough;
666 case SOCINFO_VERSION(0, 11):
667 num_pmics = le32_to_cpu(info->num_pmics);
668 pmic_array_offset = le32_to_cpu(info->pmic_array_offset);
669 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size)
670 DEBUGFS_ADD(info, pmic_model_array);
671 fallthrough;
672 case SOCINFO_VERSION(0, 10):
673 case SOCINFO_VERSION(0, 9):
674 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
675
676 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root,
677 &qcom_socinfo->info.foundry_id);
678 fallthrough;
679 case SOCINFO_VERSION(0, 8):
680 case SOCINFO_VERSION(0, 7):
681 DEBUGFS_ADD(info, pmic_model);
682 DEBUGFS_ADD(info, pmic_die_rev);
683 fallthrough;
684 case SOCINFO_VERSION(0, 6):
685 qcom_socinfo->info.hw_plat_subtype =
686 __le32_to_cpu(info->hw_plat_subtype);
687
688 debugfs_create_u32("hardware_platform_subtype", 0444,
689 qcom_socinfo->dbg_root,
690 &qcom_socinfo->info.hw_plat_subtype);
691 fallthrough;
692 case SOCINFO_VERSION(0, 5):
693 qcom_socinfo->info.accessory_chip =
694 __le32_to_cpu(info->accessory_chip);
695
696 debugfs_create_u32("accessory_chip", 0444,
697 qcom_socinfo->dbg_root,
698 &qcom_socinfo->info.accessory_chip);
699 fallthrough;
700 case SOCINFO_VERSION(0, 4):
701 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
702
703 debugfs_create_u32("platform_version", 0444,
704 qcom_socinfo->dbg_root,
705 &qcom_socinfo->info.plat_ver);
706 fallthrough;
707 case SOCINFO_VERSION(0, 3):
708 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
709
710 debugfs_create_u32("hardware_platform", 0444,
711 qcom_socinfo->dbg_root,
712 &qcom_socinfo->info.hw_plat);
713 fallthrough;
714 case SOCINFO_VERSION(0, 2):
715 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver);
716
717 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root,
718 &qcom_socinfo->info.raw_ver);
719 fallthrough;
720 case SOCINFO_VERSION(0, 1):
721 DEBUGFS_ADD(info, build_id);
722 break;
723 }
724
725 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
726 &size);
727
728 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
729 if (!socinfo_image_names[i])
730 continue;
731
732 dentry = debugfs_create_dir(socinfo_image_names[i],
733 qcom_socinfo->dbg_root);
734 debugfs_create_file("name", 0444, dentry, &versions[i],
735 &qcom_image_name_ops);
736 debugfs_create_file("variant", 0444, dentry, &versions[i],
737 &qcom_image_variant_ops);
738 debugfs_create_file("oem", 0444, dentry, &versions[i],
739 &qcom_image_oem_ops);
740 }
741 }
742
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)743 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
744 {
745 debugfs_remove_recursive(qcom_socinfo->dbg_root);
746 }
747 #else
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)748 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
749 struct socinfo *info, size_t info_size)
750 {
751 }
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)752 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { }
753 #endif /* CONFIG_DEBUG_FS */
754
qcom_socinfo_probe(struct platform_device * pdev)755 static int qcom_socinfo_probe(struct platform_device *pdev)
756 {
757 struct qcom_socinfo *qs;
758 struct socinfo *info;
759 size_t item_size;
760
761 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
762 &item_size);
763 if (IS_ERR(info)) {
764 dev_err(&pdev->dev, "Couldn't find socinfo\n");
765 return PTR_ERR(info);
766 }
767
768 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
769 if (!qs)
770 return -ENOMEM;
771
772 qs->attr.family = "Snapdragon";
773 qs->attr.machine = socinfo_machine(&pdev->dev,
774 le32_to_cpu(info->id));
775 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
776 le32_to_cpu(info->id));
777 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
778 SOCINFO_MAJOR(le32_to_cpu(info->ver)),
779 SOCINFO_MINOR(le32_to_cpu(info->ver)));
780 if (offsetof(struct socinfo, serial_num) <= item_size)
781 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
782 "%u",
783 le32_to_cpu(info->serial_num));
784
785 qs->soc_dev = soc_device_register(&qs->attr);
786 if (IS_ERR(qs->soc_dev))
787 return PTR_ERR(qs->soc_dev);
788
789 socinfo_debugfs_init(qs, info, item_size);
790
791 /* Feed the soc specific unique data into entropy pool */
792 add_device_randomness(info, item_size);
793
794 platform_set_drvdata(pdev, qs);
795
796 return 0;
797 }
798
qcom_socinfo_remove(struct platform_device * pdev)799 static int qcom_socinfo_remove(struct platform_device *pdev)
800 {
801 struct qcom_socinfo *qs = platform_get_drvdata(pdev);
802
803 soc_device_unregister(qs->soc_dev);
804
805 socinfo_debugfs_exit(qs);
806
807 return 0;
808 }
809
810 static struct platform_driver qcom_socinfo_driver = {
811 .probe = qcom_socinfo_probe,
812 .remove = qcom_socinfo_remove,
813 .driver = {
814 .name = "qcom-socinfo",
815 },
816 };
817
818 module_platform_driver(qcom_socinfo_driver);
819
820 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
821 MODULE_LICENSE("GPL v2");
822 MODULE_ALIAS("platform:qcom-socinfo");
823