1 /* 2 3 Copyright (c) 2009-2020 ARM Limited. All rights reserved. 4 5 SPDX-License-Identifier: Apache-2.0 6 7 Licensed under the Apache License, Version 2.0 (the License); you may 8 not use this file except in compliance with the License. 9 You may obtain a copy of the License at 10 11 www.apache.org/licenses/LICENSE-2.0 12 13 Unless required by applicable law or agreed to in writing, software 14 distributed under the License is distributed on an AS IS BASIS, WITHOUT 15 WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16 See the License for the specific language governing permissions and 17 limitations under the License. 18 19 NOTICE: This file has been modified by Nordic Semiconductor ASA. 20 21 */ 22 23 /* NOTE: Template files (including this one) are application specific and therefore expected to 24 be copied into the application project folder prior to its use! */ 25 26 #include <stdint.h> 27 #include <stdbool.h> 28 #include "nrf.h" 29 #include "nrf_erratas.h" 30 #include "system_nrf52805.h" 31 32 /*lint ++flb "Enter library region" */ 33 34 #define __SYSTEM_CLOCK_64M (64000000UL) 35 36 #if defined ( __CC_ARM ) 37 uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; 38 #elif defined ( __ICCARM__ ) 39 __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M; 40 #elif defined ( __GNUC__ ) 41 uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; 42 #endif 43 SystemCoreClockUpdate(void)44void SystemCoreClockUpdate(void) 45 { 46 SystemCoreClock = __SYSTEM_CLOCK_64M; 47 } 48 SystemInit(void)49void SystemInit(void) 50 { 51 /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document 52 for your device located at https://infocenter.nordicsemi.com/index.jsp */ 53 if (nrf52_errata_31()){ 54 *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13; 55 } 56 57 /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document 58 for your device located at https://infocenter.nordicsemi.com/index.jsp */ 59 if (nrf52_errata_36()){ 60 NRF_CLOCK->EVENTS_DONE = 0; 61 NRF_CLOCK->EVENTS_CTTO = 0; 62 NRF_CLOCK->CTIV = 0; 63 } 64 65 /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document 66 for your device located at https://infocenter.nordicsemi.com/index.jsp */ 67 if (nrf52_errata_66()){ 68 NRF_TEMP->A0 = NRF_FICR->TEMP.A0; 69 NRF_TEMP->A1 = NRF_FICR->TEMP.A1; 70 NRF_TEMP->A2 = NRF_FICR->TEMP.A2; 71 NRF_TEMP->A3 = NRF_FICR->TEMP.A3; 72 NRF_TEMP->A4 = NRF_FICR->TEMP.A4; 73 NRF_TEMP->A5 = NRF_FICR->TEMP.A5; 74 NRF_TEMP->B0 = NRF_FICR->TEMP.B0; 75 NRF_TEMP->B1 = NRF_FICR->TEMP.B1; 76 NRF_TEMP->B2 = NRF_FICR->TEMP.B2; 77 NRF_TEMP->B3 = NRF_FICR->TEMP.B3; 78 NRF_TEMP->B4 = NRF_FICR->TEMP.B4; 79 NRF_TEMP->B5 = NRF_FICR->TEMP.B5; 80 NRF_TEMP->T0 = NRF_FICR->TEMP.T0; 81 NRF_TEMP->T1 = NRF_FICR->TEMP.T1; 82 NRF_TEMP->T2 = NRF_FICR->TEMP.T2; 83 NRF_TEMP->T3 = NRF_FICR->TEMP.T3; 84 NRF_TEMP->T4 = NRF_FICR->TEMP.T4; 85 } 86 87 /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document 88 for your device located at https://infocenter.nordicsemi.com/index.jsp */ 89 if (nrf52_errata_136()){ 90 if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){ 91 NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk; 92 } 93 } 94 95 /* Workaround for Errata 217 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document 96 for your device located at https://infocenter.nordicsemi.com/index.jsp */ 97 if (nrf52_errata_217()){ 98 *(volatile uint32_t *)0x40000EE4ul |= 0x0000000Ful; 99 } 100 101 /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not 102 defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be 103 reserved for PinReset and not available as normal GPIO. */ 104 #if defined (CONFIG_GPIO_AS_PINRESET) 105 106 #define RESET_PIN 21 107 108 if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) || 109 ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){ 110 NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; 111 while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} 112 NRF_UICR->PSELRESET[0] = RESET_PIN; 113 while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} 114 NRF_UICR->PSELRESET[1] = RESET_PIN; 115 while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} 116 NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; 117 while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} 118 NVIC_SystemReset(); 119 } 120 #endif 121 122 SystemCoreClockUpdate(); 123 } 124 125 126 /*lint --flb "Leave library region" */ 127