1 /*
2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include "hardware/flash.h"
8 #include "pico/bootrom.h"
9
10 #include "hardware/structs/ssi.h"
11 #include "hardware/structs/ioqspi.h"
12
13 #define FLASH_BLOCK_ERASE_CMD 0xd8
14
15 // Standard RUID instruction: 4Bh command prefix, 32 dummy bits, 64 data bits.
16 #define FLASH_RUID_CMD 0x4b
17 #define FLASH_RUID_DUMMY_BYTES 4
18 #define FLASH_RUID_DATA_BYTES 8
19 #define FLASH_RUID_TOTAL_BYTES (1 + FLASH_RUID_DUMMY_BYTES + FLASH_RUID_DATA_BYTES)
20
21 #define __compiler_barrier() asm volatile("" ::: "memory")
22
23 //-----------------------------------------------------------------------------
24 // Infrastructure for reentering XIP mode after exiting for programming (take
25 // a copy of boot2 before XIP exit). Calling boot2 as a function works because
26 // it accepts a return vector in LR (and doesn't trash r4-r7). Bootrom passes
27 // NULL in LR, instructing boot2 to enter flash vector table's reset handler.
28
29 #if !PICO_NO_FLASH
30
31 #define BOOT2_SIZE_WORDS 64
32
33 static uint32_t boot2_copyout[BOOT2_SIZE_WORDS];
34 static bool boot2_copyout_valid = false;
35
__no_inline_not_in_flash_func(flash_init_boot2_copyout)36 static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {
37 if (boot2_copyout_valid)
38 return;
39 for (int i = 0; i < BOOT2_SIZE_WORDS; ++i)
40 boot2_copyout[i] = ((uint32_t *)XIP_BASE)[i];
41 __compiler_barrier();
42 boot2_copyout_valid = true;
43 }
44
__no_inline_not_in_flash_func(flash_enable_xip_via_boot2)45 static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) {
46 ((void (*)(void))boot2_copyout+1)();
47 }
48
49 #else
50
__no_inline_not_in_flash_func(flash_init_boot2_copyout)51 static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {}
52
__no_inline_not_in_flash_func(flash_enable_xip_via_boot2)53 static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) {
54 // Set up XIP for 03h read on bus access (slow but generic)
55 void (*flash_enter_cmd_xip)(void) = (void(*)(void))rom_func_lookup(rom_table_code('C', 'X'));
56 assert(flash_enter_cmd_xip);
57 flash_enter_cmd_xip();
58 }
59
60 #endif
61
62 //-----------------------------------------------------------------------------
63 // Actual flash programming shims (work whether or not PICO_NO_FLASH==1)
64
__no_inline_not_in_flash_func(flash_range_erase)65 void __no_inline_not_in_flash_func(flash_range_erase)(uint32_t flash_offs, size_t count) {
66 #ifdef PICO_FLASH_SIZE_BYTES
67 hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
68 #endif
69 invalid_params_if(FLASH, flash_offs & (FLASH_SECTOR_SIZE - 1));
70 invalid_params_if(FLASH, count & (FLASH_SECTOR_SIZE - 1));
71 void (*connect_internal_flash)(void) = (void(*)(void))rom_func_lookup(rom_table_code('I', 'F'));
72 void (*flash_exit_xip)(void) = (void(*)(void))rom_func_lookup(rom_table_code('E', 'X'));
73 void (*flash_range_erase)(uint32_t, size_t, uint32_t, uint8_t) =
74 (void(*)(uint32_t, size_t, uint32_t, uint8_t))rom_func_lookup(rom_table_code('R', 'E'));
75 void (*flash_flush_cache)(void) = (void(*)(void))rom_func_lookup(rom_table_code('F', 'C'));
76 assert(connect_internal_flash && flash_exit_xip && flash_range_erase && flash_flush_cache);
77 flash_init_boot2_copyout();
78
79 // No flash accesses after this point
80 __compiler_barrier();
81
82 connect_internal_flash();
83 flash_exit_xip();
84 flash_range_erase(flash_offs, count, FLASH_BLOCK_SIZE, FLASH_BLOCK_ERASE_CMD);
85 flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing
86 flash_enable_xip_via_boot2();
87 }
88
__no_inline_not_in_flash_func(flash_range_program)89 void __no_inline_not_in_flash_func(flash_range_program)(uint32_t flash_offs, const uint8_t *data, size_t count) {
90 #ifdef PICO_FLASH_SIZE_BYTES
91 hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
92 #endif
93 invalid_params_if(FLASH, flash_offs & (FLASH_PAGE_SIZE - 1));
94 invalid_params_if(FLASH, count & (FLASH_PAGE_SIZE - 1));
95 void (*connect_internal_flash)(void) = (void(*)(void))rom_func_lookup(rom_table_code('I', 'F'));
96 void (*flash_exit_xip)(void) = (void(*)(void))rom_func_lookup(rom_table_code('E', 'X'));
97 void (*flash_range_program)(uint32_t, const uint8_t*, size_t) =
98 (void(*)(uint32_t, const uint8_t*, size_t))rom_func_lookup(rom_table_code('R', 'P'));
99 void (*flash_flush_cache)(void) = (void(*)(void))rom_func_lookup(rom_table_code('F', 'C'));
100 assert(connect_internal_flash && flash_exit_xip && flash_range_program && flash_flush_cache);
101 flash_init_boot2_copyout();
102
103 __compiler_barrier();
104
105 connect_internal_flash();
106 flash_exit_xip();
107 flash_range_program(flash_offs, data, count);
108 flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing
109 flash_enable_xip_via_boot2();
110 }
111
112 //-----------------------------------------------------------------------------
113 // Lower-level flash access functions
114
115 #if !PICO_NO_FLASH
116 // Bitbanging the chip select using IO overrides, in case RAM-resident IRQs
117 // are still running, and the FIFO bottoms out. (the bootrom does the same)
__no_inline_not_in_flash_func(flash_cs_force)118 static void __no_inline_not_in_flash_func(flash_cs_force)(bool high) {
119 uint32_t field_val = high ?
120 IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_HIGH :
121 IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_LOW;
122 hw_write_masked(&ioqspi_hw->io[1].ctrl,
123 field_val << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB,
124 IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS
125 );
126 }
127
128 // May want to expose this at some point but this is unlikely to be the right
129 // interface to do so. Keep it static
__no_inline_not_in_flash_func(flash_do_cmd)130 static void __no_inline_not_in_flash_func(flash_do_cmd)(const uint8_t *txbuf, uint8_t *rxbuf, size_t count) {
131 void (*connect_internal_flash)(void) = (void(*)(void))rom_func_lookup(rom_table_code('I', 'F'));
132 void (*flash_exit_xip)(void) = (void(*)(void))rom_func_lookup(rom_table_code('E', 'X'));
133 void (*flash_flush_cache)(void) = (void(*)(void))rom_func_lookup(rom_table_code('F', 'C'));
134 assert(connect_internal_flash && flash_exit_xip && flash_flush_cache);
135 flash_init_boot2_copyout();
136 __compiler_barrier();
137 connect_internal_flash();
138 flash_exit_xip();
139
140 flash_cs_force(0);
141 size_t tx_remaining = count;
142 size_t rx_remaining = count;
143 // We may be interrupted -- don't want FIFO to overflow if we're distracted.
144 const size_t max_in_flight = 16 - 2;
145 while (tx_remaining || rx_remaining) {
146 uint32_t flags = ssi_hw->sr;
147 bool can_put = !!(flags & SSI_SR_TFNF_BITS);
148 bool can_get = !!(flags & SSI_SR_RFNE_BITS);
149 if (can_put && tx_remaining && rx_remaining - tx_remaining < max_in_flight) {
150 ssi_hw->dr0 = *txbuf++;
151 --tx_remaining;
152 }
153 if (can_get && rx_remaining) {
154 *rxbuf++ = ssi_hw->dr0;
155 --rx_remaining;
156 }
157 }
158 flash_cs_force(1);
159
160 flash_flush_cache();
161 flash_enable_xip_via_boot2();
162 }
163 #endif
164
165 // Use standard RUID command to get a unique identifier for the flash (and
166 // hence the board)
167
168 static_assert(FLASH_UNIQUE_ID_SIZE_BYTES == FLASH_RUID_DATA_BYTES, "");
169
flash_get_unique_id(uint8_t * id_out)170 void flash_get_unique_id(uint8_t *id_out) {
171 #if PICO_NO_FLASH
172 panic_unsupported();
173 #else
174 uint8_t txbuf[FLASH_RUID_TOTAL_BYTES] = {0};
175 uint8_t rxbuf[FLASH_RUID_TOTAL_BYTES] = {0};
176 txbuf[0] = FLASH_RUID_CMD;
177 flash_do_cmd(txbuf, rxbuf, FLASH_RUID_TOTAL_BYTES);
178 for (int i = 0; i < FLASH_RUID_DATA_BYTES; i++)
179 id_out[i] = rxbuf[i + 1 + FLASH_RUID_DUMMY_BYTES];
180 #endif
181 }
182