1 /**
2 ******************************************************************************
3 * @file stm32f4xx_cec.c
4 * @author MCD Application Team
5 * @version V1.5.1
6 * @date 22-May-2015
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Consumer Electronics Control (CEC) peripheral
9 * applicable only on STM32F446xx devices:
10 * + Initialization and Configuration
11 * + Data transfers functions
12 * + Interrupts and flags management
13 *
14 * @verbatim
15 ==============================================================================
16 ##### CEC features #####
17 ==============================================================================
18 [..] This device provides some features:
19 (#) Supports HDMI-CEC specification 1.4.
20 (#) Supports two source clocks(HSI/244 or LSE).
21 (#) Works in stop mode(without APB clock, but with CEC clock 32KHz).
22 It can genarate an interrupt in the CEC clock domain that the CPU
23 wakes up from the low power mode.
24 (#) Configurable Signal Free Time before of transmission start. The
25 number of nominal data bit periods waited before transmission can be
26 ruled by Hardware or Software.
27 (#) Configurable Peripheral Address (multi-addressing configuration).
28 (#) Supports listen mode.The CEC Messages addressed to different destination
29 can be received without interfering with CEC bus when Listen mode option is enabled.
30 (#) Configurable Rx-Tolerance(Standard and Extended tolerance margin).
31 (#) Error detection with configurable error bit generation.
32 (#) Arbitration lost error in the case of two CEC devices starting at the same time.
33
34 ##### How to use this driver #####
35 ==============================================================================
36 [..] This driver provides functions to configure and program the CEC device,
37 follow steps below:
38 (#) The source clock can be configured using:
39 (++) RCC_CECCLKConfig(RCC_CECCLK_HSI_Div244) for HSI(Default)
40 (++) RCC_CECCLKConfig(RCC_CECCLK_LSE) for LSE.
41 (#) Enable CEC peripheral clock using RCC_APBPeriphClockCmd(RCC_APBPeriph_CEC, ENABLE).
42 (#) Peripherals alternate function.
43 (++) Connect the pin to the desired peripherals' Alternate Function (AF) using
44 GPIO_PinAFConfig() function.
45 (++) Configure the desired pin in alternate function by:
46 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF.
47 (++) Select the type open-drain and output speed via GPIO_OType
48 and GPIO_Speed members.
49 (++) Call GPIO_Init() function.
50 (#) Configure the Signal Free Time, Rx Tolerance, Stop reception generation
51 and Bit error generation using the CEC_Init() function.
52 The function CEC_Init() must be called when the CEC peripheral is disabled.
53 (#) Configure the CEC own address by calling the fuction CEC_OwnAddressConfig().
54 (#) Optionally, you can configure the Listen mode using the function CEC_ListenModeCmd().
55 (#) Enable the NVIC and the corresponding interrupt using the function
56 CEC_ITConfig() if you need to use interrupt mode.
57 CEC_ITConfig() must be called before enabling the CEC peripheral.
58 (#) Enable the CEC using the CEC_Cmd() function.
59 (#) Charge the first data byte in the TXDR register using CEC_SendDataByte().
60 (#) Enable the transmission of the Byte of a CEC message using CEC_StartOfMessage()
61 (#) Transmit single data through the CEC peripheral using CEC_SendDataByte()
62 and Receive the last transmitted byte using CEC_ReceiveDataByte().
63 (#) Enable the CEC_EndOfMessage() in order to indicate the last byte of the message.
64 [..]
65 (@) If the listen mode is enabled, Stop reception generation and Bit error generation
66 must be in reset state.
67 (@) If the CEC message consists of only 1 byte, the function CEC_EndOfMessage()
68 must be called before CEC_StartOfMessage().
69
70 @endverbatim
71 *
72 ******************************************************************************
73 * @attention
74 *
75 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
76 *
77 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
78 * You may not use this file except in compliance with the License.
79 * You may obtain a copy of the License at:
80 *
81 * http://www.st.com/software_license_agreement_liberty_v2
82 *
83 * Unless required by applicable law or agreed to in writing, software
84 * distributed under the License is distributed on an "AS IS" BASIS,
85 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
86 * See the License for the specific language governing permissions and
87 * limitations under the License.
88 *
89 ******************************************************************************
90 */
91
92 /* Includes ------------------------------------------------------------------*/
93 #include "stm32f4xx_cec.h"
94 #include "stm32f4xx_rcc.h"
95
96 /** @addtogroup STM32F4xx_StdPeriph_Driver
97 * @{
98 */
99
100 /** @defgroup CEC
101 * @brief CEC driver modules
102 * @{
103 */
104
105 #if defined(STM32F446xx)
106 /* Private typedef -----------------------------------------------------------*/
107 /* Private define ------------------------------------------------------------*/
108 #define BROADCAST_ADDRESS ((uint32_t)0x0000F)
109 #define CFGR_CLEAR_MASK ((uint32_t)0x7000FE00) /* CFGR register Mask */
110
111 /* Private macro -------------------------------------------------------------*/
112 /* Private variables ---------------------------------------------------------*/
113 /* Private function prototypes -----------------------------------------------*/
114 /* Private functions ---------------------------------------------------------*/
115
116 /** @defgroup CEC_Private_Functions
117 * @{
118 */
119
120 /** @defgroup CEC_Group1 Initialization and Configuration functions
121 * @brief Initialization and Configuration functions
122 *
123 @verbatim
124 ===============================================================================
125 ##### Initialization and Configuration functions #####
126 ===============================================================================
127 [..] This section provides functions allowing to initialize:
128 (+) CEC own addresses
129 (+) CEC Signal Free Time
130 (+) CEC Rx Tolerance
131 (+) CEC Stop Reception
132 (+) CEC Bit Rising Error
133 (+) CEC Long Bit Period Error
134 [..] This section provides also a function to configure the CEC peripheral in Listen Mode.
135 Messages addressed to different destination can be received when Listen mode is
136 enabled without interfering with CEC bus.
137 @endverbatim
138 * @{
139 */
140
141 /**
142 * @brief Deinitializes the CEC peripheral registers to their default reset values.
143 * @param None
144 * @retval None
145 */
CEC_DeInit(void)146 void CEC_DeInit(void)
147 {
148 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE);
149 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE);
150 }
151
152 /**
153 * @brief Initializes the CEC peripheral according to the specified parameters
154 * in the CEC_InitStruct.
155 * @note The CEC parameters must be configured before enabling the CEC peripheral.
156 * @param CEC_InitStruct: pointer to an CEC_InitTypeDef structure that contains
157 * the configuration information for the specified CEC peripheral.
158 * @retval None
159 */
CEC_Init(CEC_InitTypeDef * CEC_InitStruct)160 void CEC_Init(CEC_InitTypeDef* CEC_InitStruct)
161 {
162 uint32_t tmpreg = 0;
163
164 /* Check the parameters */
165 assert_param(IS_CEC_SIGNAL_FREE_TIME(CEC_InitStruct->CEC_SignalFreeTime));
166 assert_param(IS_CEC_RX_TOLERANCE(CEC_InitStruct->CEC_RxTolerance));
167 assert_param(IS_CEC_STOP_RECEPTION(CEC_InitStruct->CEC_StopReception));
168 assert_param(IS_CEC_BIT_RISING_ERROR(CEC_InitStruct->CEC_BitRisingError));
169 assert_param(IS_CEC_LONG_BIT_PERIOD_ERROR(CEC_InitStruct->CEC_LongBitPeriodError));
170 assert_param(IS_CEC_BDR_NO_GEN_ERROR(CEC_InitStruct->CEC_BRDNoGen));
171 assert_param(IS_CEC_SFT_OPTION(CEC_InitStruct->CEC_SFTOption));
172
173 /* Get the CEC CFGR value */
174 tmpreg = CEC->CFGR;
175
176 /* Clear CFGR bits */
177 tmpreg &= CFGR_CLEAR_MASK;
178
179 /* Configure the CEC peripheral */
180 tmpreg |= (CEC_InitStruct->CEC_SignalFreeTime | CEC_InitStruct->CEC_RxTolerance |
181 CEC_InitStruct->CEC_StopReception | CEC_InitStruct->CEC_BitRisingError |
182 CEC_InitStruct->CEC_LongBitPeriodError| CEC_InitStruct->CEC_BRDNoGen |
183 CEC_InitStruct->CEC_SFTOption);
184
185 /* Write to CEC CFGR register */
186 CEC->CFGR = tmpreg;
187 }
188
189 /**
190 * @brief Fills each CEC_InitStruct member with its default value.
191 * @param CEC_InitStruct: pointer to a CEC_InitTypeDef structure which will
192 * be initialized.
193 * @retval None
194 */
CEC_StructInit(CEC_InitTypeDef * CEC_InitStruct)195 void CEC_StructInit(CEC_InitTypeDef* CEC_InitStruct)
196 {
197 CEC_InitStruct->CEC_SignalFreeTime = CEC_SignalFreeTime_Standard;
198 CEC_InitStruct->CEC_RxTolerance = CEC_RxTolerance_Standard;
199 CEC_InitStruct->CEC_StopReception = CEC_StopReception_Off;
200 CEC_InitStruct->CEC_BitRisingError = CEC_BitRisingError_Off;
201 CEC_InitStruct->CEC_LongBitPeriodError = CEC_LongBitPeriodError_Off;
202 CEC_InitStruct->CEC_BRDNoGen = CEC_BRDNoGen_Off;
203 CEC_InitStruct->CEC_SFTOption = CEC_SFTOption_Off;
204 }
205
206 /**
207 * @brief Enables or disables the CEC peripheral.
208 * @param NewState: new state of the CEC peripheral.
209 * This parameter can be: ENABLE or DISABLE.
210 * @retval None
211 */
CEC_Cmd(FunctionalState NewState)212 void CEC_Cmd(FunctionalState NewState)
213 {
214 assert_param(IS_FUNCTIONAL_STATE(NewState));
215
216 if (NewState != DISABLE)
217 {
218 /* Enable the CEC peripheral */
219 CEC->CR |= CEC_CR_CECEN;
220 }
221 else
222 {
223 /* Disable the CEC peripheral */
224 CEC->CR &= ~CEC_CR_CECEN;
225 }
226 }
227
228 /**
229 * @brief Enables or disables the CEC Listen Mode.
230 * @param NewState: new state of the Listen Mode.
231 * This parameter can be: ENABLE or DISABLE.
232 * @retval None
233 */
CEC_ListenModeCmd(FunctionalState NewState)234 void CEC_ListenModeCmd(FunctionalState NewState)
235 {
236 assert_param(IS_FUNCTIONAL_STATE(NewState));
237
238 if (NewState != DISABLE)
239 {
240 /* Enable the Listen Mode */
241 CEC->CFGR |= CEC_CFGR_LSTN;
242 }
243 else
244 {
245 /* Disable the Listen Mode */
246 CEC->CFGR &= ~CEC_CFGR_LSTN;
247 }
248 }
249
250 /**
251 * @brief Defines the Own Address of the CEC device.
252 * @param CEC_OwnAddress: The CEC own address.
253 * @retval None
254 */
CEC_OwnAddressConfig(uint8_t CEC_OwnAddress)255 void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress)
256 {
257 uint32_t tmp =0x00;
258 /* Check the parameters */
259 assert_param(IS_CEC_ADDRESS(CEC_OwnAddress));
260 tmp = 1 <<(CEC_OwnAddress + 16);
261 /* Set the CEC own address */
262 CEC->CFGR |= tmp;
263 }
264
265 /**
266 * @brief Clears the Own Address of the CEC device.
267 * @param CEC_OwnAddress: The CEC own address.
268 * @retval None
269 */
CEC_OwnAddressClear(void)270 void CEC_OwnAddressClear(void)
271 {
272 /* Set the CEC own address */
273 CEC->CFGR = 0x0;
274 }
275
276 /**
277 * @}
278 */
279
280 /** @defgroup CEC_Group2 Data transfers functions
281 * @brief Data transfers functions
282 *
283 @verbatim
284 ===============================================================================
285 ##### Data transfers functions #####
286 ===============================================================================
287 [..] This section provides functions allowing the CEC data transfers.The read
288 access of the CEC_RXDR register can be done using the CEC_ReceiveData()function
289 and returns the Rx buffered value. Whereas a write access to the CEC_TXDR can be
290 done using CEC_SendData() function.
291 @endverbatim
292 * @{
293 */
294
295 /**
296 * @brief Transmits single data through the CEC peripheral.
297 * @param Data: the data to transmit.
298 * @retval None
299 */
CEC_SendData(uint8_t Data)300 void CEC_SendData(uint8_t Data)
301 {
302 /* Transmit Data */
303 CEC->TXDR = Data;
304 }
305
306 /**
307 * @brief Returns the most recent received data by the CEC peripheral.
308 * @param None
309 * @retval The received data.
310 */
CEC_ReceiveData(void)311 uint8_t CEC_ReceiveData(void)
312 {
313 /* Receive Data */
314 return (uint8_t)(CEC->RXDR);
315 }
316
317 /**
318 * @brief Starts a new message.
319 * @param None
320 * @retval None
321 */
CEC_StartOfMessage(void)322 void CEC_StartOfMessage(void)
323 {
324 /* Starts of new message */
325 CEC->CR |= CEC_CR_TXSOM;
326 }
327
328 /**
329 * @brief Transmits message with an EOM bit.
330 * @param None
331 * @retval None
332 */
CEC_EndOfMessage(void)333 void CEC_EndOfMessage(void)
334 {
335 /* The data byte will be transmitted with an EOM bit */
336 CEC->CR |= CEC_CR_TXEOM;
337 }
338
339 /**
340 * @}
341 */
342
343 /** @defgroup CEC_Group3 Interrupts and flags management functions
344 * @brief Interrupts and flags management functions
345 *
346 @verbatim
347 ===============================================================================
348 ##### Interrupts and flags management functions #####
349 ===============================================================================
350 [..] This section provides functions allowing to configure the CEC Interrupts
351 sources and check or clear the flags or pending bits status.
352 [..] The user should identify which mode will be used in his application to manage
353 the communication: Polling mode or Interrupt mode.
354
355 [..] In polling mode, the CEC can be managed by the following flags:
356 (+) CEC_FLAG_TXACKE : to indicate a missing acknowledge in transmission mode.
357 (+) CEC_FLAG_TXERR : to indicate an error occurs during transmission mode.
358 The initiator detects low impedance in the CEC line.
359 (+) CEC_FLAG_TXUDR : to indicate if an underrun error occurs in transmission mode.
360 The transmission is enabled while the software has not yet
361 loaded any value into the TXDR register.
362 (+) CEC_FLAG_TXEND : to indicate the end of successful transmission.
363 (+) CEC_FLAG_TXBR : to indicate the next transmission data has to be written to TXDR.
364 (+) CEC_FLAG_ARBLST : to indicate arbitration lost in the case of two CEC devices
365 starting at the same time.
366 (+) CEC_FLAG_RXACKE : to indicate a missing acknowledge in receive mode.
367 (+) CEC_FLAG_LBPE : to indicate a long bit period error generated during receive mode.
368 (+) CEC_FLAG_SBPE : to indicate a short bit period error generated during receive mode.
369 (+) CEC_FLAG_BRE : to indicate a bit rising error generated during receive mode.
370 (+) CEC_FLAG_RXOVR : to indicate if an overrun error occur while receiving a CEC message.
371 A byte is not yet received while a new byte is stored in the RXDR register.
372 (+) CEC_FLAG_RXEND : to indicate the end Of reception
373 (+) CEC_FLAG_RXBR : to indicate a new byte has been received from the CEC line and
374 stored into the RXDR buffer.
375 [..]
376 (@)In this Mode, it is advised to use the following functions:
377 FlagStatus CEC_GetFlagStatus(uint16_t CEC_FLAG);
378 void CEC_ClearFlag(uint16_t CEC_FLAG);
379
380 [..] In Interrupt mode, the CEC can be managed by the following interrupt sources:
381 (+) CEC_IT_TXACKE : to indicate a TX Missing acknowledge
382 (+) CEC_IT_TXACKE : to indicate a missing acknowledge in transmission mode.
383 (+) CEC_IT_TXERR : to indicate an error occurs during transmission mode.
384 The initiator detects low impedance in the CEC line.
385 (+) CEC_IT_TXUDR : to indicate if an underrun error occurs in transmission mode.
386 The transmission is enabled while the software has not yet
387 loaded any value into the TXDR register.
388 (+) CEC_IT_TXEND : to indicate the end of successful transmission.
389 (+) CEC_IT_TXBR : to indicate the next transmission data has to be written to TXDR register.
390 (+) CEC_IT_ARBLST : to indicate arbitration lost in the case of two CEC devices
391 starting at the same time.
392 (+) CEC_IT_RXACKE : to indicate a missing acknowledge in receive mode.
393 (+) CEC_IT_LBPE : to indicate a long bit period error generated during receive mode.
394 (+) CEC_IT_SBPE : to indicate a short bit period error generated during receive mode.
395 (+) CEC_IT_BRE : to indicate a bit rising error generated during receive mode.
396 (+) CEC_IT_RXOVR : to indicate if an overrun error occur while receiving a CEC message.
397 A byte is not yet received while a new byte is stored in the RXDR register.
398 (+) CEC_IT_RXEND : to indicate the end Of reception
399 (+) CEC_IT_RXBR : to indicate a new byte has been received from the CEC line and
400 stored into the RXDR buffer.
401 [..]
402 (@)In this Mode it is advised to use the following functions:
403 void CEC_ITConfig( uint16_t CEC_IT, FunctionalState NewState);
404 ITStatus CEC_GetITStatus(uint16_t CEC_IT);
405 void CEC_ClearITPendingBit(uint16_t CEC_IT);
406
407
408 @endverbatim
409 * @{
410 */
411
412 /**
413 * @brief Enables or disables the selected CEC interrupts.
414 * @param CEC_IT: specifies the CEC interrupt source to be enabled.
415 * This parameter can be any combination of the following values:
416 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
417 * @arg CEC_IT_TXERR: Tx Error.
418 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun.
419 * @arg CEC_IT_TXEND: End of Transmission (successful transmission of the last byte).
420 * @arg CEC_IT_TXBR: Tx-Byte Request.
421 * @arg CEC_IT_ARBLST: Arbitration Lost
422 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge
423 * @arg CEC_IT_LBPE: Rx Long period Error
424 * @arg CEC_IT_SBPE: Rx Short period Error
425 * @arg CEC_IT_BRE: Rx Bit Rising Error
426 * @arg CEC_IT_RXOVR: Rx Overrun.
427 * @arg CEC_IT_RXEND: End Of Reception
428 * @arg CEC_IT_RXBR: Rx-Byte Received
429 * @param NewState: new state of the selected CEC interrupts.
430 * This parameter can be: ENABLE or DISABLE.
431 * @retval None
432 */
CEC_ITConfig(uint16_t CEC_IT,FunctionalState NewState)433 void CEC_ITConfig(uint16_t CEC_IT, FunctionalState NewState)
434 {
435 assert_param(IS_FUNCTIONAL_STATE(NewState));
436 assert_param(IS_CEC_IT(CEC_IT));
437
438 if (NewState != DISABLE)
439 {
440 /* Enable the selected CEC interrupt */
441 CEC->IER |= CEC_IT;
442 }
443 else
444 {
445 CEC_IT =~CEC_IT;
446 /* Disable the selected CEC interrupt */
447 CEC->IER &= CEC_IT;
448 }
449 }
450
451 /**
452 * @brief Gets the CEC flag status.
453 * @param CEC_FLAG: specifies the CEC flag to check.
454 * This parameter can be one of the following values:
455 * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
456 * @arg CEC_FLAG_TXERR: Tx Error.
457 * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
458 * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
459 * @arg CEC_FLAG_TXBR: Tx-Byte Request.
460 * @arg CEC_FLAG_ARBLST: Arbitration Lost
461 * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge
462 * @arg CEC_FLAG_LBPE: Rx Long period Error
463 * @arg CEC_FLAG_SBPE: Rx Short period Error
464 * @arg CEC_FLAG_BRE: Rx Bit Rissing Error
465 * @arg CEC_FLAG_RXOVR: Rx Overrun.
466 * @arg CEC_FLAG_RXEND: End Of Reception.
467 * @arg CEC_FLAG_RXBR: Rx-Byte Received.
468 * @retval The new state of CEC_FLAG (SET or RESET)
469 */
CEC_GetFlagStatus(uint16_t CEC_FLAG)470 FlagStatus CEC_GetFlagStatus(uint16_t CEC_FLAG)
471 {
472 FlagStatus bitstatus = RESET;
473
474 assert_param(IS_CEC_GET_FLAG(CEC_FLAG));
475
476 /* Check the status of the specified CEC flag */
477 if ((CEC->ISR & CEC_FLAG) != (uint16_t)RESET)
478 {
479 /* CEC flag is set */
480 bitstatus = SET;
481 }
482 else
483 {
484 /* CEC flag is reset */
485 bitstatus = RESET;
486 }
487
488 /* Return the CEC flag status */
489 return bitstatus;
490 }
491
492 /**
493 * @brief Clears the CEC's pending flags.
494 * @param CEC_FLAG: specifies the flag to clear.
495 * This parameter can be any combination of the following values:
496 * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
497 * @arg CEC_FLAG_TXERR: Tx Error
498 * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun
499 * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
500 * @arg CEC_FLAG_TXBR: Tx-Byte Request
501 * @arg CEC_FLAG_ARBLST: Arbitration Lost
502 * @arg CEC_FLAG_RXACKE: Rx Missing Acknowledge
503 * @arg CEC_FLAG_LBPE: Rx Long period Error
504 * @arg CEC_FLAG_SBPE: Rx Short period Error
505 * @arg CEC_FLAG_BRE: Rx Bit Rising Error
506 * @arg CEC_FLAG_RXOVR: Rx Overrun
507 * @arg CEC_FLAG_RXEND: End Of Reception
508 * @arg CEC_FLAG_RXBR: Rx-Byte Received
509 * @retval None
510 */
CEC_ClearFlag(uint32_t CEC_FLAG)511 void CEC_ClearFlag(uint32_t CEC_FLAG)
512 {
513 assert_param(IS_CEC_CLEAR_FLAG(CEC_FLAG));
514
515 /* Clear the selected CEC flag */
516 CEC->ISR = CEC_FLAG;
517 }
518
519 /**
520 * @brief Checks whether the specified CEC interrupt has occurred or not.
521 * @param CEC_IT: specifies the CEC interrupt source to check.
522 * This parameter can be one of the following values:
523 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
524 * @arg CEC_IT_TXERR: Tx Error.
525 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun.
526 * @arg CEC_IT_TXEND: End of transmission (successful transmission of the last byte).
527 * @arg CEC_IT_TXBR: Tx-Byte Request.
528 * @arg CEC_IT_ARBLST: Arbitration Lost.
529 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge.
530 * @arg CEC_IT_LBPE: Rx Long period Error.
531 * @arg CEC_IT_SBPE: Rx Short period Error.
532 * @arg CEC_IT_BRE: Rx Bit Rising Error.
533 * @arg CEC_IT_RXOVR: Rx Overrun.
534 * @arg CEC_IT_RXEND: End Of Reception.
535 * @arg CEC_IT_RXBR: Rx-Byte Received
536 * @retval The new state of CEC_IT (SET or RESET).
537 */
CEC_GetITStatus(uint16_t CEC_IT)538 ITStatus CEC_GetITStatus(uint16_t CEC_IT)
539 {
540 ITStatus bitstatus = RESET;
541 uint32_t enablestatus = 0;
542
543 /* Check the parameters */
544 assert_param(IS_CEC_GET_IT(CEC_IT));
545
546 /* Get the CEC IT enable bit status */
547 enablestatus = (CEC->IER & CEC_IT);
548
549 /* Check the status of the specified CEC interrupt */
550 if (((CEC->ISR & CEC_IT) != (uint32_t)RESET) && enablestatus)
551 {
552 /* CEC interrupt is set */
553 bitstatus = SET;
554 }
555 else
556 {
557 /* CEC interrupt is reset */
558 bitstatus = RESET;
559 }
560
561 /* Return the CEC interrupt status */
562 return bitstatus;
563 }
564
565 /**
566 * @brief Clears the CEC's interrupt pending bits.
567 * @param CEC_IT: specifies the CEC interrupt pending bit to clear.
568 * This parameter can be any combination of the following values:
569 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
570 * @arg CEC_IT_TXERR: Tx Error
571 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun
572 * @arg CEC_IT_TXEND: End of Transmission
573 * @arg CEC_IT_TXBR: Tx-Byte Request
574 * @arg CEC_IT_ARBLST: Arbitration Lost
575 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge
576 * @arg CEC_IT_LBPE: Rx Long period Error
577 * @arg CEC_IT_SBPE: Rx Short period Error
578 * @arg CEC_IT_BRE: Rx Bit Rising Error
579 * @arg CEC_IT_RXOVR: Rx Overrun
580 * @arg CEC_IT_RXEND: End Of Reception
581 * @arg CEC_IT_RXBR: Rx-Byte Received
582 * @retval None
583 */
CEC_ClearITPendingBit(uint16_t CEC_IT)584 void CEC_ClearITPendingBit(uint16_t CEC_IT)
585 {
586 assert_param(IS_CEC_IT(CEC_IT));
587
588 /* Clear the selected CEC interrupt pending bits */
589 CEC->ISR = CEC_IT;
590 }
591
592 /**
593 * @}
594 */
595
596 /**
597 * @}
598 */
599
600 #endif /* STM32F446xx */
601 /**
602 * @}
603 */
604
605 /**
606 * @}
607 */
608
609 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
610