1 /**
2 ******************************************************************************
3 * @file stm32f4xx_rng.c
4 * @author MCD Application Team
5 * @version V1.5.1
6 * @date 22-May-2015
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Random Number Generator (RNG) peripheral:
9 * + Initialization and Configuration
10 * + Get 32 bit Random number
11 * + Interrupts and flags management
12 *
13 @verbatim
14
15 ===================================================================
16 ##### How to use this driver #####
17 ===================================================================
18 [..]
19 (#) Enable The RNG controller clock using
20 RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_RNG, ENABLE) function.
21
22 (#) Activate the RNG peripheral using RNG_Cmd() function.
23
24 (#) Wait until the 32 bit Random number Generator contains a valid random data
25 (using polling/interrupt mode). For more details, refer to "Interrupts and
26 flags management functions" module description.
27
28 (#) Get the 32 bit Random number using RNG_GetRandomNumber() function
29
30 (#) To get another 32 bit Random number, go to step 3.
31
32
33 @endverbatim
34 *
35 ******************************************************************************
36 * @attention
37 *
38 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
39 *
40 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
41 * You may not use this file except in compliance with the License.
42 * You may obtain a copy of the License at:
43 *
44 * http://www.st.com/software_license_agreement_liberty_v2
45 *
46 * Unless required by applicable law or agreed to in writing, software
47 * distributed under the License is distributed on an "AS IS" BASIS,
48 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
49 * See the License for the specific language governing permissions and
50 * limitations under the License.
51 *
52 ******************************************************************************
53 */
54
55 /* Includes ------------------------------------------------------------------*/
56 #include "stm32f4xx_rng.h"
57 #include "stm32f4xx_rcc.h"
58
59 /** @addtogroup STM32F4xx_StdPeriph_Driver
60 * @{
61 */
62
63 /** @defgroup RNG
64 * @brief RNG driver modules
65 * @{
66 */
67
68 /* Private typedef -----------------------------------------------------------*/
69 /* Private define ------------------------------------------------------------*/
70 /* Private macro -------------------------------------------------------------*/
71 /* Private variables ---------------------------------------------------------*/
72 /* Private function prototypes -----------------------------------------------*/
73 /* Private functions ---------------------------------------------------------*/
74
75 /** @defgroup RNG_Private_Functions
76 * @{
77 */
78
79 /** @defgroup RNG_Group1 Initialization and Configuration functions
80 * @brief Initialization and Configuration functions
81 *
82 @verbatim
83 ===============================================================================
84 ##### Initialization and Configuration functions #####
85 ===============================================================================
86 [..] This section provides functions allowing to
87 (+) Initialize the RNG peripheral
88 (+) Enable or disable the RNG peripheral
89
90 @endverbatim
91 * @{
92 */
93
94 /**
95 * @brief De-initializes the RNG peripheral registers to their default reset values.
96 * @param None
97 * @retval None
98 */
RNG_DeInit(void)99 void RNG_DeInit(void)
100 {
101 /* Enable RNG reset state */
102 RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, ENABLE);
103
104 /* Release RNG from reset state */
105 RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, DISABLE);
106 }
107
108 /**
109 * @brief Enables or disables the RNG peripheral.
110 * @param NewState: new state of the RNG peripheral.
111 * This parameter can be: ENABLE or DISABLE.
112 * @retval None
113 */
RNG_Cmd(FunctionalState NewState)114 void RNG_Cmd(FunctionalState NewState)
115 {
116 /* Check the parameters */
117 assert_param(IS_FUNCTIONAL_STATE(NewState));
118
119 if (NewState != DISABLE)
120 {
121 /* Enable the RNG */
122 RNG->CR |= RNG_CR_RNGEN;
123 }
124 else
125 {
126 /* Disable the RNG */
127 RNG->CR &= ~RNG_CR_RNGEN;
128 }
129 }
130 /**
131 * @}
132 */
133
134 /** @defgroup RNG_Group2 Get 32 bit Random number function
135 * @brief Get 32 bit Random number function
136 *
137
138 @verbatim
139 ===============================================================================
140 ##### Get 32 bit Random number function #####
141 ===============================================================================
142 [..] This section provides a function allowing to get the 32 bit Random number
143
144 (@) Before to call this function you have to wait till DRDY flag is set,
145 using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
146
147 @endverbatim
148 * @{
149 */
150
151
152 /**
153 * @brief Returns a 32-bit random number.
154 *
155 * @note Before to call this function you have to wait till DRDY (data ready)
156 * flag is set, using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
157 * @note Each time the Random number data is read (using RNG_GetRandomNumber()
158 * function), the RNG_FLAG_DRDY flag is automatically cleared.
159 * @note In the case of a seed error, the generation of random numbers is
160 * interrupted for as long as the SECS bit is '1'. If a number is
161 * available in the RNG_DR register, it must not be used because it may
162 * not have enough entropy. In this case, it is recommended to clear the
163 * SEIS bit(using RNG_ClearFlag(RNG_FLAG_SECS) function), then disable
164 * and enable the RNG peripheral (using RNG_Cmd() function) to
165 * reinitialize and restart the RNG.
166 * @note In the case of a clock error, the RNG is no more able to generate
167 * random numbers because the PLL48CLK clock is not correct. User have
168 * to check that the clock controller is correctly configured to provide
169 * the RNG clock and clear the CEIS bit (using RNG_ClearFlag(RNG_FLAG_CECS)
170 * function) . The clock error has no impact on the previously generated
171 * random numbers, and the RNG_DR register contents can be used.
172 *
173 * @param None
174 * @retval 32-bit random number.
175 */
RNG_GetRandomNumber(void)176 uint32_t RNG_GetRandomNumber(void)
177 {
178 /* Return the 32 bit random number from the DR register */
179 return RNG->DR;
180 }
181
182
183 /**
184 * @}
185 */
186
187 /** @defgroup RNG_Group3 Interrupts and flags management functions
188 * @brief Interrupts and flags management functions
189 *
190 @verbatim
191 ===============================================================================
192 ##### Interrupts and flags management functions #####
193 ===============================================================================
194
195 [..] This section provides functions allowing to configure the RNG Interrupts and
196 to get the status and clear flags and Interrupts pending bits.
197
198 [..] The RNG provides 3 Interrupts sources and 3 Flags:
199
200 *** Flags : ***
201 ===============
202 [..]
203 (#) RNG_FLAG_DRDY : In the case of the RNG_DR register contains valid
204 random data. it is cleared by reading the valid data(using
205 RNG_GetRandomNumber() function).
206
207 (#) RNG_FLAG_CECS : In the case of a seed error detection.
208
209 (#) RNG_FLAG_SECS : In the case of a clock error detection.
210
211 *** Interrupts ***
212 ==================
213 [..] If enabled, an RNG interrupt is pending :
214
215 (#) In the case of the RNG_DR register contains valid random data.
216 This interrupt source is cleared once the RNG_DR register has been read
217 (using RNG_GetRandomNumber() function) until a new valid value is
218 computed; or
219 (#) In the case of a seed error : One of the following faulty sequences has
220 been detected:
221 (++) More than 64 consecutive bits at the same value (0 or 1)
222 (++) More than 32 consecutive alternance of 0 and 1 (0101010101...01)
223 This interrupt source is cleared using RNG_ClearITPendingBit(RNG_IT_SEI)
224 function; or
225 (#) In the case of a clock error : the PLL48CLK (RNG peripheral clock source)
226 was not correctly detected (fPLL48CLK< fHCLK/16). This interrupt source is
227 cleared using RNG_ClearITPendingBit(RNG_IT_CEI) function.
228 -@- note In this case, User have to check that the clock controller is
229 correctly configured to provide the RNG clock.
230
231 *** Managing the RNG controller events : ***
232 ============================================
233 [..] The user should identify which mode will be used in his application to manage
234 the RNG controller events: Polling mode or Interrupt mode.
235
236 (#) In the Polling Mode it is advised to use the following functions:
237 (++) RNG_GetFlagStatus() : to check if flags events occur.
238 (++) RNG_ClearFlag() : to clear the flags events.
239
240 -@@- RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag(). it is cleared only
241 by reading the Random number data.
242
243 (#) In the Interrupt Mode it is advised to use the following functions:
244 (++) RNG_ITConfig() : to enable or disable the interrupt source.
245 (++) RNG_GetITStatus() : to check if Interrupt occurs.
246 (++) RNG_ClearITPendingBit() : to clear the Interrupt pending Bit
247 (corresponding Flag).
248
249 @endverbatim
250 * @{
251 */
252
253 /**
254 * @brief Enables or disables the RNG interrupt.
255 * @note The RNG provides 3 interrupt sources,
256 * - Computed data is ready event (DRDY), and
257 * - Seed error Interrupt (SEI) and
258 * - Clock error Interrupt (CEI),
259 * all these interrupts sources are enabled by setting the IE bit in
260 * CR register. However, each interrupt have its specific status bit
261 * (see RNG_GetITStatus() function) and clear bit except the DRDY event
262 * (see RNG_ClearITPendingBit() function).
263 * @param NewState: new state of the RNG interrupt.
264 * This parameter can be: ENABLE or DISABLE.
265 * @retval None
266 */
RNG_ITConfig(FunctionalState NewState)267 void RNG_ITConfig(FunctionalState NewState)
268 {
269 /* Check the parameters */
270 assert_param(IS_FUNCTIONAL_STATE(NewState));
271
272 if (NewState != DISABLE)
273 {
274 /* Enable the RNG interrupt */
275 RNG->CR |= RNG_CR_IE;
276 }
277 else
278 {
279 /* Disable the RNG interrupt */
280 RNG->CR &= ~RNG_CR_IE;
281 }
282 }
283
284 /**
285 * @brief Checks whether the specified RNG flag is set or not.
286 * @param RNG_FLAG: specifies the RNG flag to check.
287 * This parameter can be one of the following values:
288 * @arg RNG_FLAG_DRDY: Data Ready flag.
289 * @arg RNG_FLAG_CECS: Clock Error Current flag.
290 * @arg RNG_FLAG_SECS: Seed Error Current flag.
291 * @retval The new state of RNG_FLAG (SET or RESET).
292 */
RNG_GetFlagStatus(uint8_t RNG_FLAG)293 FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG)
294 {
295 FlagStatus bitstatus = RESET;
296 /* Check the parameters */
297 assert_param(IS_RNG_GET_FLAG(RNG_FLAG));
298
299 /* Check the status of the specified RNG flag */
300 if ((RNG->SR & RNG_FLAG) != (uint8_t)RESET)
301 {
302 /* RNG_FLAG is set */
303 bitstatus = SET;
304 }
305 else
306 {
307 /* RNG_FLAG is reset */
308 bitstatus = RESET;
309 }
310 /* Return the RNG_FLAG status */
311 return bitstatus;
312 }
313
314
315 /**
316 * @brief Clears the RNG flags.
317 * @param RNG_FLAG: specifies the flag to clear.
318 * This parameter can be any combination of the following values:
319 * @arg RNG_FLAG_CECS: Clock Error Current flag.
320 * @arg RNG_FLAG_SECS: Seed Error Current flag.
321 * @note RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag() function.
322 * This flag is cleared only by reading the Random number data (using
323 * RNG_GetRandomNumber() function).
324 * @retval None
325 */
RNG_ClearFlag(uint8_t RNG_FLAG)326 void RNG_ClearFlag(uint8_t RNG_FLAG)
327 {
328 /* Check the parameters */
329 assert_param(IS_RNG_CLEAR_FLAG(RNG_FLAG));
330 /* Clear the selected RNG flags */
331 RNG->SR = ~(uint32_t)(((uint32_t)RNG_FLAG) << 4);
332 }
333
334 /**
335 * @brief Checks whether the specified RNG interrupt has occurred or not.
336 * @param RNG_IT: specifies the RNG interrupt source to check.
337 * This parameter can be one of the following values:
338 * @arg RNG_IT_CEI: Clock Error Interrupt.
339 * @arg RNG_IT_SEI: Seed Error Interrupt.
340 * @retval The new state of RNG_IT (SET or RESET).
341 */
RNG_GetITStatus(uint8_t RNG_IT)342 ITStatus RNG_GetITStatus(uint8_t RNG_IT)
343 {
344 ITStatus bitstatus = RESET;
345 /* Check the parameters */
346 assert_param(IS_RNG_GET_IT(RNG_IT));
347
348 /* Check the status of the specified RNG interrupt */
349 if ((RNG->SR & RNG_IT) != (uint8_t)RESET)
350 {
351 /* RNG_IT is set */
352 bitstatus = SET;
353 }
354 else
355 {
356 /* RNG_IT is reset */
357 bitstatus = RESET;
358 }
359 /* Return the RNG_IT status */
360 return bitstatus;
361 }
362
363
364 /**
365 * @brief Clears the RNG interrupt pending bit(s).
366 * @param RNG_IT: specifies the RNG interrupt pending bit(s) to clear.
367 * This parameter can be any combination of the following values:
368 * @arg RNG_IT_CEI: Clock Error Interrupt.
369 * @arg RNG_IT_SEI: Seed Error Interrupt.
370 * @retval None
371 */
RNG_ClearITPendingBit(uint8_t RNG_IT)372 void RNG_ClearITPendingBit(uint8_t RNG_IT)
373 {
374 /* Check the parameters */
375 assert_param(IS_RNG_IT(RNG_IT));
376
377 /* Clear the selected RNG interrupt pending bit */
378 RNG->SR = (uint8_t)~RNG_IT;
379 }
380 /**
381 * @}
382 */
383
384 /**
385 * @}
386 */
387
388 /**
389 * @}
390 */
391
392 /**
393 * @}
394 */
395
396
397 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
398