1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_i2s.h 4 * @author MCD Application Team 5 * @version V1.0.1 6 * @date 25-June-2015 7 * @brief Header file of I2S HAL module. 8 ****************************************************************************** 9 * @attention 10 * 11 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> 12 * 13 * Redistribution and use in source and binary forms, with or without modification, 14 * are permitted provided that the following conditions are met: 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright notice, 18 * this list of conditions and the following disclaimer in the documentation 19 * and/or other materials provided with the distribution. 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 ****************************************************************************** 36 */ 37 38 /* Define to prevent recursive inclusion -------------------------------------*/ 39 #ifndef __STM32F7xx_HAL_I2S_H 40 #define __STM32F7xx_HAL_I2S_H 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32f7xx_hal_def.h" 48 49 /** @addtogroup STM32F7xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup I2S 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 /** @defgroup I2S_Exported_Types I2S Exported Types 59 * @{ 60 */ 61 62 /** 63 * @brief I2S Init structure definition 64 */ 65 typedef struct { 66 uint32_t Mode; /*!< Specifies the I2S operating mode. 67 This parameter can be a value of @ref I2S_Mode */ 68 69 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. 70 This parameter can be a value of @ref I2S_Standard */ 71 72 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. 73 This parameter can be a value of @ref I2S_Data_Format */ 74 75 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 76 This parameter can be a value of @ref I2S_MCLK_Output */ 77 78 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 79 This parameter can be a value of @ref I2S_Audio_Frequency */ 80 81 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. 82 This parameter can be a value of @ref I2S_Clock_Polarity */ 83 84 uint32_t ClockSource; /*!< Specifies the I2S Clock Source. 85 This parameter can be a value of @ref I2S_Clock_Source */ 86 } I2S_InitTypeDef; 87 88 /** 89 * @brief HAL State structures definition 90 */ 91 typedef enum { 92 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ 93 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ 94 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ 95 HAL_I2S_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ 96 HAL_I2S_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ 97 HAL_I2S_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */ 98 HAL_I2S_STATE_TIMEOUT = 0x06, /*!< I2S timeout state */ 99 HAL_I2S_STATE_ERROR = 0x07 /*!< I2S error state */ 100 101 } HAL_I2S_StateTypeDef; 102 103 /** 104 * @brief I2S handle Structure definition 105 */ 106 typedef struct { 107 SPI_TypeDef *Instance; /* I2S registers base address */ 108 109 I2S_InitTypeDef Init; /* I2S communication parameters */ 110 111 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ 112 113 __IO uint16_t TxXferSize; /* I2S Tx transfer size */ 114 115 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ 116 117 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ 118 119 __IO uint16_t RxXferSize; /* I2S Rx transfer size */ 120 121 __IO uint16_t RxXferCount; /* I2S Rx transfer counter 122 (This field is initialized at the 123 same value as transfer size at the 124 beginning of the transfer and 125 decremented when a sample is received. 126 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 127 128 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ 129 130 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ 131 132 __IO HAL_LockTypeDef Lock; /* I2S locking object */ 133 134 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */ 135 136 __IO uint32_t ErrorCode; /* I2S Error code */ 137 138 } I2S_HandleTypeDef; 139 /** 140 * @} 141 */ 142 143 /* Exported constants --------------------------------------------------------*/ 144 /** @defgroup I2S_Exported_Constants I2S Exported Constants 145 * @{ 146 */ 147 148 /** @defgroup I2S_Error_Defintion I2S_Error_Defintion 149 *@brief I2S Error Code 150 * @{ 151 */ 152 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 153 #define HAL_I2S_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */ 154 #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< OVR error */ 155 #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000004) /*!< UDR error */ 156 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000008) /*!< DMA transfer error */ 157 #define HAL_I2S_ERROR_UNKNOW ((uint32_t)0x00000010) /*!< Unknow Error error */ 158 159 /** 160 * @} 161 */ 162 /** @defgroup I2S_Clock_Source I2S Clock Source 163 * @{ 164 */ 165 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001) 166 #define I2S_CLOCK_SYSCLK ((uint32_t)0x00000002) 167 /** 168 * @} 169 */ 170 171 /** @defgroup I2S_Mode I2S Mode 172 * @{ 173 */ 174 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000) 175 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100) 176 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200) 177 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300) 178 /** 179 * @} 180 */ 181 182 /** @defgroup I2S_Standard I2S Standard 183 * @{ 184 */ 185 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000) 186 #define I2S_STANDARD_MSB ((uint32_t)0x00000010) 187 #define I2S_STANDARD_LSB ((uint32_t)0x00000020) 188 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030) 189 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0) 190 /** 191 * @} 192 */ 193 194 /** @defgroup I2S_Data_Format I2S Data Format 195 * @{ 196 */ 197 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000) 198 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001) 199 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003) 200 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005) 201 /** 202 * @} 203 */ 204 205 /** @defgroup I2S_MCLK_Output I2S Mclk Output 206 * @{ 207 */ 208 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) 209 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) 210 /** 211 * @} 212 */ 213 214 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency 215 * @{ 216 */ 217 #define I2S_AUDIOFREQ_192K ((uint32_t)192000) 218 #define I2S_AUDIOFREQ_96K ((uint32_t)96000) 219 #define I2S_AUDIOFREQ_48K ((uint32_t)48000) 220 #define I2S_AUDIOFREQ_44K ((uint32_t)44100) 221 #define I2S_AUDIOFREQ_32K ((uint32_t)32000) 222 #define I2S_AUDIOFREQ_22K ((uint32_t)22050) 223 #define I2S_AUDIOFREQ_16K ((uint32_t)16000) 224 #define I2S_AUDIOFREQ_11K ((uint32_t)11025) 225 #define I2S_AUDIOFREQ_8K ((uint32_t)8000) 226 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) 227 /** 228 * @} 229 */ 230 231 232 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity 233 * @{ 234 */ 235 #define I2S_CPOL_LOW ((uint32_t)0x00000000) 236 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) 237 /** 238 * @} 239 */ 240 241 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition 242 * @{ 243 */ 244 #define I2S_IT_TXE SPI_CR2_TXEIE 245 #define I2S_IT_RXNE SPI_CR2_RXNEIE 246 #define I2S_IT_ERR SPI_CR2_ERRIE 247 /** 248 * @} 249 */ 250 251 /** @defgroup I2S_Flags_Definition I2S Flags Definition 252 * @{ 253 */ 254 #define I2S_FLAG_TXE SPI_SR_TXE 255 #define I2S_FLAG_RXNE SPI_SR_RXNE 256 257 #define I2S_FLAG_UDR SPI_SR_UDR 258 #define I2S_FLAG_OVR SPI_SR_OVR 259 #define I2S_FLAG_FRE SPI_SR_FRE 260 261 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE 262 #define I2S_FLAG_BSY SPI_SR_BSY 263 /** 264 * @} 265 */ 266 267 /** 268 * @} 269 */ 270 271 /* Exported macros -----------------------------------------------------------*/ 272 /** @defgroup I2S_Exported_Macros I2S Exported Macros 273 * @{ 274 */ 275 276 /** @brief Reset I2S handle state 277 * @param __HANDLE__: specifies the I2S handle. 278 * @retval None 279 */ 280 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) 281 282 /** @brief Enable or disable the specified SPI peripheral (in I2S mode). 283 * @param __HANDLE__: specifies the I2S Handle. 284 * @retval None 285 */ 286 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE) 287 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE) 288 289 /** @brief Enable or disable the specified I2S interrupts. 290 * @param __HANDLE__: specifies the I2S Handle. 291 * @param __INTERRUPT__: specifies the interrupt source to enable or disable. 292 * This parameter can be one of the following values: 293 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 294 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 295 * @arg I2S_IT_ERR: Error interrupt enable 296 * @retval None 297 */ 298 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) 299 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__)) 300 301 /** @brief Checks if the specified I2S interrupt source is enabled or disabled. 302 * @param __HANDLE__: specifies the I2S Handle. 303 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. 304 * @param __INTERRUPT__: specifies the I2S interrupt source to check. 305 * This parameter can be one of the following values: 306 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 307 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 308 * @arg I2S_IT_ERR: Error interrupt enable 309 * @retval The new state of __IT__ (TRUE or FALSE). 310 */ 311 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 312 313 /** @brief Checks whether the specified I2S flag is set or not. 314 * @param __HANDLE__: specifies the I2S Handle. 315 * @param __FLAG__: specifies the flag to check. 316 * This parameter can be one of the following values: 317 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag 318 * @arg I2S_FLAG_TXE: Transmit buffer empty flag 319 * @arg I2S_FLAG_UDR: Underrun flag 320 * @arg I2S_FLAG_OVR: Overrun flag 321 * @arg I2S_FLAG_FRE: Frame error flag 322 * @arg I2S_FLAG_CHSIDE: Channel Side flag 323 * @arg I2S_FLAG_BSY: Busy flag 324 * @retval The new state of __FLAG__ (TRUE or FALSE). 325 */ 326 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 327 328 /** @brief Clears the I2S OVR pending flag. 329 * @param __HANDLE__: specifies the I2S Handle. 330 * @retval None 331 */ 332 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \ 333 do{ \ 334 __IO uint32_t tmpreg; \ 335 tmpreg = (__HANDLE__)->Instance->DR; \ 336 tmpreg = (__HANDLE__)->Instance->SR; \ 337 UNUSED(tmpreg); \ 338 } while(0) 339 340 /** @brief Clears the I2S UDR pending flag. 341 * @param __HANDLE__: specifies the I2S Handle. 342 * @retval None 343 */ 344 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \ 345 do{ \ 346 __IO uint32_t tmpreg; \ 347 tmpreg = (__HANDLE__)->Instance->SR; \ 348 UNUSED(tmpreg); \ 349 } while(0) 350 /** 351 * @} 352 */ 353 354 /* Exported functions --------------------------------------------------------*/ 355 /** @addtogroup I2S_Exported_Functions I2S Exported Functions 356 * @{ 357 */ 358 359 /** @addtogroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions 360 * @{ 361 */ 362 363 /* Initialization and de-initialization functions *****************************/ 364 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); 365 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); 366 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); 367 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); 368 /** 369 * @} 370 */ 371 372 /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions 373 * @{ 374 */ 375 /* I/O operation functions ***************************************************/ 376 /* Blocking mode: Polling */ 377 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 378 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 379 380 /* Non-Blocking mode: Interrupt */ 381 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 382 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 383 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); 384 385 /* Non-Blocking mode: DMA */ 386 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 387 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 388 389 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); 390 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); 391 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); 392 393 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 394 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 395 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); 396 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 397 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); 398 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); 399 /** 400 * @} 401 */ 402 403 /** @addtogroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions 404 * @{ 405 */ 406 /* Peripheral Control and State functions ************************************/ 407 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); 408 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); 409 /** 410 * @} 411 */ 412 413 /** 414 * @} 415 */ 416 417 418 /* Private types -------------------------------------------------------------*/ 419 /* Private variables ---------------------------------------------------------*/ 420 /* Private constants ---------------------------------------------------------*/ 421 /** @defgroup I2S_Private_Constants I2S Private Constants 422 * @{ 423 */ 424 425 /** 426 * @} 427 */ 428 429 /* Private macros ------------------------------------------------------------*/ 430 /** @defgroup I2S_Private_Macros I2S Private Macros 431 * @{ 432 */ 433 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \ 434 ((CLOCK) == I2S_CLOCK_SYSCLK)) 435 436 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ 437 ((MODE) == I2S_MODE_SLAVE_RX) || \ 438 ((MODE) == I2S_MODE_MASTER_TX)|| \ 439 ((MODE) == I2S_MODE_MASTER_RX)) 440 441 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ 442 ((STANDARD) == I2S_STANDARD_MSB) || \ 443 ((STANDARD) == I2S_STANDARD_LSB) || \ 444 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ 445 ((STANDARD) == I2S_STANDARD_PCM_LONG)) 446 447 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ 448 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ 449 ((FORMAT) == I2S_DATAFORMAT_24B) || \ 450 ((FORMAT) == I2S_DATAFORMAT_32B)) 451 452 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ 453 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) 454 455 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ 456 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ 457 ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) 458 459 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ 460 ((CPOL) == I2S_CPOL_HIGH)) 461 /** 462 * @} 463 */ 464 465 /** 466 * @} 467 */ 468 469 /** 470 * @} 471 */ 472 473 #ifdef __cplusplus 474 } 475 #endif 476 477 478 #endif /* __STM32F7xx_HAL_I2S_H */ 479 480 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 481