1 /* 2 * Copyright (c) 2015 MediaTek Inc. 3 * 4 * Use of this source code is governed by a MIT-style 5 * license that can be found in the LICENSE file or at 6 * https://opensource.org/licenses/MIT 7 */ 8 #include <arch/arm.h> 9 #include <lk/reg.h> 10 #include <lk/debug.h> 11 #include <kernel/thread.h> 12 #include <mt_gic.h> 13 #include <platform/mt_typedefs.h> 14 #include <platform/mt_reg_base.h> 15 #include <platform/mt_gpt.h> 16 #include <platform/mt_irq.h> 17 18 #define MPIDR_LEVEL_BITS 8 19 #define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1) 20 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ 21 ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK) 22 23 24 extern enum handler_return lk_scheduler(void); 25 extern uint32_t mt_mpidr_read(void); 26 mt_irq_get_affinity(void)27uint64_t mt_irq_get_affinity(void) { 28 uint64_t mpidr, aff = 0; 29 30 mpidr = (uint64_t) mt_mpidr_read(); 31 32 aff = ( 33 MPIDR_AFFINITY_LEVEL(mpidr, 2) << 16 | 34 MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8 | 35 MPIDR_AFFINITY_LEVEL(mpidr, 0) 36 ); 37 38 return aff; 39 } 40 mt_interrupt_needed_for_secure(void)41uint32_t mt_interrupt_needed_for_secure(void) { 42 return 0; 43 } 44 platform_irq(struct arm_iframe * frame)45enum handler_return platform_irq(struct arm_iframe *frame) { 46 enum handler_return ret = INT_NO_RESCHEDULE; 47 unsigned int irq = mt_irq_get(); 48 49 if (irq == MT_GPT_IRQ_ID) 50 ret = lk_scheduler(); 51 52 return ret; 53 } 54 platform_fiq(struct arm_iframe * frame)55void platform_fiq(struct arm_iframe *frame) { 56 } 57 58