1 /*
2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 */
6
7 #pragma once
8
9 #include <util.h>
10 #include <sel4/config.h>
11
12 /*
13 * 2^32 +-------------------+
14 * | Kernel Devices |
15 * 2^32 - 2^22 +-------------------+ KDEV_BASE
16 * | Kernel ELF |
17 * 2^32 - 2^23 +-------------------+ PPTR_TOP / KERNEL_ELF_BASE
18 * | |
19 * | Physical Memory |
20 * | Window |
21 * | |
22 * +-------------------+ USER_TOP / PPTR_BASE
23 * | |
24 * | User |
25 * | |
26 * 0x0 +-------------------+
27 */
28
29 /* last accessible virtual address in user space */
30 #define USER_TOP seL4_UserTop
31
32 /* The first physical address to map into the kernel's physical memory
33 * window */
34 #define PADDR_BASE physBase
35
36 /* The base address in virtual memory to use for the 1:1 physical memory
37 * mapping */
38 #define PPTR_BASE seL4_UserTop
39
40 /* Top of the physical memory window */
41 #ifdef CONFIG_KERNEL_LOG_BUFFER
42 #define PPTR_TOP UL_CONST(0xFF400000)
43 /* Place the kernel log buffer after the PPTR region */
44 #define KS_LOG_PPTR PPTR_TOP
45 #else
46 #define PPTR_TOP UL_CONST(0xFF800000)
47 #endif
48
49 /* The physical memory address to use for mapping the kernel ELF
50 *
51 * This represents the physical address that the kernel image will be linked to. This needs to
52 * be on a 1gb boundary as we currently require being able to creating a mapping to this address
53 * as the largest frame size */
54 #define KERNEL_ELF_PADDR_BASE UL_CONST(0x84000000)
55
56 /* The base address in virtual memory to use for the kernel ELF mapping */
57 #define KERNEL_ELF_BASE UL_CONST(0xFF800000)
58
59 /* The base address in virtual memory to use for the kernel device
60 * mapping region. These are mapped in the kernel page table. */
61 #define KDEV_BASE UL_CONST(0xFFC00000)
62
63 #define LOAD lw
64 #define STORE sw
65
66 #ifndef __ASSEMBLER__
67
68 #include <stdint.h>
69
riscv_read_time(void)70 static inline uint64_t riscv_read_time(void)
71 {
72 uint32_t nH1, nL, nH2;
73 asm volatile(
74 "rdtimeh %0\n"
75 "rdtime %1\n"
76 "rdtimeh %2\n"
77 : "=r"(nH1), "=r"(nL), "=r"(nH2));
78 if (nH1 < nH2) {
79 /* Ensure that the time is correct if there is a rollover in the
80 * high bits between reading the low and high bits. */
81 asm volatile(
82 "rdtime %0\n"
83 : "=r"(nL));
84 nH1 = nH2;
85 }
86 return ((uint64_t)((uint64_t) nH1 << 32)) | (nL);
87 }
88
riscv_read_cycle(void)89 static inline uint64_t riscv_read_cycle(void)
90 {
91 uint32_t nH1, nL, nH2;
92 asm volatile(
93 "rdcycleh %0\n"
94 "rdcycle %1\n"
95 "rdcycleh %2\n"
96 : "=r"(nH1), "=r"(nL), "=r"(nH2));
97 if (nH1 != nH2) {
98 /* Ensure that the time is correct if there is a rollover in the
99 * high bits between reading the low and high bits. */
100 asm volatile(
101 "rdcycle %0\n"
102 : "=r"(nL));
103 nH1 = nH2;
104 }
105 return ((uint64_t)((uint64_t) nH1 << 32)) | (nL);
106 }
107
108 #endif /* __ASSEMBLER__ */
109
110