1 /*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
5
6 /* TODO: This file will need clean up */
7
8 #ifndef ARCH_HELPERS_H
9 #define ARCH_HELPERS_H
10
11 #include <arch.h>
12 #include <instr_helpers.h>
13 #include <stdbool.h>
14 #include <stddef.h>
15
16 /* Define read function for system register */
17 #define DEFINE_SYSREG_READ_FUNC(_name) \
18 DEFINE_SYSREG_READ_FUNC_(_name, _name)
19
20 /* Define read & write function for system register */
21 #define DEFINE_SYSREG_RW_FUNCS(_name) \
22 DEFINE_SYSREG_READ_FUNC_(_name, _name) \
23 DEFINE_SYSREG_WRITE_FUNC_(_name, _name)
24
25 /* Define read & write function for renamed system register */
26 #define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \
27 DEFINE_SYSREG_READ_FUNC_(_name, _reg_name) \
28 DEFINE_SYSREG_WRITE_FUNC_(_name, _reg_name)
29
30 /* Define read function for renamed system register */
31 #define DEFINE_RENAME_SYSREG_READ_FUNC(_name, _reg_name) \
32 DEFINE_SYSREG_READ_FUNC_(_name, _reg_name)
33
34 /* Define write function for renamed system register */
35 #define DEFINE_RENAME_SYSREG_WRITE_FUNC(_name, _reg_name) \
36 DEFINE_SYSREG_WRITE_FUNC_(_name, _reg_name)
37
38 /*******************************************************************************
39 * TLB maintenance accessor prototypes
40 ******************************************************************************/
41 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
42 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
43 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
44 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
45 DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
46 DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1is)
47 DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalls12e1)
48
49 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is)
50 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is)
51 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is)
52 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is)
53 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, ipas2e1is)
54
55 /*******************************************************************************
56 * Cache maintenance accessor prototypes
57 ******************************************************************************/
58 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw)
59 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw)
60 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw)
61 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac)
62 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac)
63 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac)
64 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau)
65 DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, zva)
66
67 /*******************************************************************************
68 * Address translation accessor prototypes
69 ******************************************************************************/
70 DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r)
71 DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w)
72 DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r)
73 DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w)
74 DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e1r)
75 DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e2r)
76
77 /*******************************************************************************
78 * Strip Pointer Authentication Code
79 ******************************************************************************/
80 DEFINE_SYSOP_PARAM_FUNC(xpaci)
81
82 /*******************************************************************************
83 * Cache management
84 ******************************************************************************/
85 void flush_dcache_range(uintptr_t addr, size_t size);
86 void clean_dcache_range(uintptr_t addr, size_t size);
87 void inv_dcache_range(uintptr_t addr, size_t size);
88
89 #define is_dcache_enabled() ((read_sctlr_el2() & SCTLR_EL2_C) != 0U)
90
91 /*******************************************************************************
92 * MMU management
93 ******************************************************************************/
94 #define is_mmu_enabled() ((read_sctlr_el2() & SCTLR_EL2_M) != 0U)
95
96 /*******************************************************************************
97 * FPU management
98 ******************************************************************************/
99 #define is_fpen_enabled() (((read_cptr_el2() >> CPTR_EL2_FPEN_SHIFT) & \
100 CPTR_EL2_FPEN_MASK) == CPTR_EL2_FPEN_NO_TRAP_11)
101
102 /*******************************************************************************
103 * Misc. accessor prototypes
104 ******************************************************************************/
105
106 #define write_daifclr(val) SYSREG_WRITE_CONST(daifclr, val)
107 #define write_daifset(val) SYSREG_WRITE_CONST(daifset, val)
108
109 DEFINE_SYSOP_FUNC(wfi)
DEFINE_SYSOP_FUNC(wfe)110 DEFINE_SYSOP_FUNC(wfe)
111 DEFINE_SYSOP_FUNC(sev)
112 DEFINE_SYSOP_FUNC(isb)
113
114 static inline void enable_irq(void)
115 {
116 /*
117 * The compiler memory barrier will prevent the compiler from
118 * scheduling non-volatile memory access after the write to the
119 * register.
120 *
121 * This could happen if some initialization code issues non-volatile
122 * accesses to an area used by an interrupt handler, in the assumption
123 * that it is safe as the interrupts are disabled at the time it does
124 * that (according to program order). However, non-volatile accesses
125 * are not necessarily in program order relatively with volatile inline
126 * assembly statements (and volatile accesses).
127 */
128 COMPILER_BARRIER();
129 write_daifclr(DAIF_IRQ_BIT);
130 isb();
131 }
132
enable_fiq(void)133 static inline void enable_fiq(void)
134 {
135 COMPILER_BARRIER();
136 write_daifclr(DAIF_FIQ_BIT);
137 isb();
138 }
139
enable_serror(void)140 static inline void enable_serror(void)
141 {
142 COMPILER_BARRIER();
143 write_daifclr(DAIF_ABT_BIT);
144 isb();
145 }
146
enable_debug_exceptions(void)147 static inline void enable_debug_exceptions(void)
148 {
149 COMPILER_BARRIER();
150 write_daifclr(DAIF_DBG_BIT);
151 isb();
152 }
153
disable_irq(void)154 static inline void disable_irq(void)
155 {
156 COMPILER_BARRIER();
157 write_daifset(DAIF_IRQ_BIT);
158 isb();
159 }
160
disable_fiq(void)161 static inline void disable_fiq(void)
162 {
163 COMPILER_BARRIER();
164 write_daifset(DAIF_FIQ_BIT);
165 isb();
166 }
167
disable_serror(void)168 static inline void disable_serror(void)
169 {
170 COMPILER_BARRIER();
171 write_daifset(DAIF_ABT_BIT);
172 isb();
173 }
174
disable_debug_exceptions(void)175 static inline void disable_debug_exceptions(void)
176 {
177 COMPILER_BARRIER();
178 write_daifset(DAIF_DBG_BIT);
179 isb();
180 }
181
182 /*******************************************************************************
183 * System register accessor prototypes
184 ******************************************************************************/
185 DEFINE_SYSREG_RW_FUNCS(sp_el0)
186 DEFINE_SYSREG_RW_FUNCS(sp_el1)
187 DEFINE_SYSREG_RW_FUNCS(elr_el12)
188 DEFINE_SYSREG_RW_FUNCS(spsr_el12)
189 DEFINE_SYSREG_RW_FUNCS(pmuserenr_el0)
190 DEFINE_SYSREG_RW_FUNCS(tpidrro_el0)
191 DEFINE_SYSREG_RW_FUNCS(tpidr_el0)
192 DEFINE_SYSREG_RW_FUNCS(tpidr_el2)
193 DEFINE_SYSREG_RW_FUNCS(csselr_el1)
194 DEFINE_SYSREG_RW_FUNCS(sctlr_el12)
195 DEFINE_SYSREG_RW_FUNCS(cpacr_el12)
196 DEFINE_SYSREG_RW_FUNCS(zcr_el1)
197 DEFINE_SYSREG_RW_FUNCS(ttbr0_el12)
198 DEFINE_SYSREG_RW_FUNCS(ttbr1_el12)
199 DEFINE_SYSREG_RW_FUNCS(tcr_el12)
200 DEFINE_SYSREG_RW_FUNCS(esr_el12)
201 DEFINE_SYSREG_RW_FUNCS(afsr0_el12)
202 DEFINE_SYSREG_RW_FUNCS(afsr1_el12)
203 DEFINE_SYSREG_RW_FUNCS(far_el12)
204 DEFINE_SYSREG_RW_FUNCS(mair_el12)
205 DEFINE_SYSREG_RW_FUNCS(vbar_el12)
206 DEFINE_SYSREG_RW_FUNCS(contextidr_el12)
207 DEFINE_SYSREG_RW_FUNCS(tpidr_el1)
208 DEFINE_SYSREG_RW_FUNCS(amair_el12)
209 DEFINE_SYSREG_RW_FUNCS(cntkctl_el12)
210 DEFINE_SYSREG_RW_FUNCS(mdscr_el1)
211 DEFINE_SYSREG_RW_FUNCS(mdccint_el1)
212 DEFINE_SYSREG_RW_FUNCS(disr_el1)
213 DEFINE_SYSREG_RW_FUNCS(cnrv_ctl_el02)
214 DEFINE_SYSREG_RW_FUNCS(vtcr_el2)
215 DEFINE_SYSREG_RW_FUNCS(vsesr_el2)
216 DEFINE_SYSREG_RW_FUNCS(par_el1)
217 DEFINE_SYSREG_READ_FUNC(id_pfr1_el1)
218 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64PFR0_EL1, id_aa64pfr0_el1)
219 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64PFR1_EL1, id_aa64pfr1_el1)
220 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64DFR0_EL1, id_aa64dfr0_el1)
221 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64DFR1_EL1, id_aa64dfr1_el1)
222 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64AFR0_EL1, id_aa64afr0_el1)
223 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64AFR1_EL1, id_aa64afr1_el1)
224 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64ISAR0_EL1, id_aa64isar0_el1)
225 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64ISAR1_EL1, id_aa64isar1_el1)
226 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR0_EL1, id_aa64mmfr0_el1)
227 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR1_EL1, id_aa64mmfr1_el1)
228 DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR2_EL1, id_aa64mmfr1_el1)
229 DEFINE_RENAME_SYSREG_RW_FUNCS(icc_hppir1_el1, ICC_HPPIR1_EL1)
230 DEFINE_RENAME_SYSREG_RW_FUNCS(mpam0_el1, MPAM0_EL1)
231 DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1)
232 DEFINE_SYSREG_READ_FUNC(id_afr0_el1)
233 DEFINE_SYSREG_READ_FUNC(CurrentEl)
234 DEFINE_SYSREG_READ_FUNC(ctr_el0)
235 DEFINE_SYSREG_RW_FUNCS(daif)
236 DEFINE_SYSREG_RW_FUNCS(spsr_el1)
237 DEFINE_SYSREG_RW_FUNCS(spsr_el2)
238 DEFINE_SYSREG_RW_FUNCS(elr_el1)
239 DEFINE_SYSREG_RW_FUNCS(elr_el2)
240
241 DEFINE_SYSREG_READ_FUNC(midr_el1)
242 DEFINE_SYSREG_READ_FUNC(mpidr_el1)
243 DEFINE_SYSREG_READ_FUNC(id_aa64mmfr0_el1)
244 DEFINE_SYSREG_READ_FUNC(id_aa64mmfr1_el1)
245
246 DEFINE_SYSREG_RW_FUNCS(hcr_el2)
247
248 DEFINE_SYSREG_RW_FUNCS(vbar_el1)
249 DEFINE_SYSREG_RW_FUNCS(vbar_el2)
250
251 DEFINE_SYSREG_RW_FUNCS(sctlr_el1)
252 DEFINE_SYSREG_RW_FUNCS(sctlr_el2)
253
254 DEFINE_SYSREG_RW_FUNCS(actlr_el1)
255 DEFINE_SYSREG_RW_FUNCS(actlr_el2)
256
257 DEFINE_SYSREG_RW_FUNCS(esr_el1)
258 DEFINE_SYSREG_RW_FUNCS(esr_el2)
259
260 DEFINE_SYSREG_RW_FUNCS(afsr0_el1)
261 DEFINE_SYSREG_RW_FUNCS(afsr0_el2)
262
263 DEFINE_SYSREG_RW_FUNCS(afsr1_el1)
264 DEFINE_SYSREG_RW_FUNCS(afsr1_el2)
265
266 DEFINE_SYSREG_RW_FUNCS(far_el1)
267 DEFINE_SYSREG_RW_FUNCS(far_el2)
268 DEFINE_SYSREG_RW_FUNCS(hpfar_el2)
269
270 DEFINE_SYSREG_RW_FUNCS(mair_el1)
271 DEFINE_SYSREG_RW_FUNCS(mair_el2)
272
273 DEFINE_SYSREG_RW_FUNCS(amair_el1)
274 DEFINE_SYSREG_RW_FUNCS(amair_el2)
275
276 DEFINE_SYSREG_READ_FUNC(rvbar_el1)
277 DEFINE_SYSREG_READ_FUNC(rvbar_el2)
278
279 DEFINE_SYSREG_RW_FUNCS(rmr_el1)
280 DEFINE_SYSREG_RW_FUNCS(rmr_el2)
281
282 DEFINE_SYSREG_RW_FUNCS(tcr_el1)
283 DEFINE_SYSREG_RW_FUNCS(tcr_el2)
284
285 DEFINE_SYSREG_RW_FUNCS(ttbr0_el1)
286 DEFINE_SYSREG_RW_FUNCS(ttbr0_el2)
287 DEFINE_SYSREG_RW_FUNCS(ttbr1_el2)
288
289 DEFINE_SYSREG_RW_FUNCS(ttbr1_el1)
290
291 DEFINE_SYSREG_RW_FUNCS(vttbr_el2)
292
293 DEFINE_SYSREG_RW_FUNCS(cptr_el2)
294
295 DEFINE_SYSREG_RW_FUNCS(cpacr_el1)
296
297 DEFINE_SYSREG_RW_FUNCS(vpidr_el2)
298 DEFINE_SYSREG_RW_FUNCS(vmpidr_el2)
299
300 DEFINE_SYSREG_READ_FUNC(isr_el1)
301
302 DEFINE_SYSREG_RW_FUNCS(mdcr_el2)
303 DEFINE_SYSREG_RW_FUNCS(hstr_el2)
304 DEFINE_SYSREG_RW_FUNCS(pmcr_el0)
305 DEFINE_SYSREG_RW_FUNCS(mpam2_el2)
306 DEFINE_SYSREG_RW_FUNCS(mpamhcr_el2)
307 DEFINE_SYSREG_RW_FUNCS(pmscr_el2)
308
309 /*******************************************************************************
310 * Timer register accessor prototypes
311 ******************************************************************************/
312 DEFINE_SYSREG_RW_FUNCS(cntfrq_el0)
313 DEFINE_SYSREG_RW_FUNCS(cnthp_ctl_el2)
314 DEFINE_SYSREG_RW_FUNCS(cnthp_tval_el2)
315 DEFINE_SYSREG_RW_FUNCS(cnthp_cval_el2)
316 DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1)
317 DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1)
318 DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1)
319 DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el0)
320 DEFINE_SYSREG_RW_FUNCS(cntp_tval_el0)
321 DEFINE_SYSREG_RW_FUNCS(cntp_cval_el0)
322 DEFINE_SYSREG_READ_FUNC(cntpct_el0)
323 DEFINE_SYSREG_RW_FUNCS(cnthctl_el2)
324 DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el02)
325 DEFINE_SYSREG_RW_FUNCS(cntp_cval_el02)
326 DEFINE_SYSREG_RW_FUNCS(cntv_ctl_el02)
327 DEFINE_SYSREG_RW_FUNCS(cntv_cval_el02)
328 DEFINE_SYSREG_RW_FUNCS(cntvoff_el2)
329 DEFINE_RENAME_SYSREG_RW_FUNCS(cntpoff_el2, CNTPOFF_EL2)
330
331 /*******************************************************************************
332 * Interrupt Controller register accessor prototypes
333 ******************************************************************************/
334 DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2)
335 DEFINE_RENAME_SYSREG_RW_FUNCS(icc_ctrl_el1, ICC_CTLR_EL1)
336 DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir1_el2, ICC_HPPIR1_EL1)
337
338 /*******************************************************************************
339 * Virtual GIC register accessor prototypes
340 ******************************************************************************/
341 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r0_el2, ICH_AP0R0_EL2)
342 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r1_el2, ICH_AP0R1_EL2)
343 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r2_el2, ICH_AP0R2_EL2)
344 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r3_el2, ICH_AP0R3_EL2)
345 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r0_el2, ICH_AP1R0_EL2)
346 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r1_el2, ICH_AP1R1_EL2)
347 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r2_el2, ICH_AP1R2_EL2)
348 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r3_el2, ICH_AP1R3_EL2)
349
350 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr0_el2, ICH_LR0_EL2)
351 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr1_el2, ICH_LR1_EL2)
352 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr2_el2, ICH_LR2_EL2)
353 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr3_el2, ICH_LR3_EL2)
354 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr4_el2, ICH_LR4_EL2)
355 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr5_el2, ICH_LR5_EL2)
356 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr6_el2, ICH_LR6_EL2)
357 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr7_el2, ICH_LR7_EL2)
358 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr8_el2, ICH_LR8_EL2)
359 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr9_el2, ICH_LR9_EL2)
360 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr10_el2, ICH_LR10_EL2)
361 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr11_el2, ICH_LR11_EL2)
362 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr12_el2, ICH_LR12_EL2)
363 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr13_el2, ICH_LR13_EL2)
364 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr14_el2, ICH_LR14_EL2)
365 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr15_el2, ICH_LR15_EL2)
366
367 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_hcr_el2, ICH_HCR_EL2)
368 DEFINE_RENAME_SYSREG_RW_FUNCS(ich_vmcr_el2, ICH_VMCR_EL2)
369 DEFINE_RENAME_SYSREG_READ_FUNC(ich_vtr_el2, ICH_VTR_EL2)
370 DEFINE_RENAME_SYSREG_READ_FUNC(ich_misr_el2, ICH_MISR_EL2)
371
372 /* Armv8.2 Registers */
373 DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64mmfr2_el1, ID_AA64MMFR2_EL1)
374
375 /* Armv8.3 Pointer Authentication Registers */
376 DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeyhi_el1, APIAKeyHi_EL1)
377 DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeylo_el1, APIAKeyLo_EL1)
378
379 /* Armv8.5 MTE Registers */
380 DEFINE_RENAME_SYSREG_RW_FUNCS(tfsre0_el1, TFSRE0_EL1)
381 DEFINE_RENAME_SYSREG_RW_FUNCS(tfsr_el1, TFSR_EL1)
382 DEFINE_RENAME_SYSREG_RW_FUNCS(rgsr_el1, RGSR_EL1)
383 DEFINE_RENAME_SYSREG_RW_FUNCS(gcr_el1, GCR_EL1)
384
385 #endif /* ARCH_HELPERS_H */
386