1config CREATE_ARCH_SYMLINK 2 bool 3 4config HAVE_ARCH_IOREMAP 5 bool 6 7config NEEDS_MANUAL_RELOC 8 bool 9 10config SYS_CACHE_SHIFT_4 11 bool 12 13config SYS_CACHE_SHIFT_5 14 bool 15 16config SYS_CACHE_SHIFT_6 17 bool 18 19config SYS_CACHE_SHIFT_7 20 bool 21 22config SYS_CACHELINE_SIZE 23 int 24 default 128 if SYS_CACHE_SHIFT_7 25 default 64 if SYS_CACHE_SHIFT_6 26 default 32 if SYS_CACHE_SHIFT_5 27 default 16 if SYS_CACHE_SHIFT_4 28 # Fall-back for MIPS 29 default 32 if MIPS 30 31config LINKER_LIST_ALIGN 32 int 33 default 32 if SANDBOX 34 default 8 if ARM64 || X86 35 default 4 36 help 37 Force the each linker list to be aligned to this boundary. This 38 is required if ll_entry_get() is used, since otherwise the linker 39 may add padding into the table, thus breaking it. 40 See linker_lists.rst for full details. 41 42choice 43 prompt "Architecture select" 44 default SANDBOX 45 46config ARC 47 bool "ARC architecture" 48 select ARC_TIMER 49 select CLK 50 select DM 51 select HAVE_PRIVATE_LIBGCC 52 select SUPPORT_OF_CONTROL 53 select SYS_CACHE_SHIFT_7 54 select TIMER 55 56config ARM 57 bool "ARM architecture" 58 select ARCH_SUPPORTS_LTO 59 select CREATE_ARCH_SYMLINK 60 select HAVE_PRIVATE_LIBGCC if !ARM64 61 select SUPPORT_OF_CONTROL 62 63config M68K 64 bool "M68000 architecture" 65 select HAVE_PRIVATE_LIBGCC 66 select NEEDS_MANUAL_RELOC 67 select SYS_BOOT_GET_CMDLINE 68 select SYS_BOOT_GET_KBD 69 select SYS_CACHE_SHIFT_4 70 select SUPPORT_OF_CONTROL 71 72config MICROBLAZE 73 bool "MicroBlaze architecture" 74 select NEEDS_MANUAL_RELOC 75 select SUPPORT_OF_CONTROL 76 imply CMD_IRQ 77 78config MIPS 79 bool "MIPS architecture" 80 select HAVE_ARCH_IOREMAP 81 select HAVE_PRIVATE_LIBGCC 82 select SUPPORT_OF_CONTROL 83 84config NDS32 85 bool "NDS32 architecture" 86 select SUPPORT_OF_CONTROL 87 88config NIOS2 89 bool "Nios II architecture" 90 select CPU 91 select DM 92 select OF_CONTROL 93 select SUPPORT_OF_CONTROL 94 imply CMD_DM 95 96config PPC 97 bool "PowerPC architecture" 98 select HAVE_PRIVATE_LIBGCC 99 select SUPPORT_OF_CONTROL 100 select SYS_BOOT_GET_CMDLINE 101 select SYS_BOOT_GET_KBD 102 103config RISCV 104 bool "RISC-V architecture" 105 select CREATE_ARCH_SYMLINK 106 select SUPPORT_OF_CONTROL 107 select OF_CONTROL 108 select DM 109 imply DM_SERIAL 110 imply DM_ETH 111 imply DM_MMC 112 imply DM_SPI 113 imply DM_SPI_FLASH 114 imply BLK 115 imply CLK 116 imply MTD 117 imply TIMER 118 imply CMD_DM 119 imply SPL_DM 120 imply SPL_OF_CONTROL 121 imply SPL_LIBCOMMON_SUPPORT 122 imply SPL_LIBGENERIC_SUPPORT 123 imply SPL_SERIAL 124 imply SPL_TIMER 125 126config SANDBOX 127 bool "Sandbox" 128 select ARCH_SUPPORTS_LTO 129 select BOARD_LATE_INIT 130 select BZIP2 131 select CMD_POWEROFF 132 select DM 133 select DM_GPIO 134 select DM_I2C 135 select DM_KEYBOARD 136 select DM_MMC 137 select DM_SERIAL 138 select DM_SPI 139 select DM_SPI_FLASH 140 select GZIP_COMPRESSED 141 select HAVE_BLOCK_DEVICE 142 select LZO 143 select OF_BOARD_SETUP 144 select PCI_ENDPOINT 145 select SPI 146 select SUPPORT_OF_CONTROL 147 select SYSRESET_CMD_POWEROFF 148 select SYS_CACHE_SHIFT_4 149 select IRQ 150 select SUPPORT_EXTENSION_SCAN 151 imply BITREVERSE 152 select BLOBLIST 153 imply LTO 154 imply CMD_DM 155 imply CMD_EXCEPTION 156 imply CMD_GETTIME 157 imply CMD_HASH 158 imply CMD_IO 159 imply CMD_IOTRACE 160 imply CMD_LZMADEC 161 imply CMD_SATA 162 imply CMD_SF 163 imply CMD_SF_TEST 164 imply CRC32_VERIFY 165 imply FAT_WRITE 166 imply FIRMWARE 167 imply HASH_VERIFY 168 imply LZMA 169 imply SCSI 170 imply TEE 171 imply AVB_VERIFY 172 imply LIBAVB 173 imply CMD_AVB 174 imply SCP03 175 imply CMD_SCP03 176 imply UDP_FUNCTION_FASTBOOT 177 imply VIRTIO_MMIO 178 imply VIRTIO_PCI 179 imply VIRTIO_SANDBOX 180 imply VIRTIO_BLK 181 imply VIRTIO_NET 182 imply DM_SOUND 183 imply PCI_SANDBOX_EP 184 imply PCH 185 imply PHYLIB 186 imply DM_MDIO 187 imply DM_MDIO_MUX 188 imply ACPI_PMC 189 imply ACPI_PMC_SANDBOX 190 imply CMD_PMC 191 imply CMD_CLONE 192 imply SILENT_CONSOLE 193 imply BOOTARGS_SUBST 194 imply PHY_FIXED 195 imply DM_DSA 196 imply CMD_EXTENSION 197 198config SH 199 bool "SuperH architecture" 200 select HAVE_PRIVATE_LIBGCC 201 select SUPPORT_OF_CONTROL 202 203config X86 204 bool "x86 architecture" 205 select SUPPORT_SPL 206 select SUPPORT_TPL 207 select CREATE_ARCH_SYMLINK 208 select DM 209 select HAVE_ARCH_IOMAP 210 select HAVE_PRIVATE_LIBGCC 211 select OF_CONTROL 212 select PCI 213 select SUPPORT_OF_CONTROL 214 select SYS_CACHE_SHIFT_6 215 select TIMER 216 select USE_PRIVATE_LIBGCC 217 select X86_TSC_TIMER 218 select IRQ 219 imply HAS_ROM if X86_RESET_VECTOR 220 imply BLK 221 imply CMD_DM 222 imply CMD_FPGA_LOADMK 223 imply CMD_GETTIME 224 imply CMD_IO 225 imply CMD_IRQ 226 imply CMD_PCI 227 imply CMD_SF 228 imply CMD_SF_TEST 229 imply CMD_ZBOOT 230 imply DM_ETH 231 imply DM_GPIO 232 imply DM_KEYBOARD 233 imply DM_MMC 234 imply DM_RTC 235 imply DM_SCSI 236 imply DM_SERIAL 237 imply DM_SPI 238 imply DM_SPI_FLASH 239 imply DM_USB 240 imply DM_VIDEO 241 imply SYSRESET 242 imply SPL_SYSRESET 243 imply SYSRESET_X86 244 imply USB_ETHER_ASIX 245 imply USB_ETHER_SMSC95XX 246 imply USB_HOST_ETHER 247 imply PCH 248 imply RTC_MC146818 249 imply ACPIGEN if !QEMU 250 imply SYSINFO if GENERATE_SMBIOS_TABLE 251 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE 252 253 # Thing to enable for when SPL/TPL are enabled: SPL 254 imply SPL_DM 255 imply SPL_OF_LIBFDT 256 imply SPL_DRIVERS_MISC 257 imply SPL_GPIO 258 imply SPL_PINCTRL 259 imply SPL_LIBCOMMON_SUPPORT 260 imply SPL_LIBGENERIC_SUPPORT 261 imply SPL_SERIAL 262 imply SPL_SPI_FLASH_SUPPORT 263 imply SPL_SPI 264 imply SPL_OF_CONTROL 265 imply SPL_TIMER 266 imply SPL_REGMAP 267 imply SPL_SYSCON 268 # TPL 269 imply TPL_DM 270 imply TPL_DRIVERS_MISC 271 imply TPL_GPIO 272 imply TPL_PINCTRL 273 imply TPL_LIBCOMMON_SUPPORT 274 imply TPL_LIBGENERIC_SUPPORT 275 imply TPL_SERIAL 276 imply TPL_OF_CONTROL 277 imply TPL_TIMER 278 imply TPL_REGMAP 279 imply TPL_SYSCON 280 281config XTENSA 282 bool "Xtensa architecture" 283 select CREATE_ARCH_SYMLINK 284 select SUPPORT_OF_CONTROL 285 286endchoice 287 288config SYS_ARCH 289 string 290 help 291 This option should contain the architecture name to build the 292 appropriate arch/<CONFIG_SYS_ARCH> directory. 293 All the architectures should specify this option correctly. 294 295config SYS_CPU 296 string 297 help 298 This option should contain the CPU name to build the correct 299 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory. 300 301 This is optional. For those targets without the CPU directory, 302 leave this option empty. 303 304config SYS_SOC 305 string 306 help 307 This option should contain the SoC name to build the directory 308 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>. 309 310 This is optional. For those targets without the SoC directory, 311 leave this option empty. 312 313config SYS_VENDOR 314 string 315 help 316 This option should contain the vendor name of the target board. 317 If it is set and 318 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common 319 directory is compiled. 320 If CONFIG_SYS_BOARD is also set, the sources under 321 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled. 322 323 This is optional. For those targets without the vendor directory, 324 leave this option empty. 325 326config SYS_BOARD 327 string 328 help 329 This option should contain the name of the target board. 330 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> 331 or board/<CONFIG_SYS_BOARD> directory is compiled depending on 332 whether CONFIG_SYS_VENDOR is set or not. 333 334 This is optional. For those targets without the board directory, 335 leave this option empty. 336 337config SYS_CONFIG_NAME 338 string 339 help 340 This option should contain the base name of board header file. 341 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h 342 should be included from include/config.h. 343 344config SYS_DISABLE_DCACHE_OPS 345 bool 346 help 347 This option disables dcache flush and dcache invalidation 348 operations. For example, on coherent systems where cache 349 operatios are not required, enable this option to avoid them. 350 Note that, its up to the individual architectures to implement 351 this functionality. 352 353config SKIP_LOWLEVEL_INIT 354 bool "Skip the calls to certain low level initialization functions" 355 depends on ARM || NDS32 || MIPS || RISCV 356 help 357 If enabled, then certain low level initializations (like setting up 358 the memory controller) are omitted and/or U-Boot does not relocate 359 itself into RAM. 360 Normally this variable MUST NOT be defined. The only exception is 361 when U-Boot is loaded (to RAM) by some other boot loader or by a 362 debugger which performs these initializations itself. 363 364config SPL_SKIP_LOWLEVEL_INIT 365 bool "Skip the calls to certain low level initialization functions" 366 depends on SPL && (ARM || NDS32 || MIPS || RISCV) 367 help 368 If enabled, then certain low level initializations (like setting up 369 the memory controller) are omitted and/or U-Boot does not relocate 370 itself into RAM. 371 Normally this variable MUST NOT be defined. The only exception is 372 when U-Boot is loaded (to RAM) by some other boot loader or by a 373 debugger which performs these initializations itself. 374 375config TPL_SKIP_LOWLEVEL_INIT 376 bool "Skip the calls to certain low level initialization functions" 377 depends on SPL && ARM 378 help 379 If enabled, then certain low level initializations (like setting up 380 the memory controller) are omitted and/or U-Boot does not relocate 381 itself into RAM. 382 Normally this variable MUST NOT be defined. The only exception is 383 when U-Boot is loaded (to RAM) by some other boot loader or by a 384 debugger which performs these initializations itself. 385 386config SKIP_LOWLEVEL_INIT_ONLY 387 bool "Skip the call to lowlevel_init during early boot ONLY" 388 depends on ARM 389 help 390 This allows just the call to lowlevel_init() to be skipped. The 391 normal CP15 init (such as enabling the instruction cache) is still 392 performed. 393 394config SPL_SKIP_LOWLEVEL_INIT_ONLY 395 bool "Skip the call to lowlevel_init during early boot ONLY" 396 depends on SPL && ARM 397 help 398 This allows just the call to lowlevel_init() to be skipped. The 399 normal CP15 init (such as enabling the instruction cache) is still 400 performed. 401 402config TPL_SKIP_LOWLEVEL_INIT_ONLY 403 bool "Skip the call to lowlevel_init during early boot ONLY" 404 depends on TPL && ARM 405 help 406 This allows just the call to lowlevel_init() to be skipped. The 407 normal CP15 init (such as enabling the instruction cache) is still 408 performed. 409 410source "arch/arc/Kconfig" 411source "arch/arm/Kconfig" 412source "arch/m68k/Kconfig" 413source "arch/microblaze/Kconfig" 414source "arch/mips/Kconfig" 415source "arch/nds32/Kconfig" 416source "arch/nios2/Kconfig" 417source "arch/powerpc/Kconfig" 418source "arch/sandbox/Kconfig" 419source "arch/sh/Kconfig" 420source "arch/x86/Kconfig" 421source "arch/xtensa/Kconfig" 422source "arch/riscv/Kconfig" 423