1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Samsung's Exynos7880 SoC pin-mux and pin-config device tree source
4 *
5 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
6 *		http://www.samsung.com
7 * Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14/ {
15	/* ALIVE */
16	gpio@139F0000 {
17		etc0: etc0 {
18			gpio-controller;
19			#gpio-cells = <2>;
20		};
21
22		etc1: etc1 {
23			gpio-controller;
24			#gpio-cells = <2>;
25		};
26
27		gpa0: gpa0 {
28			gpio-controller;
29			#gpio-cells = <2>;
30		};
31
32		gpa1: gpa1 {
33			gpio-controller;
34			#gpio-cells = <2>;
35		};
36
37		gpa2: gpa2 {
38			gpio-controller;
39			#gpio-cells = <2>;
40		};
41
42		gpa3: gpa3 {
43			gpio-controller;
44			#gpio-cells = <2>;
45		};
46
47		gpq0: gpq0 {
48			gpio-controller;
49			#gpio-cells = <2>;
50		};
51	};
52
53	/* CCORE */
54	gpio@10630000 {
55		gpm0: gpm0 {
56			gpio-controller;
57			#gpio-cells = <2>;
58		};
59	};
60
61	/* DISP/AUD */
62	gpio@148C0000 {
63		gpz0: gpz0 {
64			gpio-controller;
65			#gpio-cells = <2>;
66		};
67
68		gpz1: gpz1 {
69			gpio-controller;
70			#gpio-cells = <2>;
71		};
72
73		gpz2: gpz2 {
74			gpio-controller;
75			#gpio-cells = <2>;
76		};
77	};
78
79	/* FSYS0 */
80	gpio@13750000 {
81		gpr0: gpr0 {
82			gpio-controller;
83			#gpio-cells = <2>;
84		};
85
86		gpr1: gpr1 {
87			gpio-controller;
88			#gpio-cells = <2>;
89		};
90
91		gpr2: gpr2 {
92			gpio-controller;
93			#gpio-cells = <2>;
94		};
95
96		gpr3: gpr3 {
97			gpio-controller;
98			#gpio-cells = <2>;
99		};
100
101		gpr4: gpr4 {
102			gpio-controller;
103			#gpio-cells = <2>;
104		};
105	};
106
107	/* TOP */
108	gpio@139B0000 {
109		gpb0: gpb0 {
110			gpio-controller;
111			#gpio-cells = <2>;
112		};
113
114		gpc0: gpc0 {
115			gpio-controller;
116			#gpio-cells = <2>;
117		};
118
119		gpc1: gpc1 {
120			gpio-controller;
121			#gpio-cells = <2>;
122		};
123
124		gpc4: gpc4 {
125			gpio-controller;
126			#gpio-cells = <2>;
127		};
128
129		gpc5: gpc5 {
130			gpio-controller;
131			#gpio-cells = <2>;
132		};
133
134		gpc6: gpc6 {
135			gpio-controller;
136			#gpio-cells = <2>;
137		};
138
139		gpc8: gpc8 {
140			gpio-controller;
141			#gpio-cells = <2>;
142		};
143
144		gpc9: gpc9 {
145			gpio-controller;
146			#gpio-cells = <2>;
147		};
148
149		gpd1: gpd1 {
150			gpio-controller;
151			#gpio-cells = <2>;
152		};
153
154		gpd2: gpd2 {
155			gpio-controller;
156			#gpio-cells = <2>;
157		};
158
159		gpd3: gpd3 {
160			gpio-controller;
161			#gpio-cells = <2>;
162		};
163
164		gpd4: gpd4 {
165			gpio-controller;
166			#gpio-cells = <2>;
167		};
168
169		gpd5: gpd5 {
170			gpio-controller;
171			#gpio-cells = <2>;
172		};
173
174		gpe0: gpe0 {
175			gpio-controller;
176			#gpio-cells = <2>;
177		};
178
179		gpf0: gpf0 {
180			gpio-controller;
181			#gpio-cells = <2>;
182		};
183
184		gpf1: gpf1 {
185			gpio-controller;
186			#gpio-cells = <2>;
187		};
188
189		gpf2: gpf2 {
190			gpio-controller;
191			#gpio-cells = <2>;
192		};
193
194		gpf3: gpf3 {
195			gpio-controller;
196			#gpio-cells = <2>;
197		};
198
199		gpf4: gpf4 {
200			gpio-controller;
201			#gpio-cells = <2>;
202		};
203	};
204};
205