1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2007-2008
4 * Stelian Pop <stelian@popies.net>
5 * Lead Tech Design <www.leadtechdesign.com>
6 */
7
8 #include <common.h>
9 #include <asm/io.h>
10 #include <asm/arch/at91_common.h>
11 #include <asm/arch/clk.h>
12 #include <asm/arch/gpio.h>
13
14 /*
15 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
16 * peripheral pins. Good to have if hardware is soldered optionally
17 * or in case of SPI no slave is selected. Avoid lines to float
18 * needlessly. Use a short local PUP define.
19 *
20 * Due to errata "TXD floats when CTS is inactive" pullups are always
21 * on for TXD pins.
22 */
23 #ifdef CONFIG_AT91_GPIO_PULLUP
24 # define PUP CONFIG_AT91_GPIO_PULLUP
25 #else
26 # define PUP 0
27 #endif
28
at91_serial0_hw_init(void)29 void at91_serial0_hw_init(void)
30 {
31 at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
32 at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
33 at91_periph_clk_enable(ATMEL_ID_USART0);
34 }
35
at91_serial1_hw_init(void)36 void at91_serial1_hw_init(void)
37 {
38 at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
39 at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
40 at91_periph_clk_enable(ATMEL_ID_USART1);
41 }
42
at91_serial2_hw_init(void)43 void at91_serial2_hw_init(void)
44 {
45 at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
46 at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
47 at91_periph_clk_enable(ATMEL_ID_USART2);
48 }
49
at91_seriald_hw_init(void)50 void at91_seriald_hw_init(void)
51 {
52 at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
53 at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
54 at91_periph_clk_enable(ATMEL_ID_SYS);
55 }
56
57 #ifdef CONFIG_ATMEL_SPI
at91_spi0_hw_init(unsigned long cs_mask)58 void at91_spi0_hw_init(unsigned long cs_mask)
59 {
60 at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
61 at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
62 at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
63
64 at91_periph_clk_enable(ATMEL_ID_SPI0);
65
66 if (cs_mask & (1 << 0)) {
67 at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
68 }
69 if (cs_mask & (1 << 1)) {
70 at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
71 }
72 if (cs_mask & (1 << 2)) {
73 at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
74 }
75 if (cs_mask & (1 << 3)) {
76 at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
77 }
78 if (cs_mask & (1 << 4)) {
79 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
80 }
81 if (cs_mask & (1 << 5)) {
82 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
83 }
84 if (cs_mask & (1 << 6)) {
85 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
86 }
87 if (cs_mask & (1 << 7)) {
88 at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
89 }
90 }
91
at91_spi1_hw_init(unsigned long cs_mask)92 void at91_spi1_hw_init(unsigned long cs_mask)
93 {
94 at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */
95 at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */
96 at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */
97
98 at91_periph_clk_enable(ATMEL_ID_SPI1);
99
100 if (cs_mask & (1 << 0)) {
101 at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
102 }
103 if (cs_mask & (1 << 1)) {
104 at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
105 }
106 if (cs_mask & (1 << 2)) {
107 at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
108 }
109 if (cs_mask & (1 << 3)) {
110 at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
111 }
112 if (cs_mask & (1 << 4)) {
113 at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
114 }
115 if (cs_mask & (1 << 5)) {
116 at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
117 }
118 if (cs_mask & (1 << 6)) {
119 at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
120 }
121 if (cs_mask & (1 << 7)) {
122 at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
123 }
124 }
125 #endif
126