1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AM642: SoC specific initialization
4 *
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
6 * Keerthy <j-keerthy@ti.com>
7 * Dave Gerlach <d-gerlach@ti.com>
8 */
9
10 #include <common.h>
11 #include <fdt_support.h>
12 #include <spl.h>
13 #include <asm/io.h>
14 #include <asm/arch/hardware.h>
15 #include <asm/arch/sysfw-loader.h>
16 #include <asm/arch/sys_proto.h>
17 #include "common.h"
18 #include <asm/arch/sys_proto.h>
19 #include <linux/soc/ti/ti_sci_protocol.h>
20 #include <dm.h>
21 #include <dm/uclass-internal.h>
22 #include <dm/pinctrl.h>
23 #include <mmc.h>
24 #include <dm/root.h>
25
26 #if defined(CONFIG_SPL_BUILD)
27
ctrl_mmr_unlock(void)28 static void ctrl_mmr_unlock(void)
29 {
30 /* Unlock all PADCFG_MMR1 module registers */
31 mmr_unlock(PADCFG_MMR1_BASE, 1);
32
33 /* Unlock all CTRL_MMR0 module registers */
34 mmr_unlock(CTRL_MMR0_BASE, 0);
35 mmr_unlock(CTRL_MMR0_BASE, 1);
36 mmr_unlock(CTRL_MMR0_BASE, 2);
37 mmr_unlock(CTRL_MMR0_BASE, 3);
38 mmr_unlock(CTRL_MMR0_BASE, 5);
39 mmr_unlock(CTRL_MMR0_BASE, 6);
40 }
41
42 /*
43 * This uninitialized global variable would normal end up in the .bss section,
44 * but the .bss is cleared between writing and reading this variable, so move
45 * it to the .data section.
46 */
47 u32 bootindex __section(".data");
48 static struct rom_extended_boot_data bootdata __section(".data");
49
store_boot_info_from_rom(void)50 static void store_boot_info_from_rom(void)
51 {
52 bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
53 memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
54 sizeof(struct rom_extended_boot_data));
55 }
56
57 #if defined(CONFIG_K3_LOAD_SYSFW) && CONFIG_IS_ENABLED(DM_MMC)
k3_mmc_stop_clock(void)58 void k3_mmc_stop_clock(void)
59 {
60 if (spl_boot_device() == BOOT_DEVICE_MMC1) {
61 struct mmc *mmc = find_mmc_device(0);
62
63 if (!mmc)
64 return;
65
66 mmc->saved_clock = mmc->clock;
67 mmc_set_clock(mmc, 0, true);
68 }
69 }
70
k3_mmc_restart_clock(void)71 void k3_mmc_restart_clock(void)
72 {
73 if (spl_boot_device() == BOOT_DEVICE_MMC1) {
74 struct mmc *mmc = find_mmc_device(0);
75
76 if (!mmc)
77 return;
78
79 mmc_set_clock(mmc, mmc->saved_clock, false);
80 }
81 }
82 #else
k3_mmc_stop_clock(void)83 void k3_mmc_stop_clock(void) {}
k3_mmc_restart_clock(void)84 void k3_mmc_restart_clock(void) {}
85 #endif
86
87 #ifdef CONFIG_SPL_OF_LIST
do_dt_magic(void)88 void do_dt_magic(void)
89 {
90 int ret, rescan;
91
92 if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
93 do_board_detect();
94
95 /*
96 * Board detection has been done.
97 * Let us see if another dtb wouldn't be a better match
98 * for our board
99 */
100 if (IS_ENABLED(CONFIG_CPU_V7R)) {
101 ret = fdtdec_resetup(&rescan);
102 if (!ret && rescan) {
103 dm_uninit();
104 dm_init_and_scan(true);
105 }
106 }
107 }
108 #endif
109
110 #if CONFIG_IS_ENABLED(USB_STORAGE)
fixup_usb_boot(const void * fdt_blob)111 static int fixup_usb_boot(const void *fdt_blob)
112 {
113 int ret = 0;
114
115 switch (spl_boot_device()) {
116 case BOOT_DEVICE_USB:
117 /*
118 * If the boot mode is host, fixup the dr_mode to host
119 * before cdns3 bind takes place
120 */
121 ret = fdt_find_and_setprop((void *)fdt_blob,
122 "/bus@f4000/cdns-usb@f900000/usb@f400000",
123 "dr_mode", "host", 5, 0);
124 if (ret)
125 printf("%s: fdt_find_and_setprop() failed:%d\n",
126 __func__, ret);
127 fallthrough;
128 default:
129 break;
130 }
131
132 return ret;
133 }
134
fdtdec_board_setup(const void * fdt_blob)135 int fdtdec_board_setup(const void *fdt_blob)
136 {
137 /* Can use the pointer from the function parameters */
138 return fixup_usb_boot(fdt_blob);
139 }
140 #endif
141
board_init_f(ulong dummy)142 void board_init_f(ulong dummy)
143 {
144 #if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS)
145 struct udevice *dev;
146 int ret;
147 #endif
148
149 #if defined(CONFIG_CPU_V7R)
150 setup_k3_mpu_regions();
151 #endif
152
153 /*
154 * Cannot delay this further as there is a chance that
155 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
156 */
157 store_boot_info_from_rom();
158
159 ctrl_mmr_unlock();
160
161 /* Init DM early */
162 spl_early_init();
163
164 preloader_console_init();
165
166 do_dt_magic();
167
168 #if defined(CONFIG_K3_LOAD_SYSFW)
169 /*
170 * Process pinctrl for serial3 a.k.a. MAIN UART1 module and continue
171 * regardless of the result of pinctrl. Do this without probing the
172 * device, but instead by searching the device that would request the
173 * given sequence number if probed. The UART will be used by the system
174 * firmware (SYSFW) image for various purposes and SYSFW depends on us
175 * to initialize its pin settings.
176 */
177 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
178 if (!ret)
179 pinctrl_select_state(dev, "default");
180
181 /*
182 * Load, start up, and configure system controller firmware.
183 * This will determine whether or not ROM has already loaded
184 * system firmware and if so, will only perform needed config
185 * and not attempt to load firmware again.
186 */
187 k3_sysfw_loader(is_rom_loaded_sysfw(&bootdata), k3_mmc_stop_clock,
188 k3_mmc_restart_clock);
189 #endif
190
191 /* Output System Firmware version info */
192 k3_sysfw_print_ver();
193
194 #if defined(CONFIG_K3_AM64_DDRSS)
195 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
196 if (ret)
197 panic("DRAM init failed: %d\n", ret);
198 #endif
199 }
200
spl_mmc_boot_mode(const u32 boot_device)201 u32 spl_mmc_boot_mode(const u32 boot_device)
202 {
203 switch (boot_device) {
204 case BOOT_DEVICE_MMC1:
205 return MMCSD_MODE_EMMCBOOT;
206
207 case BOOT_DEVICE_MMC2:
208 return MMCSD_MODE_FS;
209
210 default:
211 return MMCSD_MODE_RAW;
212 }
213 }
214
__get_backup_bootmedia(u32 main_devstat)215 static u32 __get_backup_bootmedia(u32 main_devstat)
216 {
217 u32 bkup_bootmode =
218 (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
219 MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
220 u32 bkup_bootmode_cfg =
221 (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
222 MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
223
224 switch (bkup_bootmode) {
225 case BACKUP_BOOT_DEVICE_UART:
226 return BOOT_DEVICE_UART;
227
228 case BACKUP_BOOT_DEVICE_DFU:
229 if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
230 return BOOT_DEVICE_USB;
231 return BOOT_DEVICE_DFU;
232
233
234 case BACKUP_BOOT_DEVICE_ETHERNET:
235 return BOOT_DEVICE_ETHERNET;
236
237 case BACKUP_BOOT_DEVICE_MMC:
238 if (bkup_bootmode_cfg)
239 return BOOT_DEVICE_MMC2;
240 return BOOT_DEVICE_MMC1;
241
242 case BACKUP_BOOT_DEVICE_SPI:
243 return BOOT_DEVICE_SPI;
244
245 case BACKUP_BOOT_DEVICE_I2C:
246 return BOOT_DEVICE_I2C;
247 };
248
249 return BOOT_DEVICE_RAM;
250 }
251
__get_primary_bootmedia(u32 main_devstat)252 static u32 __get_primary_bootmedia(u32 main_devstat)
253 {
254 u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
255 MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
256 u32 bootmode_cfg =
257 (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
258 MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
259
260 switch (bootmode) {
261 case BOOT_DEVICE_OSPI:
262 fallthrough;
263 case BOOT_DEVICE_QSPI:
264 fallthrough;
265 case BOOT_DEVICE_XSPI:
266 fallthrough;
267 case BOOT_DEVICE_SPI:
268 return BOOT_DEVICE_SPI;
269
270 case BOOT_DEVICE_ETHERNET_RGMII:
271 fallthrough;
272 case BOOT_DEVICE_ETHERNET_RMII:
273 return BOOT_DEVICE_ETHERNET;
274
275 case BOOT_DEVICE_EMMC:
276 return BOOT_DEVICE_MMC1;
277
278 case BOOT_DEVICE_MMC:
279 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
280 MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
281 return BOOT_DEVICE_MMC2;
282 return BOOT_DEVICE_MMC1;
283
284 case BOOT_DEVICE_DFU:
285 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
286 MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
287 return BOOT_DEVICE_USB;
288 return BOOT_DEVICE_DFU;
289
290 case BOOT_DEVICE_NOBOOT:
291 return BOOT_DEVICE_RAM;
292 }
293
294 return bootmode;
295 }
296
spl_boot_device(void)297 u32 spl_boot_device(void)
298 {
299 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
300
301 if (bootindex == K3_PRIMARY_BOOTMODE)
302 return __get_primary_bootmedia(devstat);
303 else
304 return __get_backup_bootmedia(devstat);
305 }
306 #endif
307
308 #if defined(CONFIG_SYS_K3_SPL_ATF)
309
310 #define AM64X_DEV_RTI8 127
311 #define AM64X_DEV_RTI9 128
312 #define AM64X_DEV_R5FSS0_CORE0 121
313 #define AM64X_DEV_R5FSS0_CORE1 122
314
release_resources_for_core_shutdown(void)315 void release_resources_for_core_shutdown(void)
316 {
317 struct ti_sci_handle *ti_sci = get_ti_sci_handle();
318 struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
319 struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
320 int ret;
321 u32 i;
322
323 const u32 put_device_ids[] = {
324 AM64X_DEV_RTI9,
325 AM64X_DEV_RTI8,
326 };
327
328 /* Iterate through list of devices to put (shutdown) */
329 for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
330 u32 id = put_device_ids[i];
331
332 ret = dev_ops->put_device(ti_sci, id);
333 if (ret)
334 panic("Failed to put device %u (%d)\n", id, ret);
335 }
336
337 const u32 put_core_ids[] = {
338 AM64X_DEV_R5FSS0_CORE1,
339 AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
340 };
341
342 /* Iterate through list of cores to put (shutdown) */
343 for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
344 u32 id = put_core_ids[i];
345
346 /*
347 * Queue up the core shutdown request. Note that this call
348 * needs to be followed up by an actual invocation of an WFE
349 * or WFI CPU instruction.
350 */
351 ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
352 if (ret)
353 panic("Failed sending core %u shutdown message (%d)\n",
354 id, ret);
355 }
356 }
357 #endif
358