1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
4 * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7 #include <common.h>
8 #include <init.h>
9 #include <log.h>
10 #include <net.h>
11 #include <asm/arch/boot.h>
12 #include <asm/arch/eth.h>
13 #include <asm/arch/g12a.h>
14 #include <asm/arch/mem.h>
15 #include <asm/arch/meson-vpu.h>
16 #include <asm/global_data.h>
17 #include <asm/io.h>
18 #include <asm/armv8/mmu.h>
19 #include <linux/sizes.h>
20 #include <usb.h>
21 #include <linux/usb/otg.h>
22 #include <asm/arch/usb.h>
23 #include <usb/dwc2_udc.h>
24 #include <phy.h>
25 #include <clk.h>
26
27 DECLARE_GLOBAL_DATA_PTR;
28
meson_get_boot_device(void)29 int meson_get_boot_device(void)
30 {
31 return readl(G12A_AO_SEC_GP_CFG0) & G12A_AO_BOOT_DEVICE;
32 }
33
34 /* Configure the reserved memory zones exported by the secure registers
35 * into EFI and DTB reserved memory entries.
36 */
meson_init_reserved_memory(void * fdt)37 void meson_init_reserved_memory(void *fdt)
38 {
39 u64 bl31_size, bl31_start;
40 u64 bl32_size, bl32_start;
41 u32 reg;
42
43 /*
44 * Get ARM Trusted Firmware reserved memory zones in :
45 * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
46 * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
47 * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
48 */
49 reg = readl(G12A_AO_SEC_GP_CFG3);
50
51 bl31_size = ((reg & G12A_AO_BL31_RSVMEM_SIZE_MASK)
52 >> G12A_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
53 bl32_size = (reg & G12A_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
54
55 bl31_start = readl(G12A_AO_SEC_GP_CFG5);
56 bl32_start = readl(G12A_AO_SEC_GP_CFG4);
57
58 /* Add BL31 reserved zone */
59 if (bl31_start && bl31_size)
60 meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);
61
62 /* Add BL32 reserved zone */
63 if (bl32_start && bl32_size)
64 meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
65
66 #if defined(CONFIG_VIDEO_MESON)
67 meson_vpu_rsv_fb(fdt);
68 #endif
69 }
70
get_effective_memsize(void)71 phys_size_t get_effective_memsize(void)
72 {
73 /* Size is reported in MiB, convert it in bytes */
74 return min(((readl(G12A_AO_SEC_GP_CFG0) & G12A_AO_MEM_SIZE_MASK)
75 >> G12A_AO_MEM_SIZE_SHIFT) * SZ_1M, 0xf5000000);
76 }
77
78 static struct mm_region g12a_mem_map[] = {
79 {
80 .virt = 0x0UL,
81 .phys = 0x0UL,
82 .size = 0xf5000000UL,
83 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
84 PTE_BLOCK_INNER_SHARE
85 }, {
86 .virt = 0xf5000000UL,
87 .phys = 0xf5000000UL,
88 .size = 0x0b000000UL,
89 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
90 PTE_BLOCK_NON_SHARE |
91 PTE_BLOCK_PXN | PTE_BLOCK_UXN
92 }, {
93 /* List terminator */
94 0,
95 }
96 };
97
98 struct mm_region *mem_map = g12a_mem_map;
99
100 #if CONFIG_IS_ENABLED(USB_DWC3_MESON_G12A) && \
101 CONFIG_IS_ENABLED(USB_GADGET_DWC2_OTG)
102 static struct dwc2_plat_otg_data meson_g12a_dwc2_data;
103
board_usb_init(int index,enum usb_init_type init)104 int board_usb_init(int index, enum usb_init_type init)
105 {
106 struct fdtdec_phandle_args args;
107 const void *blob = gd->fdt_blob;
108 int node, dwc2_node;
109 struct udevice *dev, *clk_dev;
110 struct clk clk;
111 int ret;
112
113 /* find the usb glue node */
114 node = fdt_node_offset_by_compatible(blob, -1,
115 "amlogic,meson-g12a-usb-ctrl");
116 if (node < 0) {
117 debug("Not found usb-control node\n");
118 return -ENODEV;
119 }
120
121 if (!fdtdec_get_is_enabled(blob, node)) {
122 debug("usb is disabled in the device tree\n");
123 return -ENODEV;
124 }
125
126 ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev);
127 if (ret) {
128 debug("Not found usb-control device\n");
129 return ret;
130 }
131
132 /* find the dwc2 node */
133 dwc2_node = fdt_node_offset_by_compatible(blob, node,
134 "amlogic,meson-g12a-usb");
135 if (dwc2_node < 0) {
136 debug("Not found dwc2 node\n");
137 return -ENODEV;
138 }
139
140 if (!fdtdec_get_is_enabled(blob, dwc2_node)) {
141 debug("dwc2 is disabled in the device tree\n");
142 return -ENODEV;
143 }
144
145 meson_g12a_dwc2_data.regs_otg = fdtdec_get_addr(blob, dwc2_node, "reg");
146 if (meson_g12a_dwc2_data.regs_otg == FDT_ADDR_T_NONE) {
147 debug("usbotg: can't get base address\n");
148 return -ENODATA;
149 }
150
151 /* Enable clock */
152 ret = fdtdec_parse_phandle_with_args(blob, dwc2_node, "clocks",
153 "#clock-cells", 0, 0, &args);
154 if (ret) {
155 debug("usbotg has no clocks defined in the device tree\n");
156 return ret;
157 }
158
159 ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, &clk_dev);
160 if (ret)
161 return ret;
162
163 if (args.args_count != 1) {
164 debug("Can't find clock ID in the device tree\n");
165 return -ENODATA;
166 }
167
168 clk.dev = clk_dev;
169 clk.id = args.args[0];
170
171 ret = clk_enable(&clk);
172 if (ret) {
173 debug("Failed to enable usbotg clock\n");
174 return ret;
175 }
176
177 meson_g12a_dwc2_data.rx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
178 "g-rx-fifo-size", 0);
179 meson_g12a_dwc2_data.np_tx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
180 "g-np-tx-fifo-size", 0);
181 meson_g12a_dwc2_data.tx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
182 "g-tx-fifo-size", 0);
183
184 /* Switch to peripheral mode */
185 ret = dwc3_meson_g12a_force_mode(dev, USB_DR_MODE_PERIPHERAL);
186 if (ret)
187 return ret;
188
189 return dwc2_udc_probe(&meson_g12a_dwc2_data);
190 }
191
board_usb_cleanup(int index,enum usb_init_type init)192 int board_usb_cleanup(int index, enum usb_init_type init)
193 {
194 const void *blob = gd->fdt_blob;
195 struct udevice *dev;
196 int node;
197 int ret;
198
199 /* find the usb glue node */
200 node = fdt_node_offset_by_compatible(blob, -1,
201 "amlogic,meson-g12a-usb-ctrl");
202 if (node < 0)
203 return -ENODEV;
204
205 if (!fdtdec_get_is_enabled(blob, node))
206 return -ENODEV;
207
208 ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev);
209 if (ret)
210 return ret;
211
212 /* Switch to OTG mode */
213 ret = dwc3_meson_g12a_force_mode(dev, USB_DR_MODE_HOST);
214 if (ret)
215 return ret;
216
217 return 0;
218 }
219 #endif
220