1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <hang.h>
10 #include <init.h>
11 #include <log.h>
12 #include <ram.h>
13 #include <spl.h>
14 #include <version.h>
15 #include <asm/io.h>
16 #include <asm/arch-rockchip/bootrom.h>
17 #include <linux/bitops.h>
18
19 #if CONFIG_IS_ENABLED(BANNER_PRINT)
20 #include <timestamp.h>
21 #endif
22
23 #define TIMER_LOAD_COUNT_L 0x00
24 #define TIMER_LOAD_COUNT_H 0x04
25 #define TIMER_CONTROL_REG 0x10
26 #define TIMER_EN 0x1
27 #define TIMER_FMODE BIT(0)
28 #define TIMER_RMODE BIT(1)
29
rockchip_stimer_init(void)30 __weak void rockchip_stimer_init(void)
31 {
32 /* If Timer already enabled, don't re-init it */
33 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
34
35 if (reg & TIMER_EN)
36 return;
37
38 #ifndef CONFIG_ARM64
39 asm volatile("mcr p15, 0, %0, c14, c0, 0"
40 : : "r"(COUNTER_FREQUENCY));
41 #endif
42
43 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
44 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
45 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
46 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
47 TIMER_CONTROL_REG);
48 }
49
board_init_f(ulong dummy)50 void board_init_f(ulong dummy)
51 {
52 struct udevice *dev;
53 int ret;
54
55 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL)
56 /*
57 * Debug UART can be used from here if required:
58 *
59 * debug_uart_init();
60 * printch('a');
61 * printhex8(0x1234);
62 * printascii("string");
63 */
64 debug_uart_init();
65 #ifdef CONFIG_TPL_BANNER_PRINT
66 printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
67 U_BOOT_TIME ")\n");
68 #endif
69 #endif
70 ret = spl_early_init();
71 if (ret) {
72 debug("spl_early_init() failed: %d\n", ret);
73 hang();
74 }
75
76 /* Init secure timer */
77 rockchip_stimer_init();
78 /* Init ARM arch timer in arch/arm/cpu/ */
79 timer_init();
80
81 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
82 if (ret) {
83 printf("DRAM init failed: %d\n", ret);
84 return;
85 }
86 }
87
board_return_to_bootrom(struct spl_image_info * spl_image,struct spl_boot_device * bootdev)88 int board_return_to_bootrom(struct spl_image_info *spl_image,
89 struct spl_boot_device *bootdev)
90 {
91 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
92
93 return 0;
94 }
95
spl_boot_device(void)96 u32 spl_boot_device(void)
97 {
98 return BOOT_DEVICE_BOOTROM;
99 }
100