1if ARCH_STM32MP 2 3config SPL 4 select SPL_BOARD_INIT 5 select SPL_CLK 6 select SPL_DM 7 select SPL_DM_SEQ_ALIAS 8 select SPL_DRIVERS_MISC 9 select SPL_FRAMEWORK 10 select SPL_GPIO 11 select SPL_LIBCOMMON_SUPPORT 12 select SPL_LIBGENERIC_SUPPORT 13 select SPL_OF_CONTROL 14 select SPL_OF_TRANSLATE 15 select SPL_PINCTRL 16 select SPL_REGMAP 17 select SPL_DM_RESET 18 select SPL_SERIAL 19 select SPL_SYSCON 20 select SPL_WATCHDOG if WATCHDOG 21 imply BOOTSTAGE_STASH if SPL_BOOTSTAGE 22 imply SPL_BOOTSTAGE if BOOTSTAGE 23 imply SPL_DISPLAY_PRINT 24 imply SPL_LIBDISK_SUPPORT 25 imply SPL_SPI_LOAD if SPL_SPI 26 27config SYS_SOC 28 default "stm32mp" 29 30config SYS_MALLOC_LEN 31 default 0x2000000 32 33config ENV_SIZE 34 default 0x2000 35 36config STM32MP15x 37 bool "Support STMicroelectronics STM32MP15x Soc" 38 select ARCH_SUPPORT_PSCI if !TFABOOT 39 select ARM_SMCCC if TFABOOT 40 select CPU_V7A 41 select CPU_V7_HAS_NONSEC if !TFABOOT 42 select CPU_V7_HAS_VIRT 43 select OF_BOARD_SETUP 44 select PINCTRL_STM32 45 select STM32_RCC 46 select STM32_RESET 47 select STM32_SERIAL 48 select SYS_ARCH_TIMER 49 imply CMD_NVEDIT_INFO 50 imply SYSRESET_PSCI if TFABOOT 51 imply SYSRESET_SYSCON if !TFABOOT 52 help 53 support of STMicroelectronics SOC STM32MP15x family 54 STM32MP157, STM32MP153 or STM32MP151 55 STMicroelectronics MPU with core ARMv7 56 dual core A7 for STM32MP157/3, monocore for STM32MP151 57 target all the STMicroelectronics board with SOC STM32MP1 family 58 59config STM32MP15x_STM32IMAGE 60 bool "Support STM32 image for generated U-Boot image" 61 depends on STM32MP15x && TFABOOT 62 help 63 Support of STM32 image generation for SOC STM32MP15x 64 for TF-A boot when FIP container is not used 65 66choice 67 prompt "STM32MP15x board select" 68 optional 69 70config TARGET_ST_STM32MP15x 71 bool "STMicroelectronics STM32MP15x boards" 72 select STM32MP15x 73 imply BOOTCOUNT_LIMIT 74 imply BOOTSTAGE 75 imply CMD_BOOTCOUNT 76 imply CMD_BOOTSTAGE 77 imply CMD_CLS if CMD_BMP 78 imply DISABLE_CONSOLE 79 imply PRE_CONSOLE_BUFFER 80 imply SILENT_CONSOLE 81 help 82 target the STMicroelectronics board with SOC STM32MP15x 83 managed by board/st/stm32mp1: 84 Evalulation board (EV1) or Discovery board (DK1 and DK2). 85 The difference between board are managed with devicetree 86 87config TARGET_MICROGEA_STM32MP1 88 bool "Engicam MicroGEA STM32MP1 SOM" 89 select STM32MP15x 90 imply BOOTCOUNT_LIMIT 91 imply BOOTSTAGE 92 imply CMD_BOOTCOUNT 93 imply CMD_BOOTSTAGE 94 imply CMD_CLS if CMD_BMP 95 imply DISABLE_CONSOLE 96 imply PRE_CONSOLE_BUFFER 97 imply SILENT_CONSOLE 98 help 99 MicroGEA STM32MP1 is a STM32MP157A based Micro SOM. 100 101 MicroGEA STM32MP1 MicroDev 2.0: 102 * MicroDev 2.0 is a general purpose miniature carrier board with CAN, 103 LTE and LVDS panel interfaces. 104 * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board 105 for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. 106 107 MicroGEA STM32MP1 MicroDev 2.0 7" OF: 108 * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS 109 panel and toucscreen. 110 * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with 111 pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" 112 Open Frame Solution board. 113 114config TARGET_ICORE_STM32MP1 115 bool "Engicam i.Core STM32MP1 SOM" 116 select STM32MP15x 117 imply BOOTCOUNT_LIMIT 118 imply BOOTSTAGE 119 imply CMD_BOOTCOUNT 120 imply CMD_BOOTSTAGE 121 imply CMD_CLS if CMD_BMP 122 imply DISABLE_CONSOLE 123 imply PRE_CONSOLE_BUFFER 124 imply SILENT_CONSOLE 125 help 126 i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A. 127 128 i.Core STM32MP1 EDIMM2.2: 129 * EDIMM2.2 is a Form Factor Capacitive Evaluation Board. 130 * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for 131 creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. 132 133 i.Core STM32MP1 C.TOUCH 2.0 134 * C.TOUCH 2.0 is a general purpose Carrier board. 135 * i.Core STM32MP1 needs to mount on top of this Carrier board 136 for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. 137 138config TARGET_DH_STM32MP1_PDK2 139 bool "DH STM32MP1 PDK2" 140 select STM32MP15x 141 imply BOOTCOUNT_LIMIT 142 imply CMD_BOOTCOUNT 143 help 144 Target the DH PDK2 development kit with STM32MP15x SoM. 145 146endchoice 147 148config SYS_TEXT_BASE 149 default 0xC0100000 150 151config NR_DRAM_BANKS 152 default 1 153 154config DDR_CACHEABLE_SIZE 155 hex "Size of the DDR marked cacheable in pre-reloc stage" 156 default 0x10000000 if TFABOOT 157 default 0x40000000 158 help 159 Define the size of the DDR marked as cacheable in U-Boot 160 pre-reloc stage. 161 This option can be useful to avoid speculatif access 162 to secured area of DDR used by TF-A or OP-TEE before U-Boot 163 initialization. 164 The areas marked "no-map" in device tree should be located 165 before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE. 166 167config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 168 hex "Partition on MMC2 to use to load U-Boot from" 169 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 170 default 1 171 help 172 Partition on the second MMC to load U-Boot from when the MMC is being 173 used in raw mode 174 175config STM32_ETZPC 176 bool "STM32 Extended TrustZone Protection" 177 depends on STM32MP15x 178 default y 179 help 180 Say y to enable STM32 Extended TrustZone Protection 181 182config STM32_ECDSA_VERIFY 183 bool "STM32 ECDSA verification via the ROM API" 184 depends on SPL_ECDSA_VERIFY 185 default y 186 help 187 Say y to enable the uclass driver for ECDSA verification using the 188 ROM API provided on STM32MP. 189 The ROM API is only available during SPL for now. 190 191config CMD_STM32KEY 192 bool "command stm32key to fuse public key hash" 193 help 194 fuse public key hash in corresponding fuse used to authenticate 195 binary. 196 This command is used to evaluate the secure boot on stm32mp SOC, 197 it is deactivated by default in real products. 198 199config PRE_CON_BUF_ADDR 200 default 0xC02FF000 201 202config PRE_CON_BUF_SZ 203 default 4096 204 205config BOOTSTAGE_STASH_ADDR 206 default 0xC3000000 207 208if BOOTCOUNT_LIMIT 209config SYS_BOOTCOUNT_SINGLEWORD 210 default y 211 212# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21) 213config SYS_BOOTCOUNT_ADDR 214 default 0x5C00A154 215endif 216 217if DEBUG_UART 218 219config DEBUG_UART_BOARD_INIT 220 default y 221 222# debug on UART4 by default 223config DEBUG_UART_BASE 224 default 0x40010000 225 226# clock source is HSI on reset 227config DEBUG_UART_CLOCK 228 default 64000000 229endif 230 231source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" 232source "board/dhelectronics/dh_stm32mp1/Kconfig" 233source "board/engicam/stm32mp1/Kconfig" 234source "board/st/stm32mp1/Kconfig" 235 236endif 237