1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
4 *
5 * Sunxi PMIC bus access helpers
6 *
7 * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
8 * axp223 uses the rsb bus, these functions abstract this.
9 */
10
11 #include <axp_pmic.h>
12 #include <common.h>
13 #include <dm.h>
14 #include <asm/arch/p2wi.h>
15 #include <asm/arch/rsb.h>
16 #include <i2c.h>
17 #include <power/pmic.h>
18 #include <asm/arch/pmic_bus.h>
19
20 #define AXP152_I2C_ADDR 0x30
21
22 #define AXP209_I2C_ADDR 0x34
23
24 #define AXP305_I2C_ADDR 0x36
25
26 #define AXP221_CHIP_ADDR 0x68
27
28 #if CONFIG_IS_ENABLED(PMIC_AXP)
29 static struct udevice *pmic;
30 #else
pmic_i2c_address(void)31 static int pmic_i2c_address(void)
32 {
33 if (IS_ENABLED(CONFIG_AXP152_POWER))
34 return AXP152_I2C_ADDR;
35 if (IS_ENABLED(CONFIG_AXP305_POWER))
36 return AXP305_I2C_ADDR;
37
38 /* Other AXP2xx and AXP8xx variants */
39 return AXP209_I2C_ADDR;
40 }
41 #endif
42
pmic_bus_init(void)43 int pmic_bus_init(void)
44 {
45 /* This cannot be 0 because it is used in SPL before BSS is ready */
46 static int needs_init = 1;
47 int ret = 0;
48
49 if (!needs_init)
50 return 0;
51
52 #if CONFIG_IS_ENABLED(PMIC_AXP)
53 ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(axp_pmic),
54 &pmic);
55 #else
56 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) {
57 p2wi_init();
58 ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR,
59 AXP_PMIC_MODE_REG,
60 AXP_PMIC_MODE_P2WI);
61 } else if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) {
62 ret = rsb_init();
63 if (ret)
64 return ret;
65
66 ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR,
67 AXP_PMIC_PRI_RUNTIME_ADDR);
68 }
69 #endif
70
71 needs_init = ret;
72
73 return ret;
74 }
75
pmic_bus_read(u8 reg,u8 * data)76 int pmic_bus_read(u8 reg, u8 *data)
77 {
78 #if CONFIG_IS_ENABLED(PMIC_AXP)
79 return pmic_read(pmic, reg, data, 1);
80 #else
81 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
82 return p2wi_read(reg, data);
83 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
84 return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
85
86 return i2c_read(pmic_i2c_address(), reg, 1, data, 1);
87 #endif
88 }
89
pmic_bus_write(u8 reg,u8 data)90 int pmic_bus_write(u8 reg, u8 data)
91 {
92 #if CONFIG_IS_ENABLED(PMIC_AXP)
93 return pmic_write(pmic, reg, &data, 1);
94 #else
95 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
96 return p2wi_write(reg, data);
97 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
98 return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
99
100 return i2c_write(pmic_i2c_address(), reg, 1, &data, 1);
101 #endif
102 }
103
pmic_bus_setbits(u8 reg,u8 bits)104 int pmic_bus_setbits(u8 reg, u8 bits)
105 {
106 int ret;
107 u8 val;
108
109 ret = pmic_bus_read(reg, &val);
110 if (ret)
111 return ret;
112
113 if ((val & bits) == bits)
114 return 0;
115
116 val |= bits;
117 return pmic_bus_write(reg, val);
118 }
119
pmic_bus_clrbits(u8 reg,u8 bits)120 int pmic_bus_clrbits(u8 reg, u8 bits)
121 {
122 int ret;
123 u8 val;
124
125 ret = pmic_bus_read(reg, &val);
126 if (ret)
127 return ret;
128
129 if (!(val & bits))
130 return 0;
131
132 val &= ~bits;
133 return pmic_bus_write(reg, val);
134 }
135