1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2003	Josef Baumgartner <josef.baumgartner@telex.de>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 */
6
7#include <asm-offsets.h>
8#include <config.h>
9#include <asm/cache.h>
10
11#define _START	_start
12#define _FAULT	_fault
13
14#define SAVE_ALL						\
15	move.w	#0x2700,%sr;		/* disable intrs */	\
16	subl	#60,%sp;		/* space for 15 regs */ \
17	moveml	%d0-%d7/%a0-%a6,%sp@;
18
19#define RESTORE_ALL						\
20	moveml	%sp@,%d0-%d7/%a0-%a6;				\
21	addl	#60,%sp;		/* space for 15 regs */ \
22	rte;
23
24#if defined(CONFIG_CF_SBF)
25#define ASM_DRAMINIT	(asm_dram_init - CONFIG_SYS_TEXT_BASE + \
26	CONFIG_SYS_INIT_RAM_ADDR)
27#define ASM_SBF_IMG_HDR	(asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
28	CONFIG_SYS_INIT_RAM_ADDR)
29#endif
30
31.text
32
33/*
34 * Vector table. This is used for initial platform startup.
35 * These vectors are to catch any un-intended traps.
36 */
37_vectors:
38#if defined(CONFIG_CF_SBF)
39INITSP:	.long	0			/* Initial SP	*/
40INITPC:	.long	ASM_DRAMINIT		/* Initial PC	*/
41#else
42INITSP:	.long	0			/* Initial SP	*/
43INITPC:	.long	_START			/* Initial PC	*/
44#endif
45
46vector02_0F:
47.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
48.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
49
50/* Reserved */
51vector10_17:
52.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
53
54vector18_1F:
55.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
56
57#if !defined(CONFIG_CF_SBF)
58/* TRAP #0 - #15 */
59vector20_2F:
60.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
61.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62
63/* Reserved	*/
64vector30_3F:
65.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67
68vector64_127:
69.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77
78vector128_191:
79.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87
88vector192_255:
89.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97#endif
98
99#if defined(CONFIG_CF_SBF)
100	/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
101asm_sbf_img_hdr:
102	.long	0x00000000		/* checksum, not yet implemented */
103	.long	0x00020000		/* image length */
104	.long	CONFIG_SYS_TEXT_BASE	/* image to be relocated at */
105
106asm_dram_init:
107	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
108	movec	%d0, %RAMBAR1		/* init Rambar */
109
110	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
111	clr.l	%sp@-
112
113	/* Must disable global address */
114	move.l	#0xFC008000, %a1
115	move.l	#(CONFIG_SYS_CS0_BASE), (%a1)
116	move.l	#0xFC008008, %a1
117	move.l	#(CONFIG_SYS_CS0_CTRL), (%a1)
118	move.l	#0xFC008004, %a1
119	move.l	#(CONFIG_SYS_CS0_MASK), (%a1)
120
121	/*
122	 * Dram Initialization
123	 * a1, a2, and d0
124	 */
125	move.l	#0xFC0A4074, %a1
126	move.b	#(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
127	nop
128
129	/* SDRAM Chip 0 and 1 */
130	move.l	#0xFC0B8110, %a1
131	move.l	#0xFC0B8114, %a2
132
133	/* calculate the size */
134	move.l	#0x13, %d1
135	move.l	#(CONFIG_SYS_SDRAM_SIZE), %d2
136#ifdef CONFIG_SYS_SDRAM_BASE1
137	lsr.l	#1, %d2
138#endif
139
140dramsz_loop:
141	lsr.l	#1, %d2
142	add.l	#1, %d1
143	cmp.l	#1, %d2
144	bne	dramsz_loop
145
146	/* SDRAM Chip 0 and 1 */
147	move.l	#(CONFIG_SYS_SDRAM_BASE), (%a1)
148	or.l	%d1, (%a1)
149#ifdef CONFIG_SYS_SDRAM_BASE1
150	move.l	#(CONFIG_SYS_SDRAM_BASE1), (%a2)
151	or.l	%d1, (%a2)
152#endif
153	nop
154
155	/* dram cfg1 and cfg2 */
156	move.l	#0xFC0B8008, %a1
157	move.l	#(CONFIG_SYS_SDRAM_CFG1), (%a1)
158	nop
159	move.l	#0xFC0B800C, %a2
160	move.l	#(CONFIG_SYS_SDRAM_CFG2), (%a2)
161	nop
162
163	move.l	#0xFC0B8000, %a1	/* Mode */
164	move.l	#0xFC0B8004, %a2	/* Ctrl */
165
166	/* Issue PALL */
167	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
168	nop
169
170	/* Issue LEMR */
171	move.l	#(CONFIG_SYS_SDRAM_MODE), (%a1)
172	nop
173	move.l	#(CONFIG_SYS_SDRAM_EMOD), (%a1)
174	nop
175
176	move.l	#1000, %d0
177wait1000:
178	nop
179	subq.l	#1, %d0
180	bne	wait1000
181
182	/* Issue PALL */
183	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
184	nop
185
186	/* Perform two refresh cycles */
187	move.l	#(CONFIG_SYS_SDRAM_CTRL + 4), %d0
188	nop
189	move.l	%d0, (%a2)
190	move.l	%d0, (%a2)
191	nop
192
193	move.l	#(CONFIG_SYS_SDRAM_CTRL), %d0
194	and.l	#0x7FFFFFFF, %d0
195	or.l	#0x10000c00, %d0
196	move.l	%d0, (%a2)
197	nop
198
199	/*
200	 * DSPI Initialization
201	 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
202	 * a1 - dspi status
203	 * a2 - dtfr
204	 * a3 - drfr
205	 * a4 - Dst addr
206	 */
207
208	/* Enable pins for DSPI mode - chip-selects are enabled later */
209	move.l	#0xFC0A4036, %a0
210	move.b	#0x3F, %d0
211	move.b	%d0, (%a0)
212
213	/* DSPI CS */
214#ifdef CONFIG_SYS_DSPI_CS0
215	move.b	(%a0), %d0
216	or.l	#0xC0, %d0
217	move.b	%d0, (%a0)
218#endif
219#ifdef CONFIG_SYS_DSPI_CS2
220	move.l	#0xFC0A4037, %a0
221	move.b	(%a0), %d0
222	or.l	#0x10, %d0
223	move.b	%d0, (%a0)
224#endif
225	nop
226
227	/* Configure DSPI module */
228	move.l	#0xFC05C000, %a0
229	move.l	#0x80FF0C00, (%a0)	/* Master, clear TX/RX FIFO */
230
231	move.l	#0xFC05C00C, %a0
232	move.l	#0x3E000011, (%a0)
233
234	move.l	#0xFC05C034, %a2	/* dtfr */
235	move.l	#0xFC05C03B, %a3	/* drfr */
236
237	move.l	#(ASM_SBF_IMG_HDR + 4), %a1
238	move.l	(%a1)+, %d5
239	move.l	(%a1), %a4
240
241	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
242	move.l	#(CONFIG_SYS_SBFHDR_SIZE), %d4
243
244	move.l	#0xFC05C02C, %a1	/* dspi status */
245
246	/* Issue commands and address */
247	move.l	#0x8004000B, %d2	/* Fast Read Cmd */
248	jsr	asm_dspi_wr_status
249	jsr	asm_dspi_rd_status
250
251	move.l	#0x80040000, %d2	/* Address byte 2 */
252	jsr	asm_dspi_wr_status
253	jsr	asm_dspi_rd_status
254
255	move.l	#0x80040000, %d2	/* Address byte 1 */
256	jsr	asm_dspi_wr_status
257	jsr	asm_dspi_rd_status
258
259	move.l	#0x80040000, %d2	/* Address byte 0 */
260	jsr	asm_dspi_wr_status
261	jsr	asm_dspi_rd_status
262
263	move.l	#0x80040000, %d2	/* Dummy Wr and Rd */
264	jsr	asm_dspi_wr_status
265	jsr	asm_dspi_rd_status
266
267	/* Transfer serial boot header to sram */
268asm_dspi_rd_loop1:
269	move.l	#0x80040000, %d2
270	jsr	asm_dspi_wr_status
271	jsr	asm_dspi_rd_status
272
273	move.b	%d1, (%a0)		/* read, copy to dst */
274
275	add.l	#1, %a0			/* inc dst by 1 */
276	sub.l	#1, %d4			/* dec cnt by 1 */
277	bne	asm_dspi_rd_loop1
278
279	/* Transfer u-boot from serial flash to memory */
280asm_dspi_rd_loop2:
281	move.l	#0x80040000, %d2
282	jsr	asm_dspi_wr_status
283	jsr	asm_dspi_rd_status
284
285	move.b	%d1, (%a4)		/* read, copy to dst */
286
287	add.l	#1, %a4			/* inc dst by 1 */
288	sub.l	#1, %d5			/* dec cnt by 1 */
289	bne	asm_dspi_rd_loop2
290
291	move.l	#0x00040000, %d2	/* Terminate */
292	jsr	asm_dspi_wr_status
293	jsr	asm_dspi_rd_status
294
295	/* jump to memory and execute */
296	move.l	#(CONFIG_SYS_TEXT_BASE + 0x400), %a0
297	move.l	%a0, (%a1)
298	jmp	(%a0)
299
300asm_dspi_wr_status:
301	move.l	(%a1), %d0		/* status */
302	and.l	#0x0000F000, %d0
303	cmp.l	#0x00003000, %d0
304	bgt	asm_dspi_wr_status
305
306	move.l	%d2, (%a2)
307	rts
308
309asm_dspi_rd_status:
310	move.l	(%a1), %d0		/* status */
311	and.l	#0x000000F0, %d0
312	lsr.l	#4, %d0
313	cmp.l	#0, %d0
314	beq	asm_dspi_rd_status
315
316	move.b	(%a3), %d1
317	rts
318#endif /* CONFIG_CF_SBF */
319
320.text
321	. = 0x400
322.globl _start
323_start:
324	nop
325	nop
326	move.w	#0x2700,%sr		/* Mask off Interrupt */
327
328	/* Set vector base register at the beginning of the Flash */
329#if defined(CONFIG_CF_SBF)
330	move.l	#CONFIG_SYS_TEXT_BASE, %d0
331	movec	%d0, %VBR
332#else
333	move.l	#CONFIG_SYS_FLASH_BASE, %d0
334	movec	%d0, %VBR
335
336	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
337	movec	%d0, %RAMBAR1
338#endif
339
340	/* invalidate and disable cache */
341	move.l	#CF_CACR_CINV, %d0	/* Invalidate cache cmd */
342	movec	%d0, %CACR		/* Invalidate cache */
343	move.l	#0, %d0
344	movec	%d0, %ACR0
345	movec	%d0, %ACR1
346
347	/* initialize general use internal ram */
348	move.l	#0, %d0
349	move.l	#(ICACHE_STATUS), %a1	/* icache */
350	move.l	#(DCACHE_STATUS), %a2	/* icache */
351	move.l	%d0, (%a1)
352	move.l	%d0, (%a2)
353
354	/* put relocation table address to a5 */
355	move.l	#__got_start, %a5
356
357	/* setup stack initially on top of internal static ram  */
358	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
359
360	/*
361	 * if configured, malloc_f arena will be reserved first,
362	 * then (and always) gd struct space will be reserved
363	 */
364	move.l	%sp, -(%sp)
365	bsr	board_init_f_alloc_reserve
366
367	/* update stack and frame-pointers */
368	move.l	%d0, %sp
369	move.l	%sp, %fp
370
371	/* initialize reserved area */
372	move.l	%d0, -(%sp)
373	bsr	board_init_f_init_reserve
374
375	/* run low-level CPU init code (from flash) */
376	bsr	cpu_init_f
377	clr.l	%sp@-
378
379	/* run low-level board init code (from flash) */
380	move.l	#board_init_f, %a1
381	jsr	(%a1)
382
383	/* board_init_f() does not return */
384
385/******************************************************************************/
386
387/*
388 * void relocate_code(addr_sp, gd, addr_moni)
389 *
390 * This "function" does not return, instead it continues in RAM
391 * after relocating the monitor code.
392 *
393 * r3 = dest
394 * r4 = src
395 * r5 = length in bytes
396 * r6 = cachelinesize
397 */
398.globl relocate_code
399relocate_code:
400	link.w	%a6,#0
401	move.l	8(%a6), %sp		/* set new stack pointer */
402
403	move.l	12(%a6), %d0		/* Save copy of Global Data pointer */
404	move.l	16(%a6), %a0		/* Save copy of Destination Address */
405
406	move.l	#CONFIG_SYS_MONITOR_BASE, %a1
407	move.l	#__init_end, %a2
408	move.l	%a0, %a3
409
410	/* copy the code to RAM */
4111:
412	move.l	(%a1)+, (%a3)+
413	cmp.l	%a1,%a2
414	bgt.s	1b
415
416/*
417 * We are done. Do not return, instead branch to second part of board
418 * initialization, now running from RAM.
419 */
420	move.l	%a0, %a1
421	add.l	#(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
422	jmp	(%a1)
423
424in_ram:
425
426clear_bss:
427	/*
428	 * Now clear BSS segment
429	 */
430	move.l	%a0, %a1
431	add.l	#(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
432	move.l	%a0, %d1
433	add.l	#(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
4346:
435	clr.l	(%a1)+
436	cmp.l	%a1,%d1
437	bgt.s	6b
438
439	/*
440	 * fix got table in RAM
441	 */
442	move.l	%a0, %a1
443	add.l	#(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
444	move.l	%a1,%a5			/* fix got pointer register a5 */
445
446	move.l	%a0, %a2
447	add.l	#(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
448
4497:
450	move.l	(%a1),%d1
451	sub.l	#_start,%d1
452	add.l	%a0,%d1
453	move.l	%d1,(%a1)+
454	cmp.l	%a2, %a1
455	bne	7b
456
457	/* calculate relative jump to board_init_r in ram */
458	move.l	%a0, %a1
459	add.l	#(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
460
461	/* set parameters for board_init_r */
462	move.l	%a0,-(%sp)		/* dest_addr */
463	move.l	%d0,-(%sp)		/* gd */
464	jsr	(%a1)
465
466/******************************************************************************/
467
468/* exception code */
469.globl _fault
470_fault:
471	bra	_fault
472
473.globl _exc_handler
474_exc_handler:
475	SAVE_ALL
476	movel	%sp,%sp@-
477	bsr	exc_handler
478	addql	#4,%sp
479	RESTORE_ALL
480
481.globl _int_handler
482_int_handler:
483	SAVE_ALL
484	movel	%sp,%sp@-
485	bsr	int_handler
486	addql	#4,%sp
487	RESTORE_ALL
488
489/******************************************************************************/
490
491.align 4
492