1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2003	Josef Baumgartner <josef.baumgartner@telex.de>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 *
6 * Copyright 2010-2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 */
9
10#include <common.h>
11#include <asm-offsets.h>
12#include <config.h>
13#include <asm/cache.h>
14
15#define _START	_start
16#define _FAULT	_fault
17
18#define SAVE_ALL						\
19	move.w	#0x2700,%sr;		/* disable intrs */	\
20	subl	#60,%sp;		/* space for 15 regs */ \
21	moveml	%d0-%d7/%a0-%a6,%sp@;
22
23#define RESTORE_ALL						\
24	moveml	%sp@,%d0-%d7/%a0-%a6;				\
25	addl	#60,%sp;		/* space for 15 regs */ \
26	rte;
27
28#if defined(CONFIG_SERIAL_BOOT)
29#define ASM_DRAMINIT	(asm_dram_init - CONFIG_SYS_TEXT_BASE + \
30	CONFIG_SYS_INIT_RAM_ADDR)
31#define ASM_DRAMINIT_N	(asm_dram_init - CONFIG_SYS_TEXT_BASE)
32#define ASM_SBF_IMG_HDR	(asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
33	CONFIG_SYS_INIT_RAM_ADDR)
34#endif
35
36.text
37
38/*
39 * Vector table. This is used for initial platform startup.
40 * These vectors are to catch any un-intended traps.
41 */
42_vectors:
43#if defined(CONFIG_SERIAL_BOOT)
44
45INITSP:	.long	0			/* Initial SP	*/
46#ifdef CONFIG_CF_SBF
47INITPC:	.long	ASM_DRAMINIT		/* Initial PC	*/
48#endif
49#ifdef CONFIG_SYS_NAND_BOOT
50INITPC:	.long	ASM_DRAMINIT_N		/* Initial PC	*/
51#endif
52
53#else
54
55INITSP:	.long	0			/* Initial SP	*/
56INITPC:	.long	_START			/* Initial PC	*/
57
58#endif
59
60vector02_0F:
61.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63
64/* Reserved */
65vector10_17:
66.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67
68vector18_1F:
69.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70
71#if !defined(CONFIG_SERIAL_BOOT)
72
73/* TRAP #0 - #15 */
74vector20_2F:
75.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77
78/* Reserved	*/
79vector30_3F:
80.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82
83vector64_127:
84.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92
93vector128_191:
94.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102
103vector192_255:
104.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112#endif
113
114#if defined(CONFIG_SERIAL_BOOT)
115	/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
116asm_sbf_img_hdr:
117	.long	0x00000000		/* checksum, not yet implemented */
118	.long	0x00040000		/* image length */
119	.long	CONFIG_SYS_TEXT_BASE	/* image to be relocated at */
120
121asm_dram_init:
122	move.w	#0x2700,%sr		/* Mask off Interrupt */
123
124#ifdef CONFIG_SYS_NAND_BOOT
125	/* for assembly stack */
126	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
127	movec	%d0, %RAMBAR1
128
129	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
130	clr.l	%sp@-
131#endif
132
133#ifdef CONFIG_CF_SBF
134	move.l	#CONFIG_SYS_INIT_RAM_ADDR, %d0
135	movec	%d0, %VBR
136
137	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
138	movec	%d0, %RAMBAR1
139
140	/* initialize general use internal ram */
141	move.l	#0, %d0
142	move.l	#(ICACHE_STATUS), %a1	/* icache */
143	move.l	#(DCACHE_STATUS), %a2	/* dcache */
144	move.l	%d0, (%a1)
145	move.l	%d0, (%a2)
146
147	/* invalidate and disable cache */
148	move.l	#(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
149	movec	%d0, %CACR		/* Invalidate cache */
150	move.l	#0, %d0
151	movec	%d0, %ACR0
152	movec	%d0, %ACR1
153	movec	%d0, %ACR2
154	movec	%d0, %ACR3
155
156	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
157	clr.l	%sp@-
158
159#ifdef CONFIG_SYS_CS0_BASE
160	/* Must disable global address */
161	move.l	#0xFC008000, %a1
162	move.l	#(CONFIG_SYS_CS0_BASE), (%a1)
163	move.l	#0xFC008008, %a1
164	move.l	#(CONFIG_SYS_CS0_CTRL), (%a1)
165	move.l	#0xFC008004, %a1
166	move.l	#(CONFIG_SYS_CS0_MASK), (%a1)
167#endif
168#endif /* CONFIG_CF_SBF */
169
170#ifdef CONFIG_MCF5441x
171	/* TC: enable all peripherals,
172	in the future only enable certain peripherals */
173	move.l	#0xFC04002D, %a1
174
175#if defined(CONFIG_CF_SBF)
176	move.b	#23, (%a1)		/* dspi */
177#endif
178#endif	/* CONFIG_MCF5441x */
179
180	/* mandatory board level ddr-sdram init,
181	 * for both 5441x and 5445x
182	 */
183	bsr	sbf_dram_init
184
185#ifdef CONFIG_CF_SBF
186	/*
187	 * DSPI Initialization
188	 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
189	 * a1 - dspi status
190	 * a2 - dtfr
191	 * a3 - drfr
192	 * a4 - Dst addr
193	 */
194	/* Enable pins for DSPI mode - chip-selects are enabled later */
195asm_dspi_init:
196#ifdef CONFIG_MCF5441x
197	move.l	#0xEC09404E, %a1
198	move.l	#0xEC09404F, %a2
199	move.b	#0xFF, (%a1)
200	move.b	#0x80, (%a2)
201#endif
202
203	/* Configure DSPI module */
204	move.l	#0xFC05C000, %a0
205	move.l	#0x80FF0C00, (%a0)	/* Master, clear TX/RX FIFO */
206
207	move.l	#0xFC05C00C, %a0
208#ifdef CONFIG_MCF5441x
209	move.l	#0x3E000016, (%a0)
210#endif
211
212	move.l	#0xFC05C034, %a2	/* dtfr */
213	move.l	#0xFC05C03B, %a3	/* drfr */
214
215	move.l	#(ASM_SBF_IMG_HDR + 4), %a1
216	move.l	(%a1)+, %d5
217	move.l	(%a1), %a4
218
219	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
220	move.l	#(CONFIG_SYS_SBFHDR_SIZE), %d4
221
222	move.l	#0xFC05C02C, %a1	/* dspi status */
223
224	/* Issue commands and address */
225	move.l	#0x8002000B, %d2	/* Fast Read Cmd */
226	jsr	asm_dspi_wr_status
227	jsr	asm_dspi_rd_status
228
229	move.l	#0x80020000, %d2	/* Address byte 2 */
230	jsr	asm_dspi_wr_status
231	jsr	asm_dspi_rd_status
232
233	move.l	#0x80020000, %d2	/* Address byte 1 */
234	jsr	asm_dspi_wr_status
235	jsr	asm_dspi_rd_status
236
237	move.l	#0x80020000, %d2	/* Address byte 0 */
238	jsr	asm_dspi_wr_status
239	jsr	asm_dspi_rd_status
240
241	move.l	#0x80020000, %d2	/* Dummy Wr and Rd */
242	jsr	asm_dspi_wr_status
243	jsr	asm_dspi_rd_status
244
245	/* Transfer serial boot header to sram */
246asm_dspi_rd_loop1:
247	move.l	#0x80020000, %d2
248	jsr	asm_dspi_wr_status
249	jsr	asm_dspi_rd_status
250
251	move.b	%d1, (%a0)		/* read, copy to dst */
252
253	add.l	#1, %a0			/* inc dst by 1 */
254	sub.l	#1, %d4			/* dec cnt by 1 */
255	bne	asm_dspi_rd_loop1
256
257	/* Transfer u-boot from serial flash to memory */
258asm_dspi_rd_loop2:
259	move.l	#0x80020000, %d2
260	jsr	asm_dspi_wr_status
261	jsr	asm_dspi_rd_status
262
263	move.b	%d1, (%a4)		/* read, copy to dst */
264
265	add.l	#1, %a4			/* inc dst by 1 */
266	sub.l	#1, %d5			/* dec cnt by 1 */
267	bne	asm_dspi_rd_loop2
268
269	move.l	#0x00020000, %d2	/* Terminate */
270	jsr	asm_dspi_wr_status
271	jsr	asm_dspi_rd_status
272
273	/* jump to memory and execute */
274	move.l	#(CONFIG_SYS_TEXT_BASE + 0x400), %a0
275	jmp	(%a0)
276
277asm_dspi_wr_status:
278	move.l	(%a1), %d0		/* status */
279	and.l	#0x0000F000, %d0
280	cmp.l	#0x00003000, %d0
281	bgt	asm_dspi_wr_status
282
283	move.l	%d2, (%a2)
284	rts
285
286asm_dspi_rd_status:
287	move.l	(%a1), %d0		/* status */
288	and.l	#0x000000F0, %d0
289	lsr.l	#4, %d0
290	cmp.l	#0, %d0
291	beq	asm_dspi_rd_status
292
293	move.b	(%a3), %d1
294	rts
295#endif /* CONFIG_CF_SBF */
296
297#ifdef CONFIG_SYS_NAND_BOOT
298	/* copy 4 boot pages to dram as soon as possible */
299	/* each page is 996 bytes (1056 total with 60 ECC bytes */
300	move.l  #0x00000000, %a1	/* src */
301	move.l	#CONFIG_SYS_TEXT_BASE, %a2		/* dst */
302	move.l	#0x3E0, %d0		/* sz in long */
303
304asm_boot_nand_copy:
305	move.l	(%a1)+, (%a2)+
306	subq.l	#1, %d0
307	bne	asm_boot_nand_copy
308
309	/* jump to memory and execute */
310	move.l	#(asm_nand_init), %a0
311	jmp	(%a0)
312
313asm_nand_init:
314	/* exit nand boot-mode */
315	move.l	#0xFC0FFF30, %a1
316	or.l	#0x00000040, %d1
317	move.l	%d1, (%a1)
318
319	/* initialize general use internal ram */
320	move.l	#0, %d0
321	move.l	#(CACR_STATUS), %a1	/* CACR */
322	move.l	#(ICACHE_STATUS), %a2	/* icache */
323	move.l	#(DCACHE_STATUS), %a3	/* dcache */
324	move.l	%d0, (%a1)
325	move.l	%d0, (%a2)
326	move.l	%d0, (%a3)
327
328	/* invalidate and disable cache */
329	move.l	#0x01004100, %d0	/* Invalidate cache cmd */
330	movec	%d0, %CACR		/* Invalidate cache */
331	move.l	#0, %d0
332	movec	%d0, %ACR0
333	movec	%d0, %ACR1
334	movec	%d0, %ACR2
335	movec	%d0, %ACR3
336
337#ifdef CONFIG_SYS_CS0_BASE
338	/* Must disable global address */
339	move.l	#0xFC008000, %a1
340	move.l	#(CONFIG_SYS_CS0_BASE), (%a1)
341	move.l	#0xFC008008, %a1
342	move.l	#(CONFIG_SYS_CS0_CTRL), (%a1)
343	move.l	#0xFC008004, %a1
344	move.l	#(CONFIG_SYS_CS0_MASK), (%a1)
345#endif
346
347	/* NAND port configuration */
348	move.l	#0xEC094048, %a1
349	move.b	#0xFD, (%a1)+
350	move.b	#0x5F, (%a1)+
351	move.b	#0x04, (%a1)+
352
353	/* reset nand */
354	move.l  #0xFC0FFF38, %a1	/* isr */
355	move.l  #0x000e0000, (%a1)
356	move.l	#0xFC0FFF08, %a2
357	move.l	#0x00000000, (%a2)+	/* car */
358	move.l	#0x11000000, (%a2)+	/* rar */
359	move.l	#0x00000000, (%a2)+	/* rpt */
360	move.l	#0x00000000, (%a2)+	/* rai */
361	move.l  #0xFC0FFF2c, %a2	/* cfg */
362	move.l  #0x00000000, (%a2)+	/* secsz */
363	move.l  #0x000e0681, (%a2)+
364	move.l  #0xFC0FFF04, %a2	/* cmd2 */
365	move.l  #0xFF404001, (%a2)
366	move.l  #0x000e0000, (%a1)
367
368	move.l	#0x2000, %d1
369	bsr	asm_delay
370
371	/* setup nand */
372	move.l  #0xFC0FFF00, %a1
373	move.l  #0x30700000, (%a1)+	/* cmd1 */
374	move.l  #0x007EF000, (%a1)+	/* cmd2 */
375
376	move.l  #0xFC0FFF2C, %a1
377	move.l  #0x00000841, (%a1)+	/* secsz */
378	move.l  #0x000e0681, (%a1)+	/* cfg */
379
380	move.l	#100, %d4		/* 100 pages ~200KB */
381	move.l	#4, %d2			/* start at 4 */
382	move.l  #0xFC0FFF04, %a0	/* cmd2 */
383	move.l  #0xFC0FFF0C, %a1	/* rar */
384	move.l	#(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
385
386asm_nand_read:
387	move.l	#0x11000000, %d0	/* rar */
388	or.l	%d2, %d0
389	move.l	%d0, (%a1)
390	add.l	#1, %d2
391
392	move.l	(%a0), %d0		/* cmd2 */
393	or.l	#1, %d0
394	move.l	%d0, (%a0)
395
396	move.l	#0x200, %d1
397	bsr	asm_delay
398
399asm_nand_chk_status:
400	move.l  #0xFC0FFF38, %a4	/* isr */
401	move.l	(%a4), %d0
402	and.l	#0x40000000, %d0
403	tst.l	%d0
404	beq	asm_nand_chk_status
405
406	move.l  #0xFC0FFF38, %a4	/* isr */
407	move.l	(%a4), %d0
408	or.l	#0x000E0000, %d0
409	move.l	%d0, (%a4)
410
411	move.l	#0x200, %d3
412	move.l	#0xFC0FC000, %a3	/* buf 1 */
413asm_nand_copy:
414	move.l	(%a3)+, (%a2)+
415	subq.l	#1, %d3
416	bgt	asm_nand_copy
417
418	subq.l	#1, %d4
419	bgt	asm_nand_read
420
421	/* jump to memory and execute */
422	move.l	#(CONFIG_SYS_TEXT_BASE + 0x400), %a0
423	jmp	(%a0)
424
425#endif			/* CONFIG_SYS_NAND_BOOT */
426
427.globl asm_delay
428asm_delay:
429	nop
430	subq.l	#1, %d1
431	bne	asm_delay
432	rts
433#endif			/* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
434
435.text
436	. = 0x400
437.globl _start
438_start:
439#if !defined(CONFIG_SERIAL_BOOT)
440	nop
441	nop
442	move.w	#0x2700,%sr		/* Mask off Interrupt */
443
444	/* Set vector base register at the beginning of the Flash */
445	move.l	#CONFIG_SYS_FLASH_BASE, %d0
446	movec	%d0, %VBR
447
448	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
449	movec	%d0, %RAMBAR1
450
451	/* initialize general use internal ram */
452	move.l	#0, %d0
453	move.l	#(ICACHE_STATUS), %a1	/* icache */
454	move.l	#(DCACHE_STATUS), %a2	/* dcache */
455	move.l	%d0, (%a1)
456	move.l	%d0, (%a2)
457
458	/* invalidate and disable cache */
459	move.l	#(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
460	movec	%d0, %CACR		/* Invalidate cache */
461	move.l	#0, %d0
462	movec	%d0, %ACR0
463	movec	%d0, %ACR1
464	movec	%d0, %ACR2
465	movec	%d0, %ACR3
466#else
467	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
468	movec	%d0, %RAMBAR1
469#endif
470
471	/* put relocation table address to a5 */
472	move.l	#__got_start, %a5
473
474	/* setup stack initially on top of internal static ram  */
475	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
476
477	/*
478	 * if configured, malloc_f arena will be reserved first,
479	 * then (and always) gd struct space will be reserved
480	 */
481	move.l	%sp, -(%sp)
482	move.l	#board_init_f_alloc_reserve, %a1
483	jsr	(%a1)
484
485	/* update stack and frame-pointers */
486	move.l	%d0, %sp
487	move.l	%sp, %fp
488
489	/* initialize reserved area */
490	move.l	%d0, -(%sp)
491	move.l	#board_init_f_init_reserve, %a1
492	jsr	(%a1)
493
494	/* run low-level CPU init code (from flash) */
495	move.l	#cpu_init_f, %a1
496	jsr	(%a1)
497
498	/* run low-level board init code (from flash) */
499	clr.l   %sp@-
500	move.l	#board_init_f, %a1
501	jsr	(%a1)
502
503	/* board_init_f() does not return */
504
505/******************************************************************************/
506
507/*
508 * void relocate_code(addr_sp, gd, addr_moni)
509 *
510 * This "function" does not return, instead it continues in RAM
511 * after relocating the monitor code.
512 *
513 * r3 = dest
514 * r4 = src
515 * r5 = length in bytes
516 * r6 = cachelinesize
517 */
518.globl relocate_code
519relocate_code:
520	link.w	%a6,#0
521	move.l	8(%a6), %sp		/* set new stack pointer */
522
523	move.l	12(%a6), %d0		/* Save copy of Global Data pointer */
524	move.l	16(%a6), %a0		/* Save copy of Destination Address */
525
526	move.l	#CONFIG_SYS_MONITOR_BASE, %a1
527	move.l	#__init_end, %a2
528	move.l	%a0, %a3
529
530	/* copy the code to RAM */
5311:
532	move.l	(%a1)+, (%a3)+
533	cmp.l	%a1,%a2
534	bgt.s	1b
535
536/*
537 * We are done. Do not return, instead branch to second part of board
538 * initialization, now running from RAM.
539 */
540	move.l	%a0, %a1
541	add.l	#(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
542	jmp	(%a1)
543
544in_ram:
545
546clear_bss:
547	/*
548	 * Now clear BSS segment
549	 */
550	move.l	%a0, %a1
551	add.l	#(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
552	move.l	%a0, %d1
553	add.l	#(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
5546:
555	clr.l	(%a1)+
556	cmp.l	%a1,%d1
557	bgt.s	6b
558
559	/*
560	 * fix got table in RAM
561	 */
562	move.l	%a0, %a1
563	add.l	#(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
564	move.l	%a1,%a5			/* fix got pointer register a5 */
565
566	move.l	%a0, %a2
567	add.l	#(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
568
5697:
570	move.l	(%a1),%d1
571	sub.l	#_start,%d1
572	add.l	%a0,%d1
573	move.l	%d1,(%a1)+
574	cmp.l	%a2, %a1
575	bne	7b
576
577	/* calculate relative jump to board_init_r in ram */
578	move.l	%a0, %a1
579	add.l	#(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
580
581	/* set parameters for board_init_r */
582	move.l	%a0,-(%sp)		/* dest_addr */
583	move.l	%d0,-(%sp)		/* gd */
584	jsr	(%a1)
585
586/******************************************************************************/
587
588/* exception code */
589.globl _fault
590_fault:
591	bra	_fault
592
593.globl _exc_handler
594_exc_handler:
595	SAVE_ALL
596	movel	%sp,%sp@-
597	bsr	exc_handler
598	addql	#4,%sp
599	RESTORE_ALL
600
601.globl _int_handler
602_int_handler:
603	SAVE_ALL
604	movel	%sp,%sp@-
605	bsr	int_handler
606	addql	#4,%sp
607	RESTORE_ALL
608
609/******************************************************************************/
610
611.align 4
612