1menu "mpc8xx CPU"
2	depends on MPC8xx
3
4config SYS_CPU
5	default "mpc8xx"
6
7choice
8	prompt "Target select"
9	optional
10
11config TARGET_MCR3000
12	bool "Support MCR3000 board from CSSI"
13
14endchoice
15
16choice
17	prompt "CPU select"
18	default MPC866
19
20config MPC866
21	bool "MPC866"
22	select SYS_CACHE_SHIFT_4
23
24config MPC885
25	bool "MPC885"
26	select SYS_CACHE_SHIFT_4
27
28endchoice
29
30config 8xx_GCLK_FREQ
31	int "CPU GCLK Frequency"
32
33comment "Specific commands"
34
35config CMD_IMMAP
36	bool "Enable various commands to dump IMMR information"
37	help
38	  This enables various commands such as:
39
40	    siuinfo - print System Interface Unit (SIU) registers
41	    memcinfo - print Memory Controller registers
42
43comment "Configuration Registers"
44
45config SYS_SIUMCR
46	hex "SIUMCR register"
47	help
48	  SIU Module Configuration (11-6)
49
50config SYS_SYPCR
51	hex "SYPCR register"
52	help
53	  System Protection Control (11-9)
54
55config SYS_TBSCR
56	hex "TBSCR register"
57	help
58	  Time Base Status and Control (11-26)
59
60config SYS_PISCR
61	hex "PISCR register"
62	help
63	  Periodic Interrupt Status and Control (11-31)
64
65config SYS_PLPRCR_BOOL
66	bool "Customise PLPRCR"
67
68config SYS_PLPRCR
69	hex "PLPRCR register"
70	depends on SYS_PLPRCR_BOOL
71	help
72	  PLL, Low-Power, and Reset Control Register (15-30)
73
74config SYS_SCCR
75	hex "SCCR register"
76	help
77	  System Clock and reset Control Register (15-27)
78
79config SYS_SCCR_MASK
80	hex "MASK for setting SCCR register"
81
82config SYS_DER
83	hex "DER register"
84	help
85	  Debug Event Register (37-47)
86
87comment "Memory mapping"
88
89config SYS_BR0_PRELIM
90	hex "Preliminary value for BR0"
91
92config SYS_OR0_PRELIM
93	hex "Preliminary value for OR0"
94
95config SYS_BR1_PRELIM_BOOL
96	bool "Define Bank 1"
97
98config SYS_BR1_PRELIM
99	hex "Preliminary value for BR1"
100	depends on SYS_BR1_PRELIM_BOOL
101
102config SYS_OR1_PRELIM
103	hex "Preliminary value for OR1"
104	depends on SYS_BR1_PRELIM_BOOL
105
106config SYS_BR2_PRELIM_BOOL
107	bool "Define Bank 2"
108
109config SYS_BR2_PRELIM
110	hex "Preliminary value for BR2"
111	depends on SYS_BR2_PRELIM_BOOL
112
113config SYS_OR2_PRELIM
114	hex "Preliminary value for OR2"
115	depends on SYS_BR2_PRELIM_BOOL
116
117config SYS_BR3_PRELIM_BOOL
118	bool "Define Bank 3"
119
120config SYS_BR3_PRELIM
121	hex "Preliminary value for BR3"
122	depends on SYS_BR3_PRELIM_BOOL
123
124config SYS_OR3_PRELIM
125	hex "Preliminary value for OR3"
126	depends on SYS_BR3_PRELIM_BOOL
127
128config SYS_BR4_PRELIM_BOOL
129	bool "Define Bank 4"
130
131config SYS_BR4_PRELIM
132	hex "Preliminary value for BR4"
133	depends on SYS_BR4_PRELIM_BOOL
134
135config SYS_OR4_PRELIM
136	hex "Preliminary value for OR4"
137	depends on SYS_BR4_PRELIM_BOOL
138
139config SYS_BR5_PRELIM_BOOL
140	bool "Define Bank 5"
141
142config SYS_BR5_PRELIM
143	hex "Preliminary value for BR5"
144	depends on SYS_BR5_PRELIM_BOOL
145
146config SYS_OR5_PRELIM
147	hex "Preliminary value for OR5"
148	depends on SYS_BR5_PRELIM_BOOL
149
150config SYS_BR6_PRELIM_BOOL
151	bool "Define Bank 6"
152
153config SYS_BR6_PRELIM
154	hex "Preliminary value for BR6"
155	depends on SYS_BR6_PRELIM_BOOL
156
157config SYS_OR6_PRELIM
158	hex "Preliminary value for OR6"
159	depends on SYS_BR6_PRELIM_BOOL
160
161config SYS_BR7_PRELIM_BOOL
162	bool "Define Bank 7"
163
164config SYS_BR7_PRELIM
165	hex "Preliminary value for BR7"
166	depends on SYS_BR7_PRELIM_BOOL
167
168config SYS_OR7_PRELIM
169	hex "Preliminary value for OR7"
170	depends on SYS_BR7_PRELIM_BOOL
171
172config SYS_IMMR
173	hex "Value for IMMR"
174
175source "board/cssi/MCR3000/Kconfig"
176
177endmenu
178