1// SPDX-License-Identifier: GPL-2.0+ OR X11 2/* 3 * T2080RDB Device Tree Source 4 * 5 * Copyright 2013 - 2015 Freescale Semiconductor Inc. 6 * Copyright 2019-2021 NXP 7 */ 8 9/include/ "t2080.dtsi" 10 11/ { 12 model = "fsl,T2080RDB"; 13 compatible = "fsl,T2080RDB"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&mpic>; 17 18 aliases { 19 spi0 = &espi0; 20 }; 21}; 22 23&soc { 24 fman@400000 { 25 ethernet@e0000 { 26 phy-handle = <&xg_aq1202_phy3>; 27 phy-connection-type = "xgmii"; 28 }; 29 30 ethernet@e2000 { 31 phy-handle = <&xg_aq1202_phy4>; 32 phy-connection-type = "xgmii"; 33 }; 34 35 ethernet@e4000 { 36 phy-handle = <&rgmii_phy1>; 37 phy-connection-type = "rgmii"; 38 }; 39 40 ethernet@e6000 { 41 phy-handle = <&rgmii_phy2>; 42 phy-connection-type = "rgmii"; 43 }; 44 45 ethernet@f0000 { 46 phy-handle = <&xg_cs4315_phy2>; 47 phy-connection-type = "xgmii"; 48 }; 49 50 ethernet@f2000 { 51 phy-handle = <&xg_cs4315_phy1>; 52 phy-connection-type = "xgmii"; 53 }; 54 55 mdio@fc000 { 56 rgmii_phy1: ethernet-phy@1 { 57 reg = <0x1>; 58 }; 59 rgmii_phy2: ethernet-phy@2 { 60 reg = <0x2>; 61 }; 62 }; 63 64 mdio@fd000 { 65 xg_cs4315_phy1: ethernet-phy@c { 66 compatible = "ethernet-phy-id13e5.1002"; 67 reg = <0xc>; 68 }; 69 70 xg_cs4315_phy2: ethernet-phy@d { 71 compatible = "ethernet-phy-id13e5.1002"; 72 reg = <0xd>; 73 }; 74 75 xg_aq1202_phy3: ethernet-phy@0 { 76 compatible = "ethernet-phy-ieee802.3-c45"; 77 reg = <0x0>; 78 }; 79 80#ifdef CONFIG_T2080RDB_REV_D 81 xg_aq1202_phy4: ethernet-phy@8 { 82 compatible = "ethernet-phy-ieee802.3-c45"; 83 reg = <0x8>; 84 }; 85#else 86 xg_aq1202_phy4: ethernet-phy@1 { 87 compatible = "ethernet-phy-ieee802.3-c45"; 88 reg = <0x1>; 89 }; 90#endif 91 }; 92 }; 93}; 94 95&espi0 { 96 status = "okay"; 97 flash@0 { 98 compatible = "jedec,spi-nor"; /* 16MB */ 99 #address-cells = <1>; 100 #size-cells = <1>; 101 reg = <0>; 102 spi-max-frequency = <10000000>; /* input clock */ 103 }; 104}; 105 106&i2c0 { 107 status = "okay"; 108 rtc@68 { 109 compatible = "dallas,ds1339"; 110 reg = <0x68>; 111 }; 112}; 113 114/include/ "t2080si-post.dtsi" 115