1// SPDX-License-Identifier: GPL-2.0+
2/*
3 *  Main sandbox64 devicetree
4 */
5/dts-v1/;
6
7#include <config.h>
8
9/ {
10	#address-cells = <2>;
11	#size-cells = <2>;
12	model = "sandbox";
13	compatible = "sandbox";
14
15	aliases {
16		i2c0 = &i2c_0;
17		pci0 = &pcic;
18		rtc0 = &rtc_0;
19		axi0 = &axi;
20		spi0 = &spi;
21	};
22
23	memory {
24		reg = /bits/ 64 <0 CONFIG_SYS_SDRAM_SIZE>;
25	};
26
27	reserved-memory {
28		#address-cells = <2>;
29		#size-cells = <2>;
30		ranges;
31
32		reservation_test_size {
33			size = <0 0x4000>;
34			alignment = <0 0x2000>;
35		};
36
37		reservation_test@a000 {
38			reg = <0 0x00d0a000 0 0x2000>;
39		};
40
41		reservation_test@7000 {
42			reg = <0 0x00d07000 0 0x1000>;
43		};
44	};
45
46	/* ... */
47	cros_ec: cros-ec {
48		reg = <0 0 0 0>;
49		u-boot,dm-pre-reloc;
50		compatible = "google,cros-ec-sandbox";
51	};
52
53	ethrawbus {
54		compatible = "sandbox,eth-raw-bus";
55		skip-localhost = <1>;
56	};
57
58	eth@10002000 {
59		compatible = "sandbox,eth";
60		reg = <0x0 0x10002000 0x0 0x1000>;
61		fake-host-hwaddr = [00 00 66 44 22 00];
62	};
63
64	i2c_0: i2c@0 {
65		#address-cells = <1>;
66		#size-cells = <0>;
67		reg = <0 0 0 0>;
68		compatible = "sandbox,i2c";
69		clock-frequency = <400000>;
70		pinctrl-names = "default";
71		pinctrl-0 = <&pinctrl_i2c0>;
72	};
73
74	pcic: pci@0 {
75		compatible = "sandbox,pci";
76		device_type = "pci";
77		bus-range = <0x00 0xff>;
78		#address-cells = <3>;
79		#size-cells = <2>;
80		ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000
81				0x01000000 0 0x20000000 0 0x20000000 0 0x2000>;
82	};
83
84	spi: spi@0 {
85		u-boot,dm-pre-reloc;
86		#address-cells = <1>;
87		#size-cells = <0>;
88		reg = <0 0 0 0>;
89		compatible = "sandbox,spi";
90		cs-gpios = <0>, <&gpio_a 0>;
91	};
92
93};
94
95#include "sandbox.dtsi"
96#include "cros-ec-keyboard.dtsi"
97#include "sandbox_pmic.dtsi"
98