1 // SPDX-License-Identifier: Intel
2 /*
3 * Copyright (C) 2013, Intel Corporation
4 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
5 * Copyright (C) 2015, Kodak Alaris, Inc
6 */
7
8 #include <common.h>
9 #include <fdtdec.h>
10 #include <log.h>
11 #include <asm/fsp1/fsp_support.h>
12 #include <asm/global_data.h>
13
14 DECLARE_GLOBAL_DATA_PTR;
15
16 /**
17 * Override the FSP's Azalia configuration data
18 *
19 * @azalia: pointer to be updated to point to a ROM address where Azalia
20 * configuration data is stored
21 */
update_fsp_azalia_configs(struct azalia_config ** azalia)22 __weak void update_fsp_azalia_configs(struct azalia_config **azalia)
23 {
24 *azalia = NULL;
25 }
26
27 /**
28 * Override the FSP's configuration data.
29 * If the device tree does not specify an integer setting, use the default
30 * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
31 */
fsp_update_configs(struct fsp_config_data * config,struct fspinit_rtbuf * rt_buf)32 void fsp_update_configs(struct fsp_config_data *config,
33 struct fspinit_rtbuf *rt_buf)
34 {
35 struct upd_region *fsp_upd = &config->fsp_upd;
36 struct memory_down_data *mem;
37 const void *blob = gd->fdt_blob;
38 int node;
39
40 /* Initialize runtime buffer for fsp_init() */
41 rt_buf->common.stack_top = config->common.stack_top - 32;
42 rt_buf->common.boot_mode = config->common.boot_mode;
43 rt_buf->common.upd_data = &config->fsp_upd;
44
45 node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
46 if (node < 0) {
47 debug("%s: Cannot find FSP node\n", __func__);
48 return;
49 }
50
51 fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
52 "fsp,mrc-init-tseg-size",
53 MRC_INIT_TSEG_SIZE_1MB);
54 fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
55 "fsp,mrc-init-mmio-size",
56 MRC_INIT_MMIO_SIZE_2048MB);
57 fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
58 "fsp,mrc-init-spd-addr1",
59 0xa0);
60 fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
61 "fsp,mrc-init-spd-addr2",
62 0xa2);
63 fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node,
64 "fsp,emmc-boot-mode",
65 EMMC_BOOT_MODE_EMMC41);
66 fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio");
67 fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node,
68 "fsp,enable-sdcard");
69 fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node,
70 "fsp,enable-hsuart0");
71 fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node,
72 "fsp,enable-hsuart1");
73 fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi");
74 fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata");
75 fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode",
76 SATA_MODE_AHCI);
77 fsp_upd->enable_azalia = fdtdec_get_bool(blob, node,
78 "fsp,enable-azalia");
79 if (fsp_upd->enable_azalia)
80 update_fsp_azalia_configs(&fsp_upd->azalia_cfg_ptr);
81 fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci");
82 fsp_upd->lpe_mode = fdtdec_get_int(blob, node, "fsp,lpe-mode",
83 LPE_MODE_PCI);
84 fsp_upd->lpss_sio_mode = fdtdec_get_int(blob, node, "fsp,lpss-sio-mode",
85 LPSS_SIO_MODE_PCI);
86 fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0");
87 fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1");
88 fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0");
89 fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1");
90 fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2");
91 fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3");
92 fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4");
93 fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5");
94 fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6");
95 fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0");
96 fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1");
97 fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi");
98 fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
99 "fsp,igd-dvmt50-pre-alloc", IGD_DVMT50_PRE_ALLOC_64MB);
100 fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
101 APERTURE_SIZE_256MB);
102 fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size",
103 GTT_SIZE_2MB);
104 fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node,
105 "fsp,mrc-debug-msg");
106 fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable");
107 fsp_upd->scc_mode = fdtdec_get_int(blob, node, "fsp,scc-mode",
108 SCC_MODE_PCI);
109 fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node,
110 "fsp,igd-render-standby");
111 fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node,
112 "fsp,txe-uma-enable");
113 fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
114 OS_SELECTION_LINUX);
115 fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node,
116 "fsp,emmc45-ddr50-enabled");
117 fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node,
118 "fsp,emmc45-hs200-enabled");
119 fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
120 "fsp,emmc45-retune-timer-value", 8);
121 fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd");
122
123 mem = &fsp_upd->memory_params;
124 mem->enable_memory_down = fdtdec_get_bool(blob, node,
125 "fsp,enable-memory-down");
126 if (mem->enable_memory_down) {
127 node = fdtdec_next_compatible(blob, node,
128 COMPAT_INTEL_BAYTRAIL_FSP_MDP);
129 if (node < 0) {
130 debug("%s: Cannot find FSP memory-down-params node\n",
131 __func__);
132 } else {
133 mem->dram_speed = fdtdec_get_int(blob, node,
134 "fsp,dram-speed",
135 DRAM_SPEED_1333MTS);
136 mem->dram_type = fdtdec_get_int(blob, node,
137 "fsp,dram-type",
138 DRAM_TYPE_DDR3L);
139 mem->dimm_0_enable = fdtdec_get_bool(blob, node,
140 "fsp,dimm-0-enable");
141 mem->dimm_1_enable = fdtdec_get_bool(blob, node,
142 "fsp,dimm-1-enable");
143 mem->dimm_width = fdtdec_get_int(blob, node,
144 "fsp,dimm-width",
145 DIMM_WIDTH_X8);
146 mem->dimm_density = fdtdec_get_int(blob, node,
147 "fsp,dimm-density",
148 DIMM_DENSITY_2GBIT);
149 mem->dimm_bus_width = fdtdec_get_int(blob, node,
150 "fsp,dimm-bus-width",
151 DIMM_BUS_WIDTH_64BITS);
152 mem->dimm_sides = fdtdec_get_int(blob, node,
153 "fsp,dimm-sides",
154 DIMM_SIDES_1RANKS);
155 mem->dimm_tcl = fdtdec_get_int(blob, node,
156 "fsp,dimm-tcl", 0x09);
157 mem->dimm_trpt_rcd = fdtdec_get_int(blob, node,
158 "fsp,dimm-trpt-rcd", 0x09);
159 mem->dimm_twr = fdtdec_get_int(blob, node,
160 "fsp,dimm-twr", 0x0a);
161 mem->dimm_twtr = fdtdec_get_int(blob, node,
162 "fsp,dimm-twtr", 0x05);
163 mem->dimm_trrd = fdtdec_get_int(blob, node,
164 "fsp,dimm-trrd", 0x04);
165 mem->dimm_trtp = fdtdec_get_int(blob, node,
166 "fsp,dimm-trtp", 0x05);
167 mem->dimm_tfaw = fdtdec_get_int(blob, node,
168 "fsp,dimm-tfaw", 0x14);
169 }
170 }
171 }
172