1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/interrupt-router/intel-irq.h>
9
10/* ICH9 IRQ router has discrete PIRQ control registers */
11#undef PIRQE
12#undef PIRQF
13#undef PIRQG
14#undef PIRQH
15#define PIRQE	8
16#define PIRQF	9
17#define PIRQG	10
18#define PIRQH	11
19
20/include/ "skeleton.dtsi"
21/include/ "serial.dtsi"
22/include/ "keyboard.dtsi"
23/include/ "reset.dtsi"
24/include/ "rtc.dtsi"
25
26#include "tsc_timer.dtsi"
27#include "smbios.dtsi"
28
29/ {
30	model = "QEMU x86 (Q35)";
31	compatible = "qemu,x86";
32
33	config {
34		silent_console = <0>;
35		u-boot,no-apm-finalize;
36	};
37
38	chosen {
39		stdout-path = "/serial";
40	};
41
42	cpus {
43		#address-cells = <1>;
44		#size-cells = <0>;
45		u-boot,dm-pre-reloc;
46
47		cpu@0 {
48			device_type = "cpu";
49			compatible = "cpu-qemu";
50			u-boot,dm-pre-reloc;
51			reg = <0>;
52			intel,apic-id = <0>;
53		};
54	};
55
56	pci {
57		compatible = "pci-x86";
58		#address-cells = <3>;
59		#size-cells = <2>;
60		u-boot,dm-pre-reloc;
61		ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
62			0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
63			0x01000000 0x0 0x2000 0x2000 0 0xe000>;
64
65		pch@1f,0 {
66			reg = <0x0000f800 0 0 0 0>;
67			compatible = "intel,pch9";
68			u-boot,dm-pre-reloc;
69
70			irq-router {
71				compatible = "intel,irq-router";
72				u-boot,dm-pre-reloc;
73				intel,pirq-config = "pci";
74				intel,actl-8bit;
75				intel,actl-addr = <0x44>;
76				intel,pirq-link = <0x60 8>;
77				intel,pirq-mask = <0x0e40>;
78				intel,pirq-routing = <
79					/* e1000 NIC */
80					PCI_BDF(0, 2, 0) INTA PIRQG
81					/* ICH9 UHCI */
82					PCI_BDF(0, 29, 0) INTA PIRQA
83					PCI_BDF(0, 29, 1) INTB PIRQB
84					PCI_BDF(0, 29, 2) INTC PIRQC
85					/* ICH9 EHCI */
86					PCI_BDF(0, 29, 7) INTD PIRQD
87					/* ICH9 SATA */
88					PCI_BDF(0, 31, 2) INTA PIRQA
89				>;
90			};
91		};
92	};
93
94};
95