1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2017 General Electric Company
4 *
5 * Based on board/freescale/mx53loco/mx53loco.c:
6 *
7 * Copyright (C) 2011 Freescale Semiconductor, Inc.
8 * Jason Liu <r64343@freescale.com>
9 */
10
11 #include <common.h>
12 #include <init.h>
13 #include <asm/global_data.h>
14 #include <asm/io.h>
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/sys_proto.h>
17 #include <asm/arch/crm_regs.h>
18 #include <asm/arch/clock.h>
19 #include <asm/arch/iomux-mx53.h>
20 #include <asm/arch/clock.h>
21 #include <env.h>
22 #include <linux/errno.h>
23 #include <linux/libfdt.h>
24 #include <asm/mach-imx/mxc_i2c.h>
25 #include <asm/mach-imx/mx5_video.h>
26 #include <netdev.h>
27 #include <i2c.h>
28 #include <mmc.h>
29 #include <fsl_esdhc_imx.h>
30 #include <asm/gpio.h>
31 #include <power/pmic.h>
32 #include <dialog_pmic.h>
33 #include <fsl_pmic.h>
34 #include <linux/fb.h>
35 #include <ipu_pixfmt.h>
36 #include <version_string.h>
37 #include <watchdog.h>
38 #include "ppd_gpio.h"
39 #include <stdlib.h>
40 #include "../../ge/common/ge_rtc.h"
41 #include "../../ge/common/vpd_reader.h"
42
43 DECLARE_GLOBAL_DATA_PTR;
44
45 static u32 mx53_dram_size[2];
46
get_effective_memsize(void)47 phys_size_t get_effective_memsize(void)
48 {
49 /*
50 * WARNING: We must override get_effective_memsize() function here
51 * to report only the size of the first DRAM bank. This is to make
52 * U-Boot relocator place U-Boot into valid memory, that is, at the
53 * end of the first DRAM bank. If we did not override this function
54 * like so, U-Boot would be placed at the address of the first DRAM
55 * bank + total DRAM size - sizeof(uboot), which in the setup where
56 * each DRAM bank contains 512MiB of DRAM would result in placing
57 * U-Boot into invalid memory area close to the end of the first
58 * DRAM bank.
59 */
60 return mx53_dram_size[0];
61 }
62
dram_init(void)63 int dram_init(void)
64 {
65 mx53_dram_size[0] = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30);
66 mx53_dram_size[1] = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30);
67
68 gd->ram_size = mx53_dram_size[0] + mx53_dram_size[1];
69
70 return 0;
71 }
72
dram_init_banksize(void)73 int dram_init_banksize(void)
74 {
75 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
76 gd->bd->bi_dram[0].size = mx53_dram_size[0];
77
78 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
79 gd->bd->bi_dram[1].size = mx53_dram_size[1];
80
81 return 0;
82 }
83
84 #ifdef CONFIG_REVISION_TAG
get_board_rev(void)85 u32 get_board_rev(void)
86 {
87 return get_cpu_rev() & ~(0xF << 8);
88 }
89 #endif
90
91 #ifdef CONFIG_USB_EHCI_MX5
board_ehci_hcd_init(int port)92 int board_ehci_hcd_init(int port)
93 {
94 /* request VBUS power enable pin, GPIO7_8 */
95 imx_iomux_v3_setup_pad(MX53_PAD_PATA_DA_2__GPIO7_8);
96 gpio_direction_output(IMX_GPIO_NR(7, 8), 1);
97 return 0;
98 }
99 #endif
100
clock_1GHz(void)101 static int clock_1GHz(void)
102 {
103 int ret;
104 u32 ref_clk = MXC_HCLK;
105 /*
106 * After increasing voltage to 1.25V, we can switch
107 * CPU clock to 1GHz and DDR to 400MHz safely
108 */
109 ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
110 if (ret) {
111 printf("CPU: Switch CPU clock to 1GHZ failed\n");
112 return -1;
113 }
114
115 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
116 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
117 if (ret) {
118 printf("CPU: Switch DDR clock to 400MHz failed\n");
119 return -1;
120 }
121
122 return 0;
123 }
124
ppd_gpio_init(void)125 void ppd_gpio_init(void)
126 {
127 int i;
128
129 imx_iomux_v3_setup_multiple_pads(ppd_pads, ARRAY_SIZE(ppd_pads));
130 for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i) {
131 gpio_request(ppd_gpios[i].gpio, "request");
132 gpio_direction_output(ppd_gpios[i].gpio, ppd_gpios[i].value);
133 }
134 }
135
board_early_init_f(void)136 int board_early_init_f(void)
137 {
138 ppd_gpio_init();
139
140 return 0;
141 }
142
143 /*
144 * Do not overwrite the console
145 * Use always serial for U-Boot console
146 */
overwrite_console(void)147 int overwrite_console(void)
148 {
149 return 1;
150 }
151
152 #define VPD_TYPE_INVALID 0x00
153 #define VPD_BLOCK_NETWORK 0x20
154 #define VPD_BLOCK_HWID 0x44
155 #define VPD_PRODUCT_PPD 4
156 #define VPD_HAS_MAC1 0x1
157 #define VPD_MAC_ADDRESS_LENGTH 6
158
159 struct vpd_cache {
160 u8 product_id;
161 u8 has;
162 unsigned char mac1[VPD_MAC_ADDRESS_LENGTH];
163 };
164
165 /*
166 * Extracts MAC and product information from the VPD.
167 */
vpd_callback(struct vpd_cache * userdata,u8 id,u8 version,u8 type,size_t size,u8 const * data)168 static int vpd_callback(struct vpd_cache *userdata, u8 id, u8 version,
169 u8 type, size_t size, u8 const *data)
170 {
171 struct vpd_cache *vpd = userdata;
172
173 if (id == VPD_BLOCK_HWID && version == 1 && type != VPD_TYPE_INVALID &&
174 size >= 1) {
175 vpd->product_id = data[0];
176
177 } else if (id == VPD_BLOCK_NETWORK && version == 1 &&
178 type != VPD_TYPE_INVALID) {
179 if (size >= 6) {
180 vpd->has |= VPD_HAS_MAC1;
181 memcpy(vpd->mac1, data, VPD_MAC_ADDRESS_LENGTH);
182 }
183 }
184
185 return 0;
186 }
187
process_vpd(struct vpd_cache * vpd)188 static void process_vpd(struct vpd_cache *vpd)
189 {
190 int fec_index = -1;
191
192 if (vpd->product_id == VPD_PRODUCT_PPD)
193 fec_index = 0;
194
195 if (fec_index >= 0 && (vpd->has & VPD_HAS_MAC1))
196 eth_env_set_enetaddr("ethaddr", vpd->mac1);
197 }
198
board_init(void)199 int board_init(void)
200 {
201 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
202
203 mxc_set_sata_internal_clock();
204
205 return 0;
206 }
207
misc_init_r(void)208 int misc_init_r(void)
209 {
210 const char *cause;
211
212 /* We care about WDOG only, treating everything else as
213 * a power-on-reset.
214 */
215 if (get_imx_reset_cause() & 0x0010)
216 cause = "WDOG";
217 else
218 cause = "POR";
219
220 env_set("bootcause", cause);
221
222 return 0;
223 }
224
board_late_init(void)225 int board_late_init(void)
226 {
227 int res;
228 struct vpd_cache vpd;
229
230 memset(&vpd, 0, sizeof(vpd));
231 res = read_i2c_vpd(&vpd, vpd_callback);
232 if (!res)
233 process_vpd(&vpd);
234 else
235 printf("Can't read VPD");
236
237 res = clock_1GHz();
238 if (res != 0)
239 return res;
240
241 print_cpuinfo();
242
243 check_time();
244
245 return 0;
246 }
247
checkboard(void)248 int checkboard(void)
249 {
250 puts("Board: GE PPD\n");
251
252 return 0;
253 }
254
255 #ifdef CONFIG_OF_BOARD_SETUP
ft_board_setup(void * blob,struct bd_info * bd)256 int ft_board_setup(void *blob, struct bd_info *bd)
257 {
258 char *rtc_status = env_get("rtc_status");
259
260 fdt_setprop(blob, 0, "ge,boot-ver", version_string,
261 strlen(version_string) + 1);
262
263 fdt_setprop(blob, 0, "ge,rtc-status", rtc_status,
264 strlen(rtc_status) + 1);
265 return 0;
266 }
267 #endif
268