1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2009-2012
4 * Wojciech Dubowik <wojciech.dubowik@neratec.com>
5 * Luka Perkov <luka@openwrt.org>
6 */
7
8 #include <common.h>
9 #include <init.h>
10 #include <miiphy.h>
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/soc.h>
13 #include <asm/arch/mpp.h>
14 #include <asm/global_data.h>
15 #include "iconnect.h"
16
17 DECLARE_GLOBAL_DATA_PTR;
18
board_early_init_f(void)19 int board_early_init_f(void)
20 {
21 /*
22 * default gpio configuration
23 * There are maximum 64 gpios controlled through 2 sets of registers
24 * the below configuration configures mainly initial LED status
25 */
26 mvebu_config_gpio(ICONNECT_OE_VAL_LOW,
27 ICONNECT_OE_VAL_HIGH,
28 ICONNECT_OE_LOW, ICONNECT_OE_HIGH);
29
30 /* Multi-Purpose Pins Functionality configuration */
31 static const u32 kwmpp_config[] = {
32 MPP0_NF_IO2,
33 MPP1_NF_IO3,
34 MPP2_NF_IO4,
35 MPP3_NF_IO5,
36 MPP4_NF_IO6,
37 MPP5_NF_IO7,
38 MPP6_SYSRST_OUTn, /* Reset signal */
39 MPP7_GPO,
40 MPP8_TW_SDA, /* I2C */
41 MPP9_TW_SCK, /* I2C */
42 MPP10_UART0_TXD,
43 MPP11_UART0_RXD,
44 MPP12_GPO, /* Reset button */
45 MPP13_SD_CMD,
46 MPP14_SD_D0,
47 MPP15_SD_D1,
48 MPP16_SD_D2,
49 MPP17_SD_D3,
50 MPP18_NF_IO0,
51 MPP19_NF_IO1,
52 MPP20_GE1_0,
53 MPP21_GE1_1,
54 MPP22_GE1_2,
55 MPP23_GE1_3,
56 MPP24_GE1_4,
57 MPP25_GE1_5,
58 MPP26_GE1_6,
59 MPP27_GE1_7,
60 MPP28_GPIO,
61 MPP29_GPIO,
62 MPP30_GE1_10,
63 MPP31_GE1_11,
64 MPP32_GE1_12,
65 MPP33_GE1_13,
66 MPP34_GE1_14,
67 MPP35_GPIO, /* OTB button */
68 MPP36_AUDIO_SPDIFI,
69 MPP37_AUDIO_SPDIFO,
70 MPP38_GPIO,
71 MPP39_TDM_SPI_CS0,
72 MPP40_TDM_SPI_SCK,
73 MPP41_GPIO, /* LED brightness */
74 MPP42_GPIO, /* LED power (blue) */
75 MPP43_GPIO, /* LED power (red) */
76 MPP44_GPIO, /* LED USB 1 */
77 MPP45_GPIO, /* LED USB 2 */
78 MPP46_GPIO, /* LED USB 3 */
79 MPP47_GPIO, /* LED USB 4 */
80 MPP48_GPIO, /* LED OTB */
81 MPP49_GPIO,
82 0
83 };
84 kirkwood_mpp_conf(kwmpp_config, NULL);
85 return 0;
86 }
87
board_init(void)88 int board_init(void)
89 {
90 /* adress of boot parameters */
91 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
92
93 return 0;
94 }
95