1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018-2019 Toradex AG
4 */
5 #include <common.h>
6 #include <init.h>
7 #include <asm/global_data.h>
8 #include <linux/delay.h>
9
10 #include <asm/arch/clock.h>
11 #include <asm/arch/crm_regs.h>
12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch-mx6/clock.h>
14 #include <asm/arch-mx6/imx-regs.h>
15 #include <asm/arch-mx6/mx6ull_pins.h>
16 #include <asm/arch/sys_proto.h>
17 #include <asm/gpio.h>
18 #include <asm/mach-imx/boot_mode.h>
19 #include <asm/mach-imx/iomux-v3.h>
20 #include <asm/io.h>
21 #include <dm.h>
22 #include <dm/platform_data/serial_mxc.h>
23 #include <env.h>
24 #include <fdt_support.h>
25 #include <imx_thermal.h>
26 #include <jffs2/load_kernel.h>
27 #include <linux/sizes.h>
28 #include <miiphy.h>
29 #include <mtd_node.h>
30 #include <netdev.h>
31
32 #include "../common/tdx-common.h"
33 #include "../common/tdx-cfg-block.h"
34
35 DECLARE_GLOBAL_DATA_PTR;
36
37 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
38 PAD_CTL_DSE_48ohm)
39
40 #define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
41
42 #define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
43
44 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
45
46 #define FLASH_DETECTION_CTRL (PAD_CTL_HYS | PAD_CTL_PUE)
47 #define FLASH_DET_GPIO IMX_GPIO_NR(4, 1)
48 static const iomux_v3_cfg_t flash_detection_pads[] = {
49 MX6_PAD_NAND_WE_B__GPIO4_IO01 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL),
50 };
51
52 static bool is_emmc;
53
dram_init(void)54 int dram_init(void)
55 {
56 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
57
58 return 0;
59 }
60
61 #ifdef CONFIG_NAND_MXS
setup_gpmi_nand(void)62 static void setup_gpmi_nand(void)
63 {
64 setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
65 MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
66 MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)));
67 }
68 #endif /* CONFIG_NAND_MXS */
69
70 #ifdef CONFIG_DM_VIDEO
71 static const iomux_v3_cfg_t backlight_pads[] = {
72 /* Backlight On */
73 MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
74 /* Backlight PWM<A> (multiplexed pin) */
75 MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
76 };
77
78 #define GPIO_BL_ON IMX_GPIO_NR(1, 11)
79 #define GPIO_PWM_A IMX_GPIO_NR(4, 11)
80
setup_lcd(void)81 static int setup_lcd(void)
82 {
83 imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
84
85 /* Set BL_ON */
86 gpio_request(GPIO_BL_ON, "BL_ON");
87 gpio_direction_output(GPIO_BL_ON, 1);
88
89 /* Set PWM<A> to full brightness (assuming inversed polarity) */
90 gpio_request(GPIO_PWM_A, "PWM<A>");
91 gpio_direction_output(GPIO_PWM_A, 0);
92
93 return 0;
94 }
95 #endif
96
97 #ifdef CONFIG_FEC_MXC
setup_fec(void)98 static int setup_fec(void)
99 {
100 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
101 int ret;
102
103 /* provide the PHY clock from the i.MX 6 */
104 ret = enable_fec_anatop_clock(1, ENET_50MHZ);
105 if (ret)
106 return ret;
107
108 /* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */
109 clrsetbits_le32(&iomuxc_regs->gpr[1],
110 IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
111 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
112
113 /* give new Ethernet PHY power save mode circuitry time to settle */
114 mdelay(300);
115
116 return 0;
117 }
118
board_phy_config(struct phy_device * phydev)119 int board_phy_config(struct phy_device *phydev)
120 {
121 if (phydev->drv->config)
122 phydev->drv->config(phydev);
123 return 0;
124 }
125 #endif /* CONFIG_FEC_MXC */
126
board_init(void)127 int board_init(void)
128 {
129 /* address of boot parameters */
130 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
131
132 /*
133 * Enable GPIO on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST
134 * is pulled high with 4.7k for eMMC devices. This allows to reliably
135 * detect eMMC/NAND flash
136 */
137 imx_iomux_v3_setup_multiple_pads(flash_detection_pads, ARRAY_SIZE(flash_detection_pads));
138 gpio_request(FLASH_DET_GPIO, "flash-detection-gpio");
139 is_emmc = gpio_get_value(FLASH_DET_GPIO);
140 gpio_free(FLASH_DET_GPIO);
141
142 #ifdef CONFIG_FEC_MXC
143 setup_fec();
144 #endif
145
146 #ifdef CONFIG_NAND_MXS
147 setup_gpmi_nand();
148 #endif
149 return 0;
150 }
151
152 #ifdef CONFIG_CMD_BMODE
153 /* TODO */
154 static const struct boot_mode board_boot_modes[] = {
155 /* 4 bit bus width */
156 {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
157 {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
158 {NULL, 0},
159 };
160 #endif
161
board_late_init(void)162 int board_late_init(void)
163 {
164 #ifdef CONFIG_TDX_CFG_BLOCK
165 /*
166 * If we have a valid config block and it says we are a module with
167 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
168 */
169 if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
170 tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT) {
171 env_set("variant", "-wifi");
172 } else {
173 if (is_emmc)
174 env_set("variant", "-emmc");
175 }
176 #else
177 if (is_emmc)
178 env_set("variant", "-emmc");
179 #endif
180
181 /*
182 * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
183 * SOC to request for a lower voltage during sleep. This is necessary
184 * because the voltage is changing too slow for the SOC to wake up
185 * properly.
186 */
187 __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
188
189 #ifdef CONFIG_CMD_BMODE
190 add_board_boot_modes(board_boot_modes);
191 #endif
192
193 #ifdef CONFIG_CMD_USB_SDP
194 if (is_boot_from_usb()) {
195 printf("Serial Downloader recovery mode, using sdp command\n");
196 env_set("bootdelay", "0");
197 env_set("bootcmd", "sdp 0");
198 }
199 #endif /* CONFIG_CMD_USB_SDP */
200
201 #if defined(CONFIG_DM_VIDEO)
202 setup_lcd();
203 #endif
204
205 return 0;
206 }
207
checkboard(void)208 int checkboard(void)
209 {
210 printf("Model: Toradex Colibri iMX6ULL\n");
211
212 return 0;
213 }
214
215 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,struct bd_info * bd)216 int ft_board_setup(void *blob, struct bd_info *bd)
217 {
218 #if defined(CONFIG_FDT_FIXUP_PARTITIONS)
219 static struct node_info nodes[] = {
220 { "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
221 { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
222 };
223
224 /* Update partition nodes using info from mtdparts env var */
225 puts(" Updating MTD partitions...\n");
226 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
227 #endif
228
229 return ft_common_board_setup(blob, bd);
230 }
231 #endif
232
233 static struct mxc_serial_plat mxc_serial_plat = {
234 .reg = (struct mxc_uart *)UART1_BASE,
235 .use_dte = 1,
236 };
237
238 U_BOOT_DRVINFO(mxc_serial) = {
239 .name = "serial_mxc",
240 .plat = &mxc_serial_plat,
241 };
242