1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2009
4 * Sergey Kubushyn, himself, ksi@koi8.net
5 *
6 * Changes for unified multibus/multiadapter I2C support.
7 *
8 * (C) Copyright 2001
9 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
10 */
11
12 /*
13 * I2C Functions similar to the standard memory functions.
14 *
15 * There are several parameters in many of the commands that bear further
16 * explanations:
17 *
18 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
19 * Each I2C chip on the bus has a unique address. On the I2C data bus,
20 * the address is the upper seven bits and the LSB is the "read/write"
21 * bit. Note that the {i2c_chip} address specified on the command
22 * line is not shifted up: e.g. a typical EEPROM memory chip may have
23 * an I2C address of 0x50, but the data put on the bus will be 0xA0
24 * for write and 0xA1 for read. This "non shifted" address notation
25 * matches at least half of the data sheets :-/.
26 *
27 * {addr} is the address (or offset) within the chip. Small memory
28 * chips have 8 bit addresses. Large memory chips have 16 bit
29 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
30 * Many non-memory chips have multiple registers and {addr} is used
31 * as the register index. Some non-memory chips have only one register
32 * and therefore don't need any {addr} parameter.
33 *
34 * The default {addr} parameter is one byte (.1) which works well for
35 * memories and registers with 8 bits of address space.
36 *
37 * You can specify the length of the {addr} field with the optional .0,
38 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
39 * manipulating a single register device which doesn't use an address
40 * field, use "0.0" for the address and the ".0" length field will
41 * suppress the address in the I2C data stream. This also works for
42 * successive reads using the I2C auto-incrementing memory pointer.
43 *
44 * If you are manipulating a large memory with 2-byte addresses, use
45 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
46 *
47 * Then there are the unfortunate memory chips that spill the most
48 * significant 1, 2, or 3 bits of address into the chip address byte.
49 * This effectively makes one chip (logically) look like 2, 4, or
50 * 8 chips. This is handled (awkwardly) by #defining
51 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
52 * {addr} field (since .1 is the default, it doesn't actually have to
53 * be specified). Examples: given a memory chip at I2C chip address
54 * 0x50, the following would happen...
55 * i2c md 50 0 10 display 16 bytes starting at 0x000
56 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
57 * i2c md 50 100 10 display 16 bytes starting at 0x100
58 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
59 * i2c md 50 210 10 display 16 bytes starting at 0x210
60 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
61 * This is awfully ugly. It would be nice if someone would think up
62 * a better way of handling this.
63 *
64 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
65 */
66
67 #include <common.h>
68 #include <bootretry.h>
69 #include <cli.h>
70 #include <command.h>
71 #include <console.h>
72 #include <dm.h>
73 #include <edid.h>
74 #include <errno.h>
75 #include <i2c.h>
76 #include <log.h>
77 #include <malloc.h>
78 #include <asm/byteorder.h>
79 #include <linux/compiler.h>
80 #include <linux/delay.h>
81 #include <u-boot/crc.h>
82
83 /* Display values from last command.
84 * Memory modify remembered values are different from display memory.
85 */
86 static uint i2c_dp_last_chip;
87 static uint i2c_dp_last_addr;
88 static uint i2c_dp_last_alen;
89 static uint i2c_dp_last_length = 0x10;
90
91 static uint i2c_mm_last_chip;
92 static uint i2c_mm_last_addr;
93 static uint i2c_mm_last_alen;
94
95 /* If only one I2C bus is present, the list of devices to ignore when
96 * the probe command is issued is represented by a 1D array of addresses.
97 * When multiple buses are present, the list is an array of bus-address
98 * pairs. The following macros take care of this */
99
100 #if defined(CONFIG_SYS_I2C_NOPROBES)
101 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
102 static struct
103 {
104 uchar bus;
105 uchar addr;
106 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
107 #define GET_BUS_NUM i2c_get_bus_num()
108 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
109 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
110 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
111 #else /* single bus */
112 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
113 #define GET_BUS_NUM 0
114 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
115 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
116 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
117 #endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
118 #endif
119
120 #define DISP_LINE_LEN 16
121
122 /*
123 * Default for driver model is to use the chip's existing address length.
124 * For legacy code, this is not stored, so we need to use a suitable
125 * default.
126 */
127 #if CONFIG_IS_ENABLED(DM_I2C)
128 #define DEFAULT_ADDR_LEN (-1)
129 #else
130 #define DEFAULT_ADDR_LEN 1
131 #endif
132
133 #if CONFIG_IS_ENABLED(DM_I2C)
134 static struct udevice *i2c_cur_bus;
135
cmd_i2c_set_bus_num(unsigned int busnum)136 static int cmd_i2c_set_bus_num(unsigned int busnum)
137 {
138 struct udevice *bus;
139 int ret;
140
141 ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
142 if (ret) {
143 debug("%s: No bus %d\n", __func__, busnum);
144 return ret;
145 }
146 i2c_cur_bus = bus;
147
148 return 0;
149 }
150
i2c_get_cur_bus(struct udevice ** busp)151 static int i2c_get_cur_bus(struct udevice **busp)
152 {
153 #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM
154 if (!i2c_cur_bus) {
155 if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) {
156 printf("Default I2C bus %d not found\n",
157 CONFIG_I2C_DEFAULT_BUS_NUMBER);
158 return -ENODEV;
159 }
160 }
161 #endif
162
163 if (!i2c_cur_bus) {
164 puts("No I2C bus selected\n");
165 return -ENODEV;
166 }
167 *busp = i2c_cur_bus;
168
169 return 0;
170 }
171
i2c_get_cur_bus_chip(uint chip_addr,struct udevice ** devp)172 static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp)
173 {
174 struct udevice *bus;
175 int ret;
176
177 ret = i2c_get_cur_bus(&bus);
178 if (ret)
179 return ret;
180
181 return i2c_get_chip(bus, chip_addr, 1, devp);
182 }
183
184 #endif
185
186 /**
187 * i2c_init_board() - Board-specific I2C bus init
188 *
189 * This function is the default no-op implementation of I2C bus
190 * initialization. This function can be overridden by board-specific
191 * implementation if needed.
192 */
193 __weak
i2c_init_board(void)194 void i2c_init_board(void)
195 {
196 }
197
198 /**
199 * get_alen() - Small parser helper function to get address length
200 *
201 * Returns the address length.
202 */
get_alen(char * arg,int default_len)203 static uint get_alen(char *arg, int default_len)
204 {
205 int j;
206 int alen;
207
208 alen = default_len;
209 for (j = 0; j < 8; j++) {
210 if (arg[j] == '.') {
211 alen = arg[j+1] - '0';
212 break;
213 } else if (arg[j] == '\0')
214 break;
215 }
216 return alen;
217 }
218
219 enum i2c_err_op {
220 I2C_ERR_READ,
221 I2C_ERR_WRITE,
222 };
223
i2c_report_err(int ret,enum i2c_err_op op)224 static int i2c_report_err(int ret, enum i2c_err_op op)
225 {
226 printf("Error %s the chip: %d\n",
227 op == I2C_ERR_READ ? "reading" : "writing", ret);
228
229 return CMD_RET_FAILURE;
230 }
231
232 /**
233 * do_i2c_read() - Handle the "i2c read" command-line command
234 * @cmdtp: Command data struct pointer
235 * @flag: Command flag
236 * @argc: Command-line argument count
237 * @argv: Array of command-line arguments
238 *
239 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
240 * on error.
241 *
242 * Syntax:
243 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
244 */
do_i2c_read(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])245 static int do_i2c_read(struct cmd_tbl *cmdtp, int flag, int argc,
246 char *const argv[])
247 {
248 uint chip;
249 uint devaddr, length;
250 int alen;
251 u_char *memaddr;
252 int ret;
253 #if CONFIG_IS_ENABLED(DM_I2C)
254 struct udevice *dev;
255 #endif
256
257 if (argc != 5)
258 return CMD_RET_USAGE;
259
260 /*
261 * I2C chip address
262 */
263 chip = hextoul(argv[1], NULL);
264
265 /*
266 * I2C data address within the chip. This can be 1 or
267 * 2 bytes long. Some day it might be 3 bytes long :-).
268 */
269 devaddr = hextoul(argv[2], NULL);
270 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
271 if (alen > 3)
272 return CMD_RET_USAGE;
273
274 /*
275 * Length is the number of objects, not number of bytes.
276 */
277 length = hextoul(argv[3], NULL);
278
279 /*
280 * memaddr is the address where to store things in memory
281 */
282 memaddr = (u_char *)hextoul(argv[4], NULL);
283
284 #if CONFIG_IS_ENABLED(DM_I2C)
285 ret = i2c_get_cur_bus_chip(chip, &dev);
286 if (!ret && alen != -1)
287 ret = i2c_set_chip_offset_len(dev, alen);
288 if (!ret)
289 ret = dm_i2c_read(dev, devaddr, memaddr, length);
290 #else
291 ret = i2c_read(chip, devaddr, alen, memaddr, length);
292 #endif
293 if (ret)
294 return i2c_report_err(ret, I2C_ERR_READ);
295
296 return 0;
297 }
298
do_i2c_write(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])299 static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
300 char *const argv[])
301 {
302 uint chip;
303 uint devaddr, length;
304 int alen;
305 u_char *memaddr;
306 int ret;
307 #if CONFIG_IS_ENABLED(DM_I2C)
308 struct udevice *dev;
309 struct dm_i2c_chip *i2c_chip;
310 #endif
311
312 if ((argc < 5) || (argc > 6))
313 return cmd_usage(cmdtp);
314
315 /*
316 * memaddr is the address where to store things in memory
317 */
318 memaddr = (u_char *)hextoul(argv[1], NULL);
319
320 /*
321 * I2C chip address
322 */
323 chip = hextoul(argv[2], NULL);
324
325 /*
326 * I2C data address within the chip. This can be 1 or
327 * 2 bytes long. Some day it might be 3 bytes long :-).
328 */
329 devaddr = hextoul(argv[3], NULL);
330 alen = get_alen(argv[3], DEFAULT_ADDR_LEN);
331 if (alen > 3)
332 return cmd_usage(cmdtp);
333
334 /*
335 * Length is the number of bytes.
336 */
337 length = hextoul(argv[4], NULL);
338
339 #if CONFIG_IS_ENABLED(DM_I2C)
340 ret = i2c_get_cur_bus_chip(chip, &dev);
341 if (!ret && alen != -1)
342 ret = i2c_set_chip_offset_len(dev, alen);
343 if (ret)
344 return i2c_report_err(ret, I2C_ERR_WRITE);
345 i2c_chip = dev_get_parent_plat(dev);
346 if (!i2c_chip)
347 return i2c_report_err(ret, I2C_ERR_WRITE);
348 #endif
349
350 if (argc == 6 && !strcmp(argv[5], "-s")) {
351 /*
352 * Write all bytes in a single I2C transaction. If the target
353 * device is an EEPROM, it is your responsibility to not cross
354 * a page boundary. No write delay upon completion, take this
355 * into account if linking commands.
356 */
357 #if CONFIG_IS_ENABLED(DM_I2C)
358 i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS;
359 ret = dm_i2c_write(dev, devaddr, memaddr, length);
360 #else
361 ret = i2c_write(chip, devaddr, alen, memaddr, length);
362 #endif
363 if (ret)
364 return i2c_report_err(ret, I2C_ERR_WRITE);
365 } else {
366 /*
367 * Repeated addressing - perform <length> separate
368 * write transactions of one byte each
369 */
370 while (length-- > 0) {
371 #if CONFIG_IS_ENABLED(DM_I2C)
372 i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS;
373 ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
374 #else
375 ret = i2c_write(chip, devaddr++, alen, memaddr++, 1);
376 #endif
377 if (ret)
378 return i2c_report_err(ret, I2C_ERR_WRITE);
379 /*
380 * No write delay with FRAM devices.
381 */
382 #if !defined(CONFIG_SYS_I2C_FRAM)
383 udelay(11000);
384 #endif
385 }
386 }
387 return 0;
388 }
389
390 #if CONFIG_IS_ENABLED(DM_I2C)
do_i2c_flags(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])391 static int do_i2c_flags(struct cmd_tbl *cmdtp, int flag, int argc,
392 char *const argv[])
393 {
394 struct udevice *dev;
395 uint flags;
396 int chip;
397 int ret;
398
399 if (argc < 2)
400 return CMD_RET_USAGE;
401
402 chip = hextoul(argv[1], NULL);
403 ret = i2c_get_cur_bus_chip(chip, &dev);
404 if (ret)
405 return i2c_report_err(ret, I2C_ERR_READ);
406
407 if (argc > 2) {
408 flags = hextoul(argv[2], NULL);
409 ret = i2c_set_chip_flags(dev, flags);
410 } else {
411 ret = i2c_get_chip_flags(dev, &flags);
412 if (!ret)
413 printf("%x\n", flags);
414 }
415 if (ret)
416 return i2c_report_err(ret, I2C_ERR_READ);
417
418 return 0;
419 }
420
do_i2c_olen(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])421 static int do_i2c_olen(struct cmd_tbl *cmdtp, int flag, int argc,
422 char *const argv[])
423 {
424 struct udevice *dev;
425 uint olen;
426 int chip;
427 int ret;
428
429 if (argc < 2)
430 return CMD_RET_USAGE;
431
432 chip = hextoul(argv[1], NULL);
433 ret = i2c_get_cur_bus_chip(chip, &dev);
434 if (ret)
435 return i2c_report_err(ret, I2C_ERR_READ);
436
437 if (argc > 2) {
438 olen = hextoul(argv[2], NULL);
439 ret = i2c_set_chip_offset_len(dev, olen);
440 } else {
441 ret = i2c_get_chip_offset_len(dev);
442 if (ret >= 0) {
443 printf("%x\n", ret);
444 ret = 0;
445 }
446 }
447 if (ret)
448 return i2c_report_err(ret, I2C_ERR_READ);
449
450 return 0;
451 }
452 #endif
453
454 /**
455 * do_i2c_md() - Handle the "i2c md" command-line command
456 * @cmdtp: Command data struct pointer
457 * @flag: Command flag
458 * @argc: Command-line argument count
459 * @argv: Array of command-line arguments
460 *
461 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
462 * on error.
463 *
464 * Syntax:
465 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
466 */
do_i2c_md(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])467 static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
468 char *const argv[])
469 {
470 uint chip;
471 uint addr, length;
472 int alen;
473 int j, nbytes, linebytes;
474 int ret;
475 #if CONFIG_IS_ENABLED(DM_I2C)
476 struct udevice *dev;
477 #endif
478
479 /* We use the last specified parameters, unless new ones are
480 * entered.
481 */
482 chip = i2c_dp_last_chip;
483 addr = i2c_dp_last_addr;
484 alen = i2c_dp_last_alen;
485 length = i2c_dp_last_length;
486
487 if (argc < 3)
488 return CMD_RET_USAGE;
489
490 if ((flag & CMD_FLAG_REPEAT) == 0) {
491 /*
492 * New command specified.
493 */
494
495 /*
496 * I2C chip address
497 */
498 chip = hextoul(argv[1], NULL);
499
500 /*
501 * I2C data address within the chip. This can be 1 or
502 * 2 bytes long. Some day it might be 3 bytes long :-).
503 */
504 addr = hextoul(argv[2], NULL);
505 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
506 if (alen > 3)
507 return CMD_RET_USAGE;
508
509 /*
510 * If another parameter, it is the length to display.
511 * Length is the number of objects, not number of bytes.
512 */
513 if (argc > 3)
514 length = hextoul(argv[3], NULL);
515 }
516
517 #if CONFIG_IS_ENABLED(DM_I2C)
518 ret = i2c_get_cur_bus_chip(chip, &dev);
519 if (!ret && alen != -1)
520 ret = i2c_set_chip_offset_len(dev, alen);
521 if (ret)
522 return i2c_report_err(ret, I2C_ERR_READ);
523 #endif
524
525 /*
526 * Print the lines.
527 *
528 * We buffer all read data, so we can make sure data is read only
529 * once.
530 */
531 nbytes = length;
532 do {
533 unsigned char linebuf[DISP_LINE_LEN];
534 unsigned char *cp;
535
536 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
537
538 #if CONFIG_IS_ENABLED(DM_I2C)
539 ret = dm_i2c_read(dev, addr, linebuf, linebytes);
540 #else
541 ret = i2c_read(chip, addr, alen, linebuf, linebytes);
542 #endif
543 if (ret)
544 return i2c_report_err(ret, I2C_ERR_READ);
545 else {
546 printf("%04x:", addr);
547 cp = linebuf;
548 for (j=0; j<linebytes; j++) {
549 printf(" %02x", *cp++);
550 addr++;
551 }
552 puts (" ");
553 cp = linebuf;
554 for (j=0; j<linebytes; j++) {
555 if ((*cp < 0x20) || (*cp > 0x7e))
556 puts (".");
557 else
558 printf("%c", *cp);
559 cp++;
560 }
561 putc ('\n');
562 }
563 nbytes -= linebytes;
564 } while (nbytes > 0);
565
566 i2c_dp_last_chip = chip;
567 i2c_dp_last_addr = addr;
568 i2c_dp_last_alen = alen;
569 i2c_dp_last_length = length;
570
571 return 0;
572 }
573
574 /**
575 * do_i2c_mw() - Handle the "i2c mw" command-line command
576 * @cmdtp: Command data struct pointer
577 * @flag: Command flag
578 * @argc: Command-line argument count
579 * @argv: Array of command-line arguments
580 *
581 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
582 * on error.
583 *
584 * Syntax:
585 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
586 */
do_i2c_mw(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])587 static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
588 char *const argv[])
589 {
590 uint chip;
591 ulong addr;
592 int alen;
593 uchar byte;
594 int count;
595 int ret;
596 #if CONFIG_IS_ENABLED(DM_I2C)
597 struct udevice *dev;
598 #endif
599
600 if ((argc < 4) || (argc > 5))
601 return CMD_RET_USAGE;
602
603 /*
604 * Chip is always specified.
605 */
606 chip = hextoul(argv[1], NULL);
607
608 /*
609 * Address is always specified.
610 */
611 addr = hextoul(argv[2], NULL);
612 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
613 if (alen > 3)
614 return CMD_RET_USAGE;
615
616 #if CONFIG_IS_ENABLED(DM_I2C)
617 ret = i2c_get_cur_bus_chip(chip, &dev);
618 if (!ret && alen != -1)
619 ret = i2c_set_chip_offset_len(dev, alen);
620 if (ret)
621 return i2c_report_err(ret, I2C_ERR_WRITE);
622 #endif
623 /*
624 * Value to write is always specified.
625 */
626 byte = hextoul(argv[3], NULL);
627
628 /*
629 * Optional count
630 */
631 if (argc == 5)
632 count = hextoul(argv[4], NULL);
633 else
634 count = 1;
635
636 while (count-- > 0) {
637 #if CONFIG_IS_ENABLED(DM_I2C)
638 ret = dm_i2c_write(dev, addr++, &byte, 1);
639 #else
640 ret = i2c_write(chip, addr++, alen, &byte, 1);
641 #endif
642 if (ret)
643 return i2c_report_err(ret, I2C_ERR_WRITE);
644 /*
645 * Wait for the write to complete. The write can take
646 * up to 10mSec (we allow a little more time).
647 */
648 /*
649 * No write delay with FRAM devices.
650 */
651 #if !defined(CONFIG_SYS_I2C_FRAM)
652 udelay(11000);
653 #endif
654 }
655
656 return 0;
657 }
658
659 /**
660 * do_i2c_crc() - Handle the "i2c crc32" command-line command
661 * @cmdtp: Command data struct pointer
662 * @flag: Command flag
663 * @argc: Command-line argument count
664 * @argv: Array of command-line arguments
665 *
666 * Calculate a CRC on memory
667 *
668 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
669 * on error.
670 *
671 * Syntax:
672 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
673 */
do_i2c_crc(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])674 static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
675 char *const argv[])
676 {
677 uint chip;
678 ulong addr;
679 int alen;
680 int count;
681 uchar byte;
682 ulong crc;
683 ulong err;
684 int ret = 0;
685 #if CONFIG_IS_ENABLED(DM_I2C)
686 struct udevice *dev;
687 #endif
688
689 if (argc < 4)
690 return CMD_RET_USAGE;
691
692 /*
693 * Chip is always specified.
694 */
695 chip = hextoul(argv[1], NULL);
696
697 /*
698 * Address is always specified.
699 */
700 addr = hextoul(argv[2], NULL);
701 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
702 if (alen > 3)
703 return CMD_RET_USAGE;
704
705 #if CONFIG_IS_ENABLED(DM_I2C)
706 ret = i2c_get_cur_bus_chip(chip, &dev);
707 if (!ret && alen != -1)
708 ret = i2c_set_chip_offset_len(dev, alen);
709 if (ret)
710 return i2c_report_err(ret, I2C_ERR_READ);
711 #endif
712 /*
713 * Count is always specified
714 */
715 count = hextoul(argv[3], NULL);
716
717 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
718 /*
719 * CRC a byte at a time. This is going to be slooow, but hey, the
720 * memories are small and slow too so hopefully nobody notices.
721 */
722 crc = 0;
723 err = 0;
724 while (count-- > 0) {
725 #if CONFIG_IS_ENABLED(DM_I2C)
726 ret = dm_i2c_read(dev, addr, &byte, 1);
727 #else
728 ret = i2c_read(chip, addr, alen, &byte, 1);
729 #endif
730 if (ret)
731 err++;
732 crc = crc32(crc, &byte, 1);
733 addr++;
734 }
735 if (err > 0)
736 i2c_report_err(ret, I2C_ERR_READ);
737 else
738 printf ("%08lx\n", crc);
739
740 return 0;
741 }
742
743 /**
744 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command
745 * @cmdtp: Command data struct pointer
746 * @flag: Command flag
747 * @argc: Command-line argument count
748 * @argv: Array of command-line arguments
749 *
750 * Modify memory.
751 *
752 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
753 * on error.
754 *
755 * Syntax:
756 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
757 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
758 */
mod_i2c_mem(struct cmd_tbl * cmdtp,int incrflag,int flag,int argc,char * const argv[])759 static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
760 char *const argv[])
761 {
762 uint chip;
763 ulong addr;
764 int alen;
765 ulong data;
766 int size = 1;
767 int nbytes;
768 int ret;
769 #if CONFIG_IS_ENABLED(DM_I2C)
770 struct udevice *dev;
771 #endif
772
773 if (argc != 3)
774 return CMD_RET_USAGE;
775
776 bootretry_reset_cmd_timeout(); /* got a good command to get here */
777 /*
778 * We use the last specified parameters, unless new ones are
779 * entered.
780 */
781 chip = i2c_mm_last_chip;
782 addr = i2c_mm_last_addr;
783 alen = i2c_mm_last_alen;
784
785 if ((flag & CMD_FLAG_REPEAT) == 0) {
786 /*
787 * New command specified. Check for a size specification.
788 * Defaults to byte if no or incorrect specification.
789 */
790 size = cmd_get_data_size(argv[0], 1);
791
792 /*
793 * Chip is always specified.
794 */
795 chip = hextoul(argv[1], NULL);
796
797 /*
798 * Address is always specified.
799 */
800 addr = hextoul(argv[2], NULL);
801 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
802 if (alen > 3)
803 return CMD_RET_USAGE;
804 }
805
806 #if CONFIG_IS_ENABLED(DM_I2C)
807 ret = i2c_get_cur_bus_chip(chip, &dev);
808 if (!ret && alen != -1)
809 ret = i2c_set_chip_offset_len(dev, alen);
810 if (ret)
811 return i2c_report_err(ret, I2C_ERR_WRITE);
812 #endif
813
814 /*
815 * Print the address, followed by value. Then accept input for
816 * the next value. A non-converted value exits.
817 */
818 do {
819 printf("%08lx:", addr);
820 #if CONFIG_IS_ENABLED(DM_I2C)
821 ret = dm_i2c_read(dev, addr, (uchar *)&data, size);
822 #else
823 ret = i2c_read(chip, addr, alen, (uchar *)&data, size);
824 #endif
825 if (ret)
826 return i2c_report_err(ret, I2C_ERR_READ);
827
828 data = cpu_to_be32(data);
829 if (size == 1)
830 printf(" %02lx", (data >> 24) & 0x000000FF);
831 else if (size == 2)
832 printf(" %04lx", (data >> 16) & 0x0000FFFF);
833 else
834 printf(" %08lx", data);
835
836 nbytes = cli_readline(" ? ");
837 if (nbytes == 0) {
838 /*
839 * <CR> pressed as only input, don't modify current
840 * location and move to next.
841 */
842 if (incrflag)
843 addr += size;
844 nbytes = size;
845 /* good enough to not time out */
846 bootretry_reset_cmd_timeout();
847 }
848 #ifdef CONFIG_BOOT_RETRY_TIME
849 else if (nbytes == -2)
850 break; /* timed out, exit the command */
851 #endif
852 else {
853 char *endp;
854
855 data = hextoul(console_buffer, &endp);
856 if (size == 1)
857 data = data << 24;
858 else if (size == 2)
859 data = data << 16;
860 data = be32_to_cpu(data);
861 nbytes = endp - console_buffer;
862 if (nbytes) {
863 /*
864 * good enough to not time out
865 */
866 bootretry_reset_cmd_timeout();
867 #if CONFIG_IS_ENABLED(DM_I2C)
868 ret = dm_i2c_write(dev, addr, (uchar *)&data,
869 size);
870 #else
871 ret = i2c_write(chip, addr, alen,
872 (uchar *)&data, size);
873 #endif
874 if (ret)
875 return i2c_report_err(ret,
876 I2C_ERR_WRITE);
877 #if CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS > 0
878 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
879 #endif
880 if (incrflag)
881 addr += size;
882 }
883 }
884 } while (nbytes);
885
886 i2c_mm_last_chip = chip;
887 i2c_mm_last_addr = addr;
888 i2c_mm_last_alen = alen;
889
890 return 0;
891 }
892
893 /**
894 * do_i2c_probe() - Handle the "i2c probe" command-line command
895 * @cmdtp: Command data struct pointer
896 * @flag: Command flag
897 * @argc: Command-line argument count
898 * @argv: Array of command-line arguments
899 *
900 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
901 * on error.
902 *
903 * Syntax:
904 * i2c probe {addr}
905 *
906 * Returns zero (success) if one or more I2C devices was found
907 */
do_i2c_probe(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])908 static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc,
909 char *const argv[])
910 {
911 int j;
912 int addr = -1;
913 int found = 0;
914 #if defined(CONFIG_SYS_I2C_NOPROBES)
915 int k, skip;
916 unsigned int bus = GET_BUS_NUM;
917 #endif /* NOPROBES */
918 int ret;
919 #if CONFIG_IS_ENABLED(DM_I2C)
920 struct udevice *bus, *dev;
921
922 if (i2c_get_cur_bus(&bus))
923 return CMD_RET_FAILURE;
924 #endif
925
926 if (argc == 2)
927 addr = simple_strtol(argv[1], 0, 16);
928
929 puts ("Valid chip addresses:");
930 for (j = 0; j < 128; j++) {
931 if ((0 <= addr) && (j != addr))
932 continue;
933
934 #if defined(CONFIG_SYS_I2C_NOPROBES)
935 skip = 0;
936 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
937 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
938 skip = 1;
939 break;
940 }
941 }
942 if (skip)
943 continue;
944 #endif
945 #if CONFIG_IS_ENABLED(DM_I2C)
946 ret = dm_i2c_probe(bus, j, 0, &dev);
947 #else
948 ret = i2c_probe(j);
949 #endif
950 if (ret == 0) {
951 printf(" %02X", j);
952 found++;
953 }
954 }
955 putc ('\n');
956
957 #if defined(CONFIG_SYS_I2C_NOPROBES)
958 puts ("Excluded chip addresses:");
959 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
960 if (COMPARE_BUS(bus,k))
961 printf(" %02X", NO_PROBE_ADDR(k));
962 }
963 putc ('\n');
964 #endif
965
966 return (0 == found);
967 }
968
969 /**
970 * do_i2c_loop() - Handle the "i2c loop" command-line command
971 * @cmdtp: Command data struct pointer
972 * @flag: Command flag
973 * @argc: Command-line argument count
974 * @argv: Array of command-line arguments
975 *
976 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
977 * on error.
978 *
979 * Syntax:
980 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
981 * {length} - Number of bytes to read
982 * {delay} - A DECIMAL number and defaults to 1000 uSec
983 */
do_i2c_loop(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])984 static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
985 char *const argv[])
986 {
987 uint chip;
988 int alen;
989 uint addr;
990 uint length;
991 u_char bytes[16];
992 int delay;
993 int ret;
994 #if CONFIG_IS_ENABLED(DM_I2C)
995 struct udevice *dev;
996 #endif
997
998 if (argc < 3)
999 return CMD_RET_USAGE;
1000
1001 /*
1002 * Chip is always specified.
1003 */
1004 chip = hextoul(argv[1], NULL);
1005
1006 /*
1007 * Address is always specified.
1008 */
1009 addr = hextoul(argv[2], NULL);
1010 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
1011 if (alen > 3)
1012 return CMD_RET_USAGE;
1013 #if CONFIG_IS_ENABLED(DM_I2C)
1014 ret = i2c_get_cur_bus_chip(chip, &dev);
1015 if (!ret && alen != -1)
1016 ret = i2c_set_chip_offset_len(dev, alen);
1017 if (ret)
1018 return i2c_report_err(ret, I2C_ERR_WRITE);
1019 #endif
1020
1021 /*
1022 * Length is the number of objects, not number of bytes.
1023 */
1024 length = 1;
1025 length = hextoul(argv[3], NULL);
1026 if (length > sizeof(bytes))
1027 length = sizeof(bytes);
1028
1029 /*
1030 * The delay time (uSec) is optional.
1031 */
1032 delay = 1000;
1033 if (argc > 3)
1034 delay = dectoul(argv[4], NULL);
1035 /*
1036 * Run the loop...
1037 */
1038 while (1) {
1039 #if CONFIG_IS_ENABLED(DM_I2C)
1040 ret = dm_i2c_read(dev, addr, bytes, length);
1041 #else
1042 ret = i2c_read(chip, addr, alen, bytes, length);
1043 #endif
1044 if (ret)
1045 i2c_report_err(ret, I2C_ERR_READ);
1046 udelay(delay);
1047 }
1048
1049 /* NOTREACHED */
1050 return 0;
1051 }
1052
1053 /*
1054 * The SDRAM command is separately configured because many
1055 * (most?) embedded boards don't use SDRAM DIMMs.
1056 *
1057 * FIXME: Document and probably move elsewhere!
1058 */
1059 #if defined(CONFIG_CMD_SDRAM)
print_ddr2_tcyc(u_char const b)1060 static void print_ddr2_tcyc (u_char const b)
1061 {
1062 printf ("%d.", (b >> 4) & 0x0F);
1063 switch (b & 0x0F) {
1064 case 0x0:
1065 case 0x1:
1066 case 0x2:
1067 case 0x3:
1068 case 0x4:
1069 case 0x5:
1070 case 0x6:
1071 case 0x7:
1072 case 0x8:
1073 case 0x9:
1074 printf ("%d ns\n", b & 0x0F);
1075 break;
1076 case 0xA:
1077 puts ("25 ns\n");
1078 break;
1079 case 0xB:
1080 puts ("33 ns\n");
1081 break;
1082 case 0xC:
1083 puts ("66 ns\n");
1084 break;
1085 case 0xD:
1086 puts ("75 ns\n");
1087 break;
1088 default:
1089 puts ("?? ns\n");
1090 break;
1091 }
1092 }
1093
decode_bits(u_char const b,char const * str[],int const do_once)1094 static void decode_bits (u_char const b, char const *str[], int const do_once)
1095 {
1096 u_char mask;
1097
1098 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
1099 if (b & mask) {
1100 puts (*str);
1101 if (do_once)
1102 return;
1103 }
1104 }
1105 }
1106
1107 /*
1108 * Syntax:
1109 * i2c sdram {i2c_chip}
1110 */
do_sdram(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1111 static int do_sdram(struct cmd_tbl *cmdtp, int flag, int argc,
1112 char *const argv[])
1113 {
1114 enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;
1115
1116 uint chip;
1117 u_char data[128];
1118 u_char cksum;
1119 int j, ret;
1120 #if CONFIG_IS_ENABLED(DM_I2C)
1121 struct udevice *dev;
1122 #endif
1123
1124 static const char *decode_CAS_DDR2[] = {
1125 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
1126 };
1127
1128 static const char *decode_CAS_default[] = {
1129 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
1130 };
1131
1132 static const char *decode_CS_WE_default[] = {
1133 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
1134 };
1135
1136 static const char *decode_byte21_default[] = {
1137 " TBD (bit 7)\n",
1138 " Redundant row address\n",
1139 " Differential clock input\n",
1140 " Registerd DQMB inputs\n",
1141 " Buffered DQMB inputs\n",
1142 " On-card PLL\n",
1143 " Registered address/control lines\n",
1144 " Buffered address/control lines\n"
1145 };
1146
1147 static const char *decode_byte22_DDR2[] = {
1148 " TBD (bit 7)\n",
1149 " TBD (bit 6)\n",
1150 " TBD (bit 5)\n",
1151 " TBD (bit 4)\n",
1152 " TBD (bit 3)\n",
1153 " Supports partial array self refresh\n",
1154 " Supports 50 ohm ODT\n",
1155 " Supports weak driver\n"
1156 };
1157
1158 static const char *decode_row_density_DDR2[] = {
1159 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
1160 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
1161 };
1162
1163 static const char *decode_row_density_default[] = {
1164 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
1165 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
1166 };
1167
1168 if (argc < 2)
1169 return CMD_RET_USAGE;
1170
1171 /*
1172 * Chip is always specified.
1173 */
1174 chip = hextoul(argv[1], NULL);
1175
1176 #if CONFIG_IS_ENABLED(DM_I2C)
1177 ret = i2c_get_cur_bus_chip(chip, &dev);
1178 if (!ret)
1179 ret = dm_i2c_read(dev, 0, data, sizeof(data));
1180 #else
1181 ret = i2c_read(chip, 0, 1, data, sizeof(data));
1182 #endif
1183 if (ret) {
1184 puts ("No SDRAM Serial Presence Detect found.\n");
1185 return 1;
1186 }
1187
1188 cksum = 0;
1189 for (j = 0; j < 63; j++) {
1190 cksum += data[j];
1191 }
1192 if (cksum != data[63]) {
1193 printf ("WARNING: Configuration data checksum failure:\n"
1194 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
1195 }
1196 printf ("SPD data revision %d.%d\n",
1197 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
1198 printf ("Bytes used 0x%02X\n", data[0]);
1199 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
1200
1201 puts ("Memory type ");
1202 switch (data[2]) {
1203 case 2:
1204 type = EDO;
1205 puts ("EDO\n");
1206 break;
1207 case 4:
1208 type = SDRAM;
1209 puts ("SDRAM\n");
1210 break;
1211 case 7:
1212 type = DDR;
1213 puts("DDR\n");
1214 break;
1215 case 8:
1216 type = DDR2;
1217 puts ("DDR2\n");
1218 break;
1219 case 11:
1220 type = DDR3;
1221 puts("DDR3\n");
1222 break;
1223 case 12:
1224 type = DDR4;
1225 puts("DDR4\n");
1226 break;
1227 default:
1228 type = unknown;
1229 puts ("unknown\n");
1230 break;
1231 }
1232
1233 puts ("Row address bits ");
1234 if ((data[3] & 0x00F0) == 0)
1235 printf ("%d\n", data[3] & 0x0F);
1236 else
1237 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
1238
1239 puts ("Column address bits ");
1240 if ((data[4] & 0x00F0) == 0)
1241 printf ("%d\n", data[4] & 0x0F);
1242 else
1243 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
1244
1245 switch (type) {
1246 case DDR2:
1247 printf ("Number of ranks %d\n",
1248 (data[5] & 0x07) + 1);
1249 break;
1250 default:
1251 printf ("Module rows %d\n", data[5]);
1252 break;
1253 }
1254
1255 switch (type) {
1256 case DDR2:
1257 printf ("Module data width %d bits\n", data[6]);
1258 break;
1259 default:
1260 printf ("Module data width %d bits\n",
1261 (data[7] << 8) | data[6]);
1262 break;
1263 }
1264
1265 puts ("Interface signal levels ");
1266 switch(data[8]) {
1267 case 0: puts ("TTL 5.0 V\n"); break;
1268 case 1: puts ("LVTTL\n"); break;
1269 case 2: puts ("HSTL 1.5 V\n"); break;
1270 case 3: puts ("SSTL 3.3 V\n"); break;
1271 case 4: puts ("SSTL 2.5 V\n"); break;
1272 case 5: puts ("SSTL 1.8 V\n"); break;
1273 default: puts ("unknown\n"); break;
1274 }
1275
1276 switch (type) {
1277 case DDR2:
1278 printf ("SDRAM cycle time ");
1279 print_ddr2_tcyc (data[9]);
1280 break;
1281 default:
1282 printf ("SDRAM cycle time %d.%d ns\n",
1283 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
1284 break;
1285 }
1286
1287 switch (type) {
1288 case DDR2:
1289 printf ("SDRAM access time 0.%d%d ns\n",
1290 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
1291 break;
1292 default:
1293 printf ("SDRAM access time %d.%d ns\n",
1294 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
1295 break;
1296 }
1297
1298 puts ("EDC configuration ");
1299 switch (data[11]) {
1300 case 0: puts ("None\n"); break;
1301 case 1: puts ("Parity\n"); break;
1302 case 2: puts ("ECC\n"); break;
1303 default: puts ("unknown\n"); break;
1304 }
1305
1306 if ((data[12] & 0x80) == 0)
1307 puts ("No self refresh, rate ");
1308 else
1309 puts ("Self refresh, rate ");
1310
1311 switch(data[12] & 0x7F) {
1312 case 0: puts ("15.625 us\n"); break;
1313 case 1: puts ("3.9 us\n"); break;
1314 case 2: puts ("7.8 us\n"); break;
1315 case 3: puts ("31.3 us\n"); break;
1316 case 4: puts ("62.5 us\n"); break;
1317 case 5: puts ("125 us\n"); break;
1318 default: puts ("unknown\n"); break;
1319 }
1320
1321 switch (type) {
1322 case DDR2:
1323 printf ("SDRAM width (primary) %d\n", data[13]);
1324 break;
1325 default:
1326 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
1327 if ((data[13] & 0x80) != 0) {
1328 printf (" (second bank) %d\n",
1329 2 * (data[13] & 0x7F));
1330 }
1331 break;
1332 }
1333
1334 switch (type) {
1335 case DDR2:
1336 if (data[14] != 0)
1337 printf ("EDC width %d\n", data[14]);
1338 break;
1339 default:
1340 if (data[14] != 0) {
1341 printf ("EDC width %d\n",
1342 data[14] & 0x7F);
1343
1344 if ((data[14] & 0x80) != 0) {
1345 printf (" (second bank) %d\n",
1346 2 * (data[14] & 0x7F));
1347 }
1348 }
1349 break;
1350 }
1351
1352 if (DDR2 != type) {
1353 printf ("Min clock delay, back-to-back random column addresses "
1354 "%d\n", data[15]);
1355 }
1356
1357 puts ("Burst length(s) ");
1358 if (data[16] & 0x80) puts (" Page");
1359 if (data[16] & 0x08) puts (" 8");
1360 if (data[16] & 0x04) puts (" 4");
1361 if (data[16] & 0x02) puts (" 2");
1362 if (data[16] & 0x01) puts (" 1");
1363 putc ('\n');
1364 printf ("Number of banks %d\n", data[17]);
1365
1366 switch (type) {
1367 case DDR2:
1368 puts ("CAS latency(s) ");
1369 decode_bits (data[18], decode_CAS_DDR2, 0);
1370 putc ('\n');
1371 break;
1372 default:
1373 puts ("CAS latency(s) ");
1374 decode_bits (data[18], decode_CAS_default, 0);
1375 putc ('\n');
1376 break;
1377 }
1378
1379 if (DDR2 != type) {
1380 puts ("CS latency(s) ");
1381 decode_bits (data[19], decode_CS_WE_default, 0);
1382 putc ('\n');
1383 }
1384
1385 if (DDR2 != type) {
1386 puts ("WE latency(s) ");
1387 decode_bits (data[20], decode_CS_WE_default, 0);
1388 putc ('\n');
1389 }
1390
1391 switch (type) {
1392 case DDR2:
1393 puts ("Module attributes:\n");
1394 if (data[21] & 0x80)
1395 puts (" TBD (bit 7)\n");
1396 if (data[21] & 0x40)
1397 puts (" Analysis probe installed\n");
1398 if (data[21] & 0x20)
1399 puts (" TBD (bit 5)\n");
1400 if (data[21] & 0x10)
1401 puts (" FET switch external enable\n");
1402 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
1403 if (data[20] & 0x11) {
1404 printf (" %d active registers on DIMM\n",
1405 (data[21] & 0x03) + 1);
1406 }
1407 break;
1408 default:
1409 puts ("Module attributes:\n");
1410 if (!data[21])
1411 puts (" (none)\n");
1412 else
1413 decode_bits (data[21], decode_byte21_default, 0);
1414 break;
1415 }
1416
1417 switch (type) {
1418 case DDR2:
1419 decode_bits (data[22], decode_byte22_DDR2, 0);
1420 break;
1421 default:
1422 puts ("Device attributes:\n");
1423 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1424 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1425 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1426 else puts (" Upper Vcc tolerance 10%\n");
1427 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1428 else puts (" Lower Vcc tolerance 10%\n");
1429 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1430 if (data[22] & 0x04) puts (" Supports precharge all\n");
1431 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1432 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1433 break;
1434 }
1435
1436 switch (type) {
1437 case DDR2:
1438 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1439 print_ddr2_tcyc (data[23]);
1440 break;
1441 default:
1442 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1443 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
1444 break;
1445 }
1446
1447 switch (type) {
1448 case DDR2:
1449 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1450 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1451 break;
1452 default:
1453 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1454 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1455 break;
1456 }
1457
1458 switch (type) {
1459 case DDR2:
1460 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1461 print_ddr2_tcyc (data[25]);
1462 break;
1463 default:
1464 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1465 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
1466 break;
1467 }
1468
1469 switch (type) {
1470 case DDR2:
1471 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1472 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1473 break;
1474 default:
1475 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1476 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1477 break;
1478 }
1479
1480 switch (type) {
1481 case DDR2:
1482 printf ("Minimum row precharge %d.%02d ns\n",
1483 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
1484 break;
1485 default:
1486 printf ("Minimum row precharge %d ns\n", data[27]);
1487 break;
1488 }
1489
1490 switch (type) {
1491 case DDR2:
1492 printf ("Row active to row active min %d.%02d ns\n",
1493 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
1494 break;
1495 default:
1496 printf ("Row active to row active min %d ns\n", data[28]);
1497 break;
1498 }
1499
1500 switch (type) {
1501 case DDR2:
1502 printf ("RAS to CAS delay min %d.%02d ns\n",
1503 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
1504 break;
1505 default:
1506 printf ("RAS to CAS delay min %d ns\n", data[29]);
1507 break;
1508 }
1509
1510 printf ("Minimum RAS pulse width %d ns\n", data[30]);
1511
1512 switch (type) {
1513 case DDR2:
1514 puts ("Density of each row ");
1515 decode_bits (data[31], decode_row_density_DDR2, 1);
1516 putc ('\n');
1517 break;
1518 default:
1519 puts ("Density of each row ");
1520 decode_bits (data[31], decode_row_density_default, 1);
1521 putc ('\n');
1522 break;
1523 }
1524
1525 switch (type) {
1526 case DDR2:
1527 puts ("Command and Address setup ");
1528 if (data[32] >= 0xA0) {
1529 printf ("1.%d%d ns\n",
1530 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
1531 } else {
1532 printf ("0.%d%d ns\n",
1533 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
1534 }
1535 break;
1536 default:
1537 printf ("Command and Address setup %c%d.%d ns\n",
1538 (data[32] & 0x80) ? '-' : '+',
1539 (data[32] >> 4) & 0x07, data[32] & 0x0F);
1540 break;
1541 }
1542
1543 switch (type) {
1544 case DDR2:
1545 puts ("Command and Address hold ");
1546 if (data[33] >= 0xA0) {
1547 printf ("1.%d%d ns\n",
1548 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
1549 } else {
1550 printf ("0.%d%d ns\n",
1551 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
1552 }
1553 break;
1554 default:
1555 printf ("Command and Address hold %c%d.%d ns\n",
1556 (data[33] & 0x80) ? '-' : '+',
1557 (data[33] >> 4) & 0x07, data[33] & 0x0F);
1558 break;
1559 }
1560
1561 switch (type) {
1562 case DDR2:
1563 printf ("Data signal input setup 0.%d%d ns\n",
1564 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
1565 break;
1566 default:
1567 printf ("Data signal input setup %c%d.%d ns\n",
1568 (data[34] & 0x80) ? '-' : '+',
1569 (data[34] >> 4) & 0x07, data[34] & 0x0F);
1570 break;
1571 }
1572
1573 switch (type) {
1574 case DDR2:
1575 printf ("Data signal input hold 0.%d%d ns\n",
1576 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
1577 break;
1578 default:
1579 printf ("Data signal input hold %c%d.%d ns\n",
1580 (data[35] & 0x80) ? '-' : '+',
1581 (data[35] >> 4) & 0x07, data[35] & 0x0F);
1582 break;
1583 }
1584
1585 puts ("Manufacturer's JEDEC ID ");
1586 for (j = 64; j <= 71; j++)
1587 printf ("%02X ", data[j]);
1588 putc ('\n');
1589 printf ("Manufacturing Location %02X\n", data[72]);
1590 puts ("Manufacturer's Part Number ");
1591 for (j = 73; j <= 90; j++)
1592 printf ("%02X ", data[j]);
1593 putc ('\n');
1594 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1595 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
1596 puts ("Assembly Serial Number ");
1597 for (j = 95; j <= 98; j++)
1598 printf ("%02X ", data[j]);
1599 putc ('\n');
1600
1601 if (DDR2 != type) {
1602 printf ("Speed rating PC%d\n",
1603 data[126] == 0x66 ? 66 : data[126]);
1604 }
1605 return 0;
1606 }
1607 #endif
1608
1609 /*
1610 * Syntax:
1611 * i2c edid {i2c_chip}
1612 */
1613 #if defined(CONFIG_I2C_EDID)
do_edid(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1614 int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
1615 {
1616 uint chip;
1617 struct edid1_info edid;
1618 int ret;
1619 #if CONFIG_IS_ENABLED(DM_I2C)
1620 struct udevice *dev;
1621 #endif
1622
1623 if (argc < 2) {
1624 cmd_usage(cmdtp);
1625 return 1;
1626 }
1627
1628 chip = hextoul(argv[1], NULL);
1629 #if CONFIG_IS_ENABLED(DM_I2C)
1630 ret = i2c_get_cur_bus_chip(chip, &dev);
1631 if (!ret)
1632 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid));
1633 #else
1634 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid));
1635 #endif
1636 if (ret)
1637 return i2c_report_err(ret, I2C_ERR_READ);
1638
1639 if (edid_check_info(&edid)) {
1640 puts("Content isn't valid EDID.\n");
1641 return 1;
1642 }
1643
1644 edid_print_info(&edid);
1645 return 0;
1646
1647 }
1648 #endif /* CONFIG_I2C_EDID */
1649
1650 #if CONFIG_IS_ENABLED(DM_I2C)
show_bus(struct udevice * bus)1651 static void show_bus(struct udevice *bus)
1652 {
1653 struct udevice *dev;
1654
1655 printf("Bus %d:\t%s", dev_seq(bus), bus->name);
1656 if (device_active(bus))
1657 printf(" (active %d)", dev_seq(bus));
1658 printf("\n");
1659 for (device_find_first_child(bus, &dev);
1660 dev;
1661 device_find_next_child(&dev)) {
1662 struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
1663
1664 printf(" %02x: %s, offset len %x, flags %x\n",
1665 chip->chip_addr, dev->name, chip->offset_len,
1666 chip->flags);
1667 }
1668 }
1669 #endif
1670
1671 /**
1672 * do_i2c_show_bus() - Handle the "i2c bus" command-line command
1673 * @cmdtp: Command data struct pointer
1674 * @flag: Command flag
1675 * @argc: Command-line argument count
1676 * @argv: Array of command-line arguments
1677 *
1678 * Returns zero always.
1679 */
1680 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
do_i2c_show_bus(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1681 static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
1682 char *const argv[])
1683 {
1684 if (argc == 1) {
1685 /* show all busses */
1686 #if CONFIG_IS_ENABLED(DM_I2C)
1687 struct udevice *bus;
1688 struct uclass *uc;
1689 int ret;
1690
1691 ret = uclass_get(UCLASS_I2C, &uc);
1692 if (ret)
1693 return CMD_RET_FAILURE;
1694 uclass_foreach_dev(bus, uc)
1695 show_bus(bus);
1696 #else
1697 int i;
1698
1699 for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) {
1700 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1701 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
1702 int j;
1703
1704 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1705 if (i2c_bus[i].next_hop[j].chip == 0)
1706 break;
1707 printf("->%s@0x%2x:%d",
1708 i2c_bus[i].next_hop[j].mux.name,
1709 i2c_bus[i].next_hop[j].chip,
1710 i2c_bus[i].next_hop[j].channel);
1711 }
1712 #endif
1713 printf("\n");
1714 }
1715 #endif
1716 } else {
1717 int i;
1718
1719 /* show specific bus */
1720 i = dectoul(argv[1], NULL);
1721 #if CONFIG_IS_ENABLED(DM_I2C)
1722 struct udevice *bus;
1723 int ret;
1724
1725 ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus);
1726 if (ret) {
1727 printf("Invalid bus %d: err=%d\n", i, ret);
1728 return CMD_RET_FAILURE;
1729 }
1730 show_bus(bus);
1731 #else
1732 if (i >= CONFIG_SYS_NUM_I2C_BUSES) {
1733 printf("Invalid bus %d\n", i);
1734 return -1;
1735 }
1736 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1737 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
1738 int j;
1739 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1740 if (i2c_bus[i].next_hop[j].chip == 0)
1741 break;
1742 printf("->%s@0x%2x:%d",
1743 i2c_bus[i].next_hop[j].mux.name,
1744 i2c_bus[i].next_hop[j].chip,
1745 i2c_bus[i].next_hop[j].channel);
1746 }
1747 #endif
1748 printf("\n");
1749 #endif
1750 }
1751
1752 return 0;
1753 }
1754 #endif
1755
1756 /**
1757 * do_i2c_bus_num() - Handle the "i2c dev" command-line command
1758 * @cmdtp: Command data struct pointer
1759 * @flag: Command flag
1760 * @argc: Command-line argument count
1761 * @argv: Array of command-line arguments
1762 *
1763 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1764 * on error.
1765 */
1766 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
1767 CONFIG_IS_ENABLED(DM_I2C)
do_i2c_bus_num(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1768 static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
1769 char *const argv[])
1770 {
1771 int ret = 0;
1772 int bus_no;
1773
1774 if (argc == 1) {
1775 /* querying current setting */
1776 #if CONFIG_IS_ENABLED(DM_I2C)
1777 struct udevice *bus;
1778
1779 if (!i2c_get_cur_bus(&bus))
1780 bus_no = dev_seq(bus);
1781 else
1782 bus_no = -1;
1783 #else
1784 bus_no = i2c_get_bus_num();
1785 #endif
1786 printf("Current bus is %d\n", bus_no);
1787 } else {
1788 bus_no = dectoul(argv[1], NULL);
1789 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
1790 if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
1791 printf("Invalid bus %d\n", bus_no);
1792 return -1;
1793 }
1794 #endif
1795 printf("Setting bus to %d\n", bus_no);
1796 #if CONFIG_IS_ENABLED(DM_I2C)
1797 ret = cmd_i2c_set_bus_num(bus_no);
1798 #else
1799 ret = i2c_set_bus_num(bus_no);
1800 #endif
1801 if (ret)
1802 printf("Failure changing bus number (%d)\n", ret);
1803 }
1804
1805 return ret ? CMD_RET_FAILURE : 0;
1806 }
1807 #endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
1808
1809 /**
1810 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
1811 * @cmdtp: Command data struct pointer
1812 * @flag: Command flag
1813 * @argc: Command-line argument count
1814 * @argv: Array of command-line arguments
1815 *
1816 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1817 * on error.
1818 */
do_i2c_bus_speed(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1819 static int do_i2c_bus_speed(struct cmd_tbl *cmdtp, int flag, int argc,
1820 char *const argv[])
1821 {
1822 int speed, ret=0;
1823
1824 #if CONFIG_IS_ENABLED(DM_I2C)
1825 struct udevice *bus;
1826
1827 if (i2c_get_cur_bus(&bus))
1828 return 1;
1829 #endif
1830 if (argc == 1) {
1831 #if CONFIG_IS_ENABLED(DM_I2C)
1832 speed = dm_i2c_get_bus_speed(bus);
1833 #else
1834 speed = i2c_get_bus_speed();
1835 #endif
1836 /* querying current speed */
1837 printf("Current bus speed=%d\n", speed);
1838 } else {
1839 speed = dectoul(argv[1], NULL);
1840 printf("Setting bus speed to %d Hz\n", speed);
1841 #if CONFIG_IS_ENABLED(DM_I2C)
1842 ret = dm_i2c_set_bus_speed(bus, speed);
1843 #else
1844 ret = i2c_set_bus_speed(speed);
1845 #endif
1846 if (ret)
1847 printf("Failure changing bus speed (%d)\n", ret);
1848 }
1849
1850 return ret ? CMD_RET_FAILURE : 0;
1851 }
1852
1853 /**
1854 * do_i2c_mm() - Handle the "i2c mm" command-line command
1855 * @cmdtp: Command data struct pointer
1856 * @flag: Command flag
1857 * @argc: Command-line argument count
1858 * @argv: Array of command-line arguments
1859 *
1860 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1861 * on error.
1862 */
do_i2c_mm(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1863 static int do_i2c_mm(struct cmd_tbl *cmdtp, int flag, int argc,
1864 char *const argv[])
1865 {
1866 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1867 }
1868
1869 /**
1870 * do_i2c_nm() - Handle the "i2c nm" command-line command
1871 * @cmdtp: Command data struct pointer
1872 * @flag: Command flag
1873 * @argc: Command-line argument count
1874 * @argv: Array of command-line arguments
1875 *
1876 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1877 * on error.
1878 */
do_i2c_nm(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1879 static int do_i2c_nm(struct cmd_tbl *cmdtp, int flag, int argc,
1880 char *const argv[])
1881 {
1882 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1883 }
1884
1885 /**
1886 * do_i2c_reset() - Handle the "i2c reset" command-line command
1887 * @cmdtp: Command data struct pointer
1888 * @flag: Command flag
1889 * @argc: Command-line argument count
1890 * @argv: Array of command-line arguments
1891 *
1892 * Returns zero always.
1893 */
do_i2c_reset(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1894 static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
1895 char *const argv[])
1896 {
1897 #if CONFIG_IS_ENABLED(DM_I2C)
1898 struct udevice *bus;
1899
1900 if (i2c_get_cur_bus(&bus))
1901 return CMD_RET_FAILURE;
1902 if (i2c_deblock(bus)) {
1903 printf("Error: Not supported by the driver\n");
1904 return CMD_RET_FAILURE;
1905 }
1906 #elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
1907 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
1908 #endif
1909 return 0;
1910 }
1911
1912 static struct cmd_tbl cmd_i2c_sub[] = {
1913 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
1914 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
1915 #endif
1916 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
1917 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \
1918 defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
1919 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
1920 #endif /* CONFIG_I2C_MULTI_BUS */
1921 #if defined(CONFIG_I2C_EDID)
1922 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
1923 #endif /* CONFIG_I2C_EDID */
1924 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
1925 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
1926 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
1927 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
1928 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
1929 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
1930 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
1931 U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""),
1932 #if CONFIG_IS_ENABLED(DM_I2C)
1933 U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""),
1934 U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""),
1935 #endif
1936 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
1937 #if defined(CONFIG_CMD_SDRAM)
1938 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
1939 #endif
1940 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
1941 };
1942
i2c_reloc(void)1943 static __maybe_unused void i2c_reloc(void)
1944 {
1945 static int relocated;
1946
1947 if (!relocated) {
1948 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
1949 relocated = 1;
1950 };
1951 }
1952
1953 /**
1954 * do_i2c() - Handle the "i2c" command-line command
1955 * @cmdtp: Command data struct pointer
1956 * @flag: Command flag
1957 * @argc: Command-line argument count
1958 * @argv: Array of command-line arguments
1959 *
1960 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1961 * on error.
1962 */
do_i2c(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1963 static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
1964 {
1965 struct cmd_tbl *c;
1966
1967 #ifdef CONFIG_NEEDS_MANUAL_RELOC
1968 i2c_reloc();
1969 #endif
1970
1971 if (argc < 2)
1972 return CMD_RET_USAGE;
1973
1974 /* Strip off leading 'i2c' command argument */
1975 argc--;
1976 argv++;
1977
1978 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
1979
1980 if (c)
1981 return c->cmd(cmdtp, flag, argc, argv);
1982 else
1983 return CMD_RET_USAGE;
1984 }
1985
1986 /***************************************************/
1987 #ifdef CONFIG_SYS_LONGHELP
1988 static char i2c_help_text[] =
1989 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
1990 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
1991 "i2c " /* That's the prefix for the crc32 command below. */
1992 #endif
1993 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1994 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \
1995 defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
1996 "i2c dev [dev] - show or set current I2C bus\n"
1997 #endif /* CONFIG_I2C_MULTI_BUS */
1998 #if defined(CONFIG_I2C_EDID)
1999 "i2c edid chip - print EDID configuration information\n"
2000 #endif /* CONFIG_I2C_EDID */
2001 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
2002 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
2003 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
2004 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
2005 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
2006 "i2c probe [address] - test for and show device(s) on the I2C bus\n"
2007 "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n"
2008 "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n"
2009 " to I2C; the -s option selects bulk write in a single transaction\n"
2010 #if CONFIG_IS_ENABLED(DM_I2C)
2011 "i2c flags chip [flags] - set or get chip flags\n"
2012 "i2c olen chip [offset_length] - set or get chip offset length\n"
2013 #endif
2014 "i2c reset - re-init the I2C Controller\n"
2015 #if defined(CONFIG_CMD_SDRAM)
2016 "i2c sdram chip - print SDRAM configuration information\n"
2017 #endif
2018 "i2c speed [speed] - show or set I2C bus speed";
2019 #endif
2020
2021 U_BOOT_CMD(
2022 i2c, 7, 1, do_i2c,
2023 "I2C sub-system",
2024 i2c_help_text
2025 );
2026