1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
4  *
5  * Author: Claudiu Beznea <claudiu.beznea@microchip.com>
6  */
7 
8 #include <common.h>
9 #include <cpu.h>
10 #include <dm.h>
11 #include <div64.h>
12 #include <linux/clk-provider.h>
13 
14 struct at91_cpu_plat {
15 	const char *name;
16 	ulong cpufreq_mhz;
17 	ulong mckfreq_mhz;
18 	ulong xtalfreq_mhz;
19 };
20 
21 extern char *get_cpu_name(void);
22 
at91_cpu_get_name(void)23 const char *at91_cpu_get_name(void)
24 {
25 	return get_cpu_name();
26 }
27 
at91_cpu_get_desc(const struct udevice * dev,char * buf,int size)28 int at91_cpu_get_desc(const struct udevice *dev, char *buf, int size)
29 {
30 	struct at91_cpu_plat *plat = dev_get_plat(dev);
31 
32 	snprintf(buf, size, "%s\n"
33 		 "Crystal frequency: %8lu MHz\n"
34 		 "CPU clock        : %8lu MHz\n"
35 		 "Master clock     : %8lu MHz\n",
36 		 plat->name, plat->xtalfreq_mhz, plat->cpufreq_mhz,
37 		 plat->mckfreq_mhz);
38 
39 	return 0;
40 }
41 
at91_cpu_get_info(const struct udevice * dev,struct cpu_info * info)42 static int at91_cpu_get_info(const struct udevice *dev, struct cpu_info *info)
43 {
44 	struct at91_cpu_plat *plat = dev_get_plat(dev);
45 
46 	info->cpu_freq = plat->cpufreq_mhz * 1000000;
47 	info->features = BIT(CPU_FEAT_L1_CACHE);
48 
49 	return 0;
50 }
51 
at91_cpu_get_count(const struct udevice * dev)52 static int at91_cpu_get_count(const struct udevice *dev)
53 {
54 	return 1;
55 }
56 
at91_cpu_get_vendor(const struct udevice * dev,char * buf,int size)57 static int at91_cpu_get_vendor(const struct udevice *dev,  char *buf, int size)
58 {
59 	snprintf(buf, size, "Microchip Technology Inc.");
60 
61 	return 0;
62 }
63 
64 static const struct cpu_ops at91_cpu_ops = {
65 	.get_desc	= at91_cpu_get_desc,
66 	.get_info	= at91_cpu_get_info,
67 	.get_count	= at91_cpu_get_count,
68 	.get_vendor	= at91_cpu_get_vendor,
69 };
70 
71 static const struct udevice_id at91_cpu_ids[] = {
72 	{ .compatible = "arm,cortex-a7" },
73 	{ .compatible = "arm,arm926ej-s" },
74 	{ /* Sentinel. */ }
75 };
76 
at91_cpu_probe(struct udevice * dev)77 static int at91_cpu_probe(struct udevice *dev)
78 {
79 	struct at91_cpu_plat *plat = dev_get_plat(dev);
80 	struct clk clk;
81 	ulong rate;
82 	int ret;
83 
84 	ret = clk_get_by_index(dev, 0, &clk);
85 	if (ret)
86 		return ret;
87 
88 	rate  = clk_get_rate(&clk);
89 	if (!rate)
90 		return -ENOTSUPP;
91 	plat->cpufreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000);
92 
93 	ret = clk_get_by_index(dev, 1, &clk);
94 	if (ret)
95 		return ret;
96 
97 	rate = clk_get_rate(&clk);
98 	if (!rate)
99 		return -ENOTSUPP;
100 	plat->mckfreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000);
101 
102 	ret = clk_get_by_index(dev, 2, &clk);
103 	if (ret)
104 		return ret;
105 
106 	rate = clk_get_rate(&clk);
107 	if (!rate)
108 		return -ENOTSUPP;
109 	plat->xtalfreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000);
110 
111 	plat->name = get_cpu_name();
112 
113 	return 0;
114 }
115 
116 U_BOOT_DRIVER(cpu_at91_drv) = {
117 	.name		= "at91-cpu",
118 	.id		= UCLASS_CPU,
119 	.of_match	= at91_cpu_ids,
120 	.ops		= &at91_cpu_ops,
121 	.probe		= at91_cpu_probe,
122 	.plat_auto	= sizeof(struct at91_cpu_plat),
123 	.flags		= DM_FLAG_PRE_RELOC,
124 };
125