1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2015 Marek Vasut <marex@denx.de>
4 *
5 * DesignWare APB GPIO driver
6 */
7
8 #include <common.h>
9 #include <log.h>
10 #include <malloc.h>
11 #include <asm/arch/gpio.h>
12 #include <asm/gpio.h>
13 #include <asm/io.h>
14 #include <dm.h>
15 #include <dm/device-internal.h>
16 #include <dm/device_compat.h>
17 #include <dm/devres.h>
18 #include <dm/lists.h>
19 #include <dm/root.h>
20 #include <errno.h>
21 #include <reset.h>
22 #include <linux/bitops.h>
23
24 #define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc)
25 #define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc)
26 #define GPIO_INTEN 0x30
27 #define GPIO_INTMASK 0x34
28 #define GPIO_INTTYPE_LEVEL 0x38
29 #define GPIO_INT_POLARITY 0x3c
30 #define GPIO_INTSTATUS 0x40
31 #define GPIO_PORTA_DEBOUNCE 0x48
32 #define GPIO_PORTA_EOI 0x4c
33 #define GPIO_EXT_PORT(p) (0x50 + (p) * 4)
34
35 struct gpio_dwapb_priv {
36 struct reset_ctl_bulk resets;
37 };
38
39 struct gpio_dwapb_plat {
40 const char *name;
41 int bank;
42 int pins;
43 void __iomem *base;
44 };
45
dwapb_gpio_direction_input(struct udevice * dev,unsigned pin)46 static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
47 {
48 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
49
50 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
51 return 0;
52 }
53
dwapb_gpio_direction_output(struct udevice * dev,unsigned pin,int val)54 static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
55 int val)
56 {
57 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
58
59 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
60
61 if (val)
62 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
63 else
64 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
65
66 return 0;
67 }
68
dwapb_gpio_set_value(struct udevice * dev,unsigned pin,int val)69 static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
70 {
71 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
72
73 if (val)
74 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
75 else
76 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
77
78 return 0;
79 }
80
dwapb_gpio_get_function(struct udevice * dev,unsigned offset)81 static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset)
82 {
83 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
84 u32 gpio;
85
86 gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank));
87
88 if (gpio & BIT(offset))
89 return GPIOF_OUTPUT;
90 else
91 return GPIOF_INPUT;
92 }
93
dwapb_gpio_get_value(struct udevice * dev,unsigned pin)94 static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
95 {
96 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
97 u32 value;
98
99 if (dwapb_gpio_get_function(dev, pin) == GPIOF_OUTPUT)
100 value = readl(plat->base + GPIO_SWPORT_DR(plat->bank));
101 else
102 value = readl(plat->base + GPIO_EXT_PORT(plat->bank));
103 return !!(value & BIT(pin));
104 }
105
106 static const struct dm_gpio_ops gpio_dwapb_ops = {
107 .direction_input = dwapb_gpio_direction_input,
108 .direction_output = dwapb_gpio_direction_output,
109 .get_value = dwapb_gpio_get_value,
110 .set_value = dwapb_gpio_set_value,
111 .get_function = dwapb_gpio_get_function,
112 };
113
gpio_dwapb_reset(struct udevice * dev)114 static int gpio_dwapb_reset(struct udevice *dev)
115 {
116 int ret;
117 struct gpio_dwapb_priv *priv = dev_get_priv(dev);
118
119 ret = reset_get_bulk(dev, &priv->resets);
120 if (ret) {
121 /* Return 0 if error due to !CONFIG_DM_RESET and reset
122 * DT property is not present.
123 */
124 if (ret == -ENOENT || ret == -ENOTSUPP)
125 return 0;
126
127 dev_warn(dev, "Can't get reset: %d\n", ret);
128 return ret;
129 }
130
131 ret = reset_deassert_bulk(&priv->resets);
132 if (ret) {
133 reset_release_bulk(&priv->resets);
134 dev_err(dev, "Failed to reset: %d\n", ret);
135 return ret;
136 }
137
138 return 0;
139 }
140
gpio_dwapb_probe(struct udevice * dev)141 static int gpio_dwapb_probe(struct udevice *dev)
142 {
143 struct gpio_dev_priv *priv = dev_get_uclass_priv(dev);
144 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
145
146 if (!plat) {
147 /* Reset on parent device only */
148 return gpio_dwapb_reset(dev);
149 }
150
151 priv->gpio_count = plat->pins;
152 priv->bank_name = plat->name;
153
154 return 0;
155 }
156
gpio_dwapb_bind(struct udevice * dev)157 static int gpio_dwapb_bind(struct udevice *dev)
158 {
159 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
160 struct udevice *subdev;
161 fdt_addr_t base;
162 int ret, bank = 0;
163 ofnode node;
164
165 /* If this is a child device, there is nothing to do here */
166 if (plat)
167 return 0;
168
169 base = dev_read_addr(dev);
170 if (base == FDT_ADDR_T_NONE) {
171 debug("Can't get the GPIO register base address\n");
172 return -ENXIO;
173 }
174
175 for (node = dev_read_first_subnode(dev); ofnode_valid(node);
176 node = dev_read_next_subnode(node)) {
177 if (!ofnode_read_bool(node, "gpio-controller"))
178 continue;
179
180 plat = devm_kcalloc(dev, 1, sizeof(*plat), GFP_KERNEL);
181 if (!plat)
182 return -ENOMEM;
183
184 plat->base = (void *)base;
185 plat->bank = bank;
186 plat->pins = ofnode_read_u32_default(node, "snps,nr-gpios", 0);
187
188 if (ofnode_read_string_index(node, "bank-name", 0,
189 &plat->name)) {
190 /*
191 * Fall back to node name. This means accessing pins
192 * via bank name won't work.
193 */
194 char name[32];
195
196 snprintf(name, sizeof(name), "%s_",
197 ofnode_get_name(node));
198 plat->name = strdup(name);
199 if (!plat->name) {
200 kfree(plat);
201 return -ENOMEM;
202 }
203 }
204
205 ret = device_bind(dev, dev->driver, plat->name, plat, node,
206 &subdev);
207 if (ret)
208 return ret;
209
210 bank++;
211 }
212
213 return 0;
214 }
215
gpio_dwapb_remove(struct udevice * dev)216 static int gpio_dwapb_remove(struct udevice *dev)
217 {
218 struct gpio_dwapb_plat *plat = dev_get_plat(dev);
219 struct gpio_dwapb_priv *priv = dev_get_priv(dev);
220
221 if (!plat && priv)
222 return reset_release_bulk(&priv->resets);
223
224 return 0;
225 }
226
227 static const struct udevice_id gpio_dwapb_ids[] = {
228 { .compatible = "snps,dw-apb-gpio" },
229 { }
230 };
231
232 U_BOOT_DRIVER(gpio_dwapb) = {
233 .name = "gpio-dwapb",
234 .id = UCLASS_GPIO,
235 .of_match = gpio_dwapb_ids,
236 .ops = &gpio_dwapb_ops,
237 .bind = gpio_dwapb_bind,
238 .probe = gpio_dwapb_probe,
239 .remove = gpio_dwapb_remove,
240 .priv_auto = sizeof(struct gpio_dwapb_priv),
241 };
242