1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2015, Google, Inc
4  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <log.h>
11 #include <malloc.h>
12 #include <mapmem.h>
13 #include <mmc.h>
14 #include <sdhci.h>
15 #include <acpi/acpigen.h>
16 #include <acpi/acpi_device.h>
17 #include <acpi/acpi_dp.h>
18 #include <asm-generic/gpio.h>
19 #include <dm/acpi.h>
20 
21 /* Type of MMC device */
22 enum {
23 	TYPE_SD,
24 	TYPE_EMMC,
25 };
26 
27 struct pci_mmc_plat {
28 	struct mmc_config cfg;
29 	struct mmc mmc;
30 };
31 
32 struct pci_mmc_priv {
33 	struct sdhci_host host;
34 	void *base;
35 	struct gpio_desc cd_gpio;
36 };
37 
pci_mmc_probe(struct udevice * dev)38 static int pci_mmc_probe(struct udevice *dev)
39 {
40 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
41 	struct pci_mmc_plat *plat = dev_get_plat(dev);
42 	struct pci_mmc_priv *priv = dev_get_priv(dev);
43 	struct sdhci_host *host = &priv->host;
44 	struct blk_desc *desc;
45 	int ret;
46 
47 	ret = mmc_of_parse(dev, &plat->cfg);
48 	if (ret)
49 		return ret;
50 	desc = mmc_get_blk_desc(&plat->mmc);
51 	desc->removable = !(plat->cfg.host_caps & MMC_CAP_NONREMOVABLE);
52 
53 	host->ioaddr = (void *)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
54 					      PCI_REGION_MEM);
55 	host->name = dev->name;
56 	host->cd_gpio = priv->cd_gpio;
57 	host->mmc = &plat->mmc;
58 	host->mmc->dev = dev;
59 	ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
60 	if (ret)
61 		return ret;
62 	host->mmc->priv = &priv->host;
63 	upriv->mmc = host->mmc;
64 
65 	return sdhci_probe(dev);
66 }
67 
pci_mmc_of_to_plat(struct udevice * dev)68 static int pci_mmc_of_to_plat(struct udevice *dev)
69 {
70 	if (CONFIG_IS_ENABLED(DM_GPIO)) {
71 		struct pci_mmc_priv *priv = dev_get_priv(dev);
72 		int ret;
73 
74 		ret = gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,
75 					   GPIOD_IS_IN);
76 		log_debug("cd-gpio %s done, ret=%d\n", dev->name, ret);
77 	}
78 
79 	return 0;
80 }
81 
pci_mmc_bind(struct udevice * dev)82 static int pci_mmc_bind(struct udevice *dev)
83 {
84 	struct pci_mmc_plat *plat = dev_get_plat(dev);
85 
86 	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
87 }
88 
pci_mmc_acpi_fill_ssdt(const struct udevice * dev,struct acpi_ctx * ctx)89 static int pci_mmc_acpi_fill_ssdt(const struct udevice *dev,
90 				  struct acpi_ctx *ctx)
91 {
92 	struct pci_mmc_priv *priv = dev_get_priv(dev);
93 	char path[ACPI_PATH_MAX];
94 	struct acpi_gpio gpio;
95 	struct acpi_dp *dp;
96 	int ret;
97 
98 	if (!dev_has_ofnode(dev))
99 		return 0;
100 	if (dev_get_driver_data(dev) == TYPE_EMMC)
101 		return 0;
102 
103 	ret = gpio_get_acpi(&priv->cd_gpio, &gpio);
104 	if (ret)
105 		return log_msg_ret("gpio", ret);
106 	gpio.type = ACPI_GPIO_TYPE_INTERRUPT;
107 	gpio.pull = ACPI_GPIO_PULL_NONE;
108 	gpio.irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
109 	gpio.irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
110 	gpio.irq.shared = ACPI_IRQ_SHARED;
111 	gpio.irq.wake = ACPI_IRQ_WAKE;
112 	gpio.interrupt_debounce_timeout = 10000; /* 100ms */
113 
114 	/* Use device path as the Scope for the SSDT */
115 	ret = acpi_device_path(dev, path, sizeof(path));
116 	if (ret)
117 		return log_msg_ret("path", ret);
118 	acpigen_write_scope(ctx, path);
119 	acpigen_write_name(ctx, "_CRS");
120 
121 	/* Write GpioInt() as default (if set) or custom from devicetree */
122 	acpigen_write_resourcetemplate_header(ctx);
123 	acpi_device_write_gpio(ctx, &gpio);
124 	acpigen_write_resourcetemplate_footer(ctx);
125 
126 	/* Bind the cd-gpio name to the GpioInt() resource */
127 	dp = acpi_dp_new_table("_DSD");
128 	if (!dp)
129 		return -ENOMEM;
130 	acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
131 	ret = acpi_dp_write(ctx, dp);
132 	if (ret)
133 		return log_msg_ret("cd", ret);
134 
135 	acpigen_pop_len(ctx);
136 
137 	return 0;
138 }
139 
140 struct acpi_ops pci_mmc_acpi_ops = {
141 	.fill_ssdt	= pci_mmc_acpi_fill_ssdt,
142 };
143 
144 static const struct udevice_id pci_mmc_match[] = {
145 	{ .compatible = "intel,apl-sd", .data = TYPE_SD },
146 	{ .compatible = "intel,apl-emmc", .data = TYPE_EMMC },
147 	{ }
148 };
149 
150 U_BOOT_DRIVER(pci_mmc) = {
151 	.name	= "pci_mmc",
152 	.id	= UCLASS_MMC,
153 	.of_match = pci_mmc_match,
154 	.bind	= pci_mmc_bind,
155 	.of_to_plat	= pci_mmc_of_to_plat,
156 	.probe	= pci_mmc_probe,
157 	.ops	= &sdhci_ops,
158 	.priv_auto	= sizeof(struct pci_mmc_priv),
159 	.plat_auto	= sizeof(struct pci_mmc_plat),
160 	ACPI_OPS_PTR(&pci_mmc_acpi_ops)
161 };
162 
163 static struct pci_device_id mmc_supported[] = {
164 	{ PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) },
165 	{},
166 };
167 
168 U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);
169