1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*
3  * Cadence DDR Driver
4  *
5  * Copyright (C) 2012-2021 Cadence Design Systems, Inc.
6  * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
7  */
8 
9 #ifndef LPDDR4_32BIT_H
10 #define LPDDR4_32BIT_H
11 
12 #define DSLICE_NUM (4U)
13 #define ASLICE_NUM (1U)
14 
15 #ifdef __cplusplus
16 extern "C" {
17 #endif
18 
19 #define DSLICE0_REG_COUNT  (140U)
20 #define DSLICE1_REG_COUNT  (140U)
21 #define DSLICE2_REG_COUNT  (140U)
22 #define DSLICE3_REG_COUNT  (140U)
23 #define ASLICE0_REG_COUNT  (52U)
24 #define PHY_CORE_REG_COUNT (140U)
25 
26 #ifdef __cplusplus
27 }
28 #endif
29 
30 #endif  /* LPDDR4_32BIT_H */
31