1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
4 * Scott McNutt <smcnutt@psyent.com>
5 */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <serial.h>
11 #include <asm/io.h>
12 #include <linux/bitops.h>
13
14 /* status register */
15 #define ALTERA_UART_TMT BIT(5) /* tx empty */
16 #define ALTERA_UART_TRDY BIT(6) /* tx ready */
17 #define ALTERA_UART_RRDY BIT(7) /* rx ready */
18
19 struct altera_uart_regs {
20 u32 rxdata; /* Rx data reg */
21 u32 txdata; /* Tx data reg */
22 u32 status; /* Status reg */
23 u32 control; /* Control reg */
24 u32 divisor; /* Baud rate divisor reg */
25 u32 endofpacket; /* End-of-packet reg */
26 };
27
28 struct altera_uart_plat {
29 struct altera_uart_regs *regs;
30 unsigned int uartclk;
31 };
32
altera_uart_setbrg(struct udevice * dev,int baudrate)33 static int altera_uart_setbrg(struct udevice *dev, int baudrate)
34 {
35 struct altera_uart_plat *plat = dev_get_plat(dev);
36 struct altera_uart_regs *const regs = plat->regs;
37 u32 div;
38
39 div = (plat->uartclk / baudrate) - 1;
40 writel(div, ®s->divisor);
41
42 return 0;
43 }
44
altera_uart_putc(struct udevice * dev,const char ch)45 static int altera_uart_putc(struct udevice *dev, const char ch)
46 {
47 struct altera_uart_plat *plat = dev_get_plat(dev);
48 struct altera_uart_regs *const regs = plat->regs;
49
50 if (!(readl(®s->status) & ALTERA_UART_TRDY))
51 return -EAGAIN;
52
53 writel(ch, ®s->txdata);
54
55 return 0;
56 }
57
altera_uart_pending(struct udevice * dev,bool input)58 static int altera_uart_pending(struct udevice *dev, bool input)
59 {
60 struct altera_uart_plat *plat = dev_get_plat(dev);
61 struct altera_uart_regs *const regs = plat->regs;
62 u32 st = readl(®s->status);
63
64 if (input)
65 return st & ALTERA_UART_RRDY ? 1 : 0;
66 else
67 return !(st & ALTERA_UART_TMT);
68 }
69
altera_uart_getc(struct udevice * dev)70 static int altera_uart_getc(struct udevice *dev)
71 {
72 struct altera_uart_plat *plat = dev_get_plat(dev);
73 struct altera_uart_regs *const regs = plat->regs;
74
75 if (!(readl(®s->status) & ALTERA_UART_RRDY))
76 return -EAGAIN;
77
78 return readl(®s->rxdata) & 0xff;
79 }
80
altera_uart_probe(struct udevice * dev)81 static int altera_uart_probe(struct udevice *dev)
82 {
83 return 0;
84 }
85
altera_uart_of_to_plat(struct udevice * dev)86 static int altera_uart_of_to_plat(struct udevice *dev)
87 {
88 struct altera_uart_plat *plat = dev_get_plat(dev);
89
90 plat->regs = map_physmem(dev_read_addr(dev),
91 sizeof(struct altera_uart_regs),
92 MAP_NOCACHE);
93 plat->uartclk = dev_read_u32_default(dev, "clock-frequency", 0);
94
95 return 0;
96 }
97
98 static const struct dm_serial_ops altera_uart_ops = {
99 .putc = altera_uart_putc,
100 .pending = altera_uart_pending,
101 .getc = altera_uart_getc,
102 .setbrg = altera_uart_setbrg,
103 };
104
105 static const struct udevice_id altera_uart_ids[] = {
106 { .compatible = "altr,uart-1.0" },
107 {}
108 };
109
110 U_BOOT_DRIVER(altera_uart) = {
111 .name = "altera_uart",
112 .id = UCLASS_SERIAL,
113 .of_match = altera_uart_ids,
114 .of_to_plat = altera_uart_of_to_plat,
115 .plat_auto = sizeof(struct altera_uart_plat),
116 .probe = altera_uart_probe,
117 .ops = &altera_uart_ops,
118 };
119
120 #ifdef CONFIG_DEBUG_UART_ALTERA_UART
121
122 #include <debug_uart.h>
123
_debug_uart_init(void)124 static inline void _debug_uart_init(void)
125 {
126 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
127 u32 div;
128
129 div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
130 writel(div, ®s->divisor);
131 }
132
_debug_uart_putc(int ch)133 static inline void _debug_uart_putc(int ch)
134 {
135 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
136
137 while (1) {
138 u32 st = readl(®s->status);
139
140 if (st & ALTERA_UART_TRDY)
141 break;
142 }
143
144 writel(ch, ®s->txdata);
145 }
146
147 DEBUG_UART_FUNCS
148
149 #endif
150