1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Generic DWC3 Glue layer
4 *
5 * Copyright (C) 2016 - 2018 Xilinx, Inc.
6 *
7 * Based on dwc3-omap.c.
8 */
9
10 #include <common.h>
11 #include <cpu_func.h>
12 #include <log.h>
13 #include <dm.h>
14 #include <dm/device-internal.h>
15 #include <dm/lists.h>
16 #include <dwc3-uboot.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/gadget.h>
21 #include <malloc.h>
22 #include <usb.h>
23 #include "core.h"
24 #include "gadget.h"
25 #include <reset.h>
26 #include <clk.h>
27 #include <usb/xhci.h>
28
29 struct dwc3_glue_data {
30 struct clk_bulk clks;
31 struct reset_ctl_bulk resets;
32 fdt_addr_t regs;
33 };
34
35 struct dwc3_generic_plat {
36 fdt_addr_t base;
37 u32 maximum_speed;
38 enum usb_dr_mode dr_mode;
39 };
40
41 struct dwc3_generic_priv {
42 void *base;
43 struct dwc3 dwc3;
44 struct phy_bulk phys;
45 };
46
47 struct dwc3_generic_host_priv {
48 struct xhci_ctrl xhci_ctrl;
49 struct dwc3_generic_priv gen_priv;
50 };
51
dwc3_generic_probe(struct udevice * dev,struct dwc3_generic_priv * priv)52 static int dwc3_generic_probe(struct udevice *dev,
53 struct dwc3_generic_priv *priv)
54 {
55 int rc;
56 struct dwc3_generic_plat *plat = dev_get_plat(dev);
57 struct dwc3 *dwc3 = &priv->dwc3;
58 struct dwc3_glue_data *glue = dev_get_plat(dev->parent);
59
60 dwc3->dev = dev;
61 dwc3->maximum_speed = plat->maximum_speed;
62 dwc3->dr_mode = plat->dr_mode;
63 #if CONFIG_IS_ENABLED(OF_CONTROL)
64 dwc3_of_parse(dwc3);
65 #endif
66
67 /*
68 * It must hold whole USB3.0 OTG controller in resetting to hold pipe
69 * power state in P2 before initializing TypeC PHY on RK3399 platform.
70 */
71 if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {
72 reset_assert_bulk(&glue->resets);
73 udelay(1);
74 }
75
76 rc = dwc3_setup_phy(dev, &priv->phys);
77 if (rc && rc != -ENOTSUPP)
78 return rc;
79
80 if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
81 reset_deassert_bulk(&glue->resets);
82
83 priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
84 dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
85
86
87 rc = dwc3_init(dwc3);
88 if (rc) {
89 unmap_physmem(priv->base, MAP_NOCACHE);
90 return rc;
91 }
92
93 return 0;
94 }
95
dwc3_generic_remove(struct udevice * dev,struct dwc3_generic_priv * priv)96 static int dwc3_generic_remove(struct udevice *dev,
97 struct dwc3_generic_priv *priv)
98 {
99 struct dwc3 *dwc3 = &priv->dwc3;
100
101 dwc3_remove(dwc3);
102 dwc3_shutdown_phy(dev, &priv->phys);
103 unmap_physmem(dwc3->regs, MAP_NOCACHE);
104
105 return 0;
106 }
107
dwc3_generic_of_to_plat(struct udevice * dev)108 static int dwc3_generic_of_to_plat(struct udevice *dev)
109 {
110 struct dwc3_generic_plat *plat = dev_get_plat(dev);
111 ofnode node = dev_ofnode(dev);
112
113 plat->base = dev_read_addr(dev);
114
115 plat->maximum_speed = usb_get_maximum_speed(node);
116 if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
117 pr_info("No USB maximum speed specified. Using super speed\n");
118 plat->maximum_speed = USB_SPEED_SUPER;
119 }
120
121 plat->dr_mode = usb_get_dr_mode(node);
122 if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
123 pr_err("Invalid usb mode setup\n");
124 return -ENODEV;
125 }
126
127 return 0;
128 }
129
130 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
dm_usb_gadget_handle_interrupts(struct udevice * dev)131 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
132 {
133 struct dwc3_generic_priv *priv = dev_get_priv(dev);
134 struct dwc3 *dwc3 = &priv->dwc3;
135
136 dwc3_gadget_uboot_handle_interrupt(dwc3);
137
138 return 0;
139 }
140
dwc3_generic_peripheral_probe(struct udevice * dev)141 static int dwc3_generic_peripheral_probe(struct udevice *dev)
142 {
143 struct dwc3_generic_priv *priv = dev_get_priv(dev);
144
145 return dwc3_generic_probe(dev, priv);
146 }
147
dwc3_generic_peripheral_remove(struct udevice * dev)148 static int dwc3_generic_peripheral_remove(struct udevice *dev)
149 {
150 struct dwc3_generic_priv *priv = dev_get_priv(dev);
151
152 return dwc3_generic_remove(dev, priv);
153 }
154
155 U_BOOT_DRIVER(dwc3_generic_peripheral) = {
156 .name = "dwc3-generic-peripheral",
157 .id = UCLASS_USB_GADGET_GENERIC,
158 .of_to_plat = dwc3_generic_of_to_plat,
159 .probe = dwc3_generic_peripheral_probe,
160 .remove = dwc3_generic_peripheral_remove,
161 .priv_auto = sizeof(struct dwc3_generic_priv),
162 .plat_auto = sizeof(struct dwc3_generic_plat),
163 };
164 #endif
165
166 #if defined(CONFIG_SPL_USB_HOST) || \
167 !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
dwc3_generic_host_probe(struct udevice * dev)168 static int dwc3_generic_host_probe(struct udevice *dev)
169 {
170 struct xhci_hcor *hcor;
171 struct xhci_hccr *hccr;
172 struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
173 int rc;
174
175 rc = dwc3_generic_probe(dev, &priv->gen_priv);
176 if (rc)
177 return rc;
178
179 hccr = (struct xhci_hccr *)priv->gen_priv.base;
180 hcor = (struct xhci_hcor *)(priv->gen_priv.base +
181 HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
182
183 return xhci_register(dev, hccr, hcor);
184 }
185
dwc3_generic_host_remove(struct udevice * dev)186 static int dwc3_generic_host_remove(struct udevice *dev)
187 {
188 struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
189 int rc;
190
191 rc = xhci_deregister(dev);
192 if (rc)
193 return rc;
194
195 return dwc3_generic_remove(dev, &priv->gen_priv);
196 }
197
198 U_BOOT_DRIVER(dwc3_generic_host) = {
199 .name = "dwc3-generic-host",
200 .id = UCLASS_USB,
201 .of_to_plat = dwc3_generic_of_to_plat,
202 .probe = dwc3_generic_host_probe,
203 .remove = dwc3_generic_host_remove,
204 .priv_auto = sizeof(struct dwc3_generic_host_priv),
205 .plat_auto = sizeof(struct dwc3_generic_plat),
206 .ops = &xhci_usb_ops,
207 .flags = DM_FLAG_ALLOC_PRIV_DMA,
208 };
209 #endif
210
211 struct dwc3_glue_ops {
212 void (*select_dr_mode)(struct udevice *dev, int index,
213 enum usb_dr_mode mode);
214 };
215
dwc3_ti_select_dr_mode(struct udevice * dev,int index,enum usb_dr_mode mode)216 void dwc3_ti_select_dr_mode(struct udevice *dev, int index,
217 enum usb_dr_mode mode)
218 {
219 #define USBOTGSS_UTMI_OTG_STATUS 0x0084
220 #define USBOTGSS_UTMI_OTG_OFFSET 0x0480
221
222 /* UTMI_OTG_STATUS REGISTER */
223 #define USBOTGSS_UTMI_OTG_STATUS_SW_MODE BIT(31)
224 #define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT BIT(9)
225 #define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8)
226 #define USBOTGSS_UTMI_OTG_STATUS_IDDIG BIT(4)
227 #define USBOTGSS_UTMI_OTG_STATUS_SESSEND BIT(3)
228 #define USBOTGSS_UTMI_OTG_STATUS_SESSVALID BIT(2)
229 #define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID BIT(1)
230 enum dwc3_omap_utmi_mode {
231 DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
232 DWC3_OMAP_UTMI_MODE_HW,
233 DWC3_OMAP_UTMI_MODE_SW,
234 };
235
236 u32 use_id_pin;
237 u32 host_mode;
238 u32 reg;
239 u32 utmi_mode;
240 u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;
241
242 struct dwc3_glue_data *glue = dev_get_plat(dev);
243 void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);
244
245 if (device_is_compatible(dev, "ti,am437x-dwc3"))
246 utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET;
247
248 utmi_mode = dev_read_u32_default(dev, "utmi-mode",
249 DWC3_OMAP_UTMI_MODE_UNKNOWN);
250 if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) {
251 debug("%s: OTG is not supported. defaulting to PERIPHERAL\n",
252 dev->name);
253 mode = USB_DR_MODE_PERIPHERAL;
254 }
255
256 switch (mode) {
257 case USB_DR_MODE_PERIPHERAL:
258 use_id_pin = 0;
259 host_mode = 0;
260 break;
261 case USB_DR_MODE_HOST:
262 use_id_pin = 0;
263 host_mode = 1;
264 break;
265 case USB_DR_MODE_OTG:
266 default:
267 use_id_pin = 1;
268 host_mode = 0;
269 break;
270 }
271
272 reg = readl(base + utmi_status_offset);
273
274 reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE);
275 if (!use_id_pin)
276 reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
277
278 writel(reg, base + utmi_status_offset);
279
280 reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND |
281 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID |
282 USBOTGSS_UTMI_OTG_STATUS_IDDIG);
283
284 reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID |
285 USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT;
286
287 if (!host_mode)
288 reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG |
289 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID;
290
291 writel(reg, base + utmi_status_offset);
292
293 unmap_physmem(base, MAP_NOCACHE);
294 }
295
296 struct dwc3_glue_ops ti_ops = {
297 .select_dr_mode = dwc3_ti_select_dr_mode,
298 };
299
dwc3_glue_bind(struct udevice * parent)300 static int dwc3_glue_bind(struct udevice *parent)
301 {
302 ofnode node;
303 int ret;
304
305 ofnode_for_each_subnode(node, dev_ofnode(parent)) {
306 const char *name = ofnode_get_name(node);
307 enum usb_dr_mode dr_mode;
308 struct udevice *dev;
309 const char *driver = NULL;
310
311 debug("%s: subnode name: %s\n", __func__, name);
312
313 dr_mode = usb_get_dr_mode(node);
314
315 switch (dr_mode) {
316 case USB_DR_MODE_PERIPHERAL:
317 case USB_DR_MODE_OTG:
318 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
319 debug("%s: dr_mode: OTG or Peripheral\n", __func__);
320 driver = "dwc3-generic-peripheral";
321 #endif
322 break;
323 #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
324 case USB_DR_MODE_HOST:
325 debug("%s: dr_mode: HOST\n", __func__);
326 driver = "dwc3-generic-host";
327 break;
328 #endif
329 default:
330 debug("%s: unsupported dr_mode\n", __func__);
331 return -ENODEV;
332 };
333
334 if (!driver)
335 continue;
336
337 ret = device_bind_driver_to_node(parent, driver, name,
338 node, &dev);
339 if (ret) {
340 debug("%s: not able to bind usb device mode\n",
341 __func__);
342 return ret;
343 }
344 }
345
346 return 0;
347 }
348
dwc3_glue_reset_init(struct udevice * dev,struct dwc3_glue_data * glue)349 static int dwc3_glue_reset_init(struct udevice *dev,
350 struct dwc3_glue_data *glue)
351 {
352 int ret;
353
354 ret = reset_get_bulk(dev, &glue->resets);
355 if (ret == -ENOTSUPP || ret == -ENOENT)
356 return 0;
357 else if (ret)
358 return ret;
359
360 ret = reset_deassert_bulk(&glue->resets);
361 if (ret) {
362 reset_release_bulk(&glue->resets);
363 return ret;
364 }
365
366 return 0;
367 }
368
dwc3_glue_clk_init(struct udevice * dev,struct dwc3_glue_data * glue)369 static int dwc3_glue_clk_init(struct udevice *dev,
370 struct dwc3_glue_data *glue)
371 {
372 int ret;
373
374 ret = clk_get_bulk(dev, &glue->clks);
375 if (ret == -ENOSYS || ret == -ENOENT)
376 return 0;
377 if (ret)
378 return ret;
379
380 #if CONFIG_IS_ENABLED(CLK)
381 ret = clk_enable_bulk(&glue->clks);
382 if (ret) {
383 clk_release_bulk(&glue->clks);
384 return ret;
385 }
386 #endif
387
388 return 0;
389 }
390
dwc3_glue_probe(struct udevice * dev)391 static int dwc3_glue_probe(struct udevice *dev)
392 {
393 struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
394 struct dwc3_glue_data *glue = dev_get_plat(dev);
395 struct udevice *child = NULL;
396 int index = 0;
397 int ret;
398
399 glue->regs = dev_read_addr(dev);
400
401 ret = dwc3_glue_clk_init(dev, glue);
402 if (ret)
403 return ret;
404
405 ret = dwc3_glue_reset_init(dev, glue);
406 if (ret)
407 return ret;
408
409 ret = device_find_first_child(dev, &child);
410 if (ret)
411 return ret;
412
413 if (glue->resets.count == 0) {
414 ret = dwc3_glue_reset_init(child, glue);
415 if (ret)
416 return ret;
417 }
418
419 while (child) {
420 enum usb_dr_mode dr_mode;
421
422 dr_mode = usb_get_dr_mode(dev_ofnode(child));
423 device_find_next_child(&child);
424 if (ops && ops->select_dr_mode)
425 ops->select_dr_mode(dev, index, dr_mode);
426 index++;
427 }
428
429 return 0;
430 }
431
dwc3_glue_remove(struct udevice * dev)432 static int dwc3_glue_remove(struct udevice *dev)
433 {
434 struct dwc3_glue_data *glue = dev_get_plat(dev);
435
436 reset_release_bulk(&glue->resets);
437
438 clk_release_bulk(&glue->clks);
439
440 return 0;
441 }
442
443 static const struct udevice_id dwc3_glue_ids[] = {
444 { .compatible = "xlnx,zynqmp-dwc3" },
445 { .compatible = "xlnx,versal-dwc3" },
446 { .compatible = "ti,keystone-dwc3"},
447 { .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
448 { .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
449 { .compatible = "ti,am654-dwc3" },
450 { .compatible = "rockchip,rk3328-dwc3" },
451 { .compatible = "rockchip,rk3399-dwc3" },
452 { .compatible = "qcom,dwc3" },
453 { .compatible = "intel,tangier-dwc3" },
454 { }
455 };
456
457 U_BOOT_DRIVER(dwc3_generic_wrapper) = {
458 .name = "dwc3-generic-wrapper",
459 .id = UCLASS_NOP,
460 .of_match = dwc3_glue_ids,
461 .bind = dwc3_glue_bind,
462 .probe = dwc3_glue_probe,
463 .remove = dwc3_glue_remove,
464 .plat_auto = sizeof(struct dwc3_glue_data),
465
466 };
467