1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
4 */
5
6
7 #include <common.h>
8 #include <usb.h>
9 #include <asm/io.h>
10 #include <asm/arch/imx-regs.h>
11 #include <linux/delay.h>
12 #include <usb/ehci-ci.h>
13 #include <errno.h>
14
15 #include "ehci.h"
16
17 #define USBCTRL_OTGBASE_OFFSET 0x600
18
19 #define MX25_OTG_SIC_SHIFT 29
20 #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
21 #define MX25_OTG_PM_BIT (1 << 24)
22 #define MX25_OTG_PP_BIT (1 << 11)
23 #define MX25_OTG_OCPOL_BIT (1 << 3)
24
25 #define MX25_H1_SIC_SHIFT 21
26 #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
27 #define MX25_H1_PP_BIT (1 << 18)
28 #define MX25_H1_PM_BIT (1 << 16)
29 #define MX25_H1_IPPUE_UP_BIT (1 << 7)
30 #define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
31 #define MX25_H1_TLL_BIT (1 << 5)
32 #define MX25_H1_USBTE_BIT (1 << 4)
33 #define MX25_H1_OCPOL_BIT (1 << 2)
34
35 #define MX31_OTG_SIC_SHIFT 29
36 #define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
37 #define MX31_OTG_PM_BIT (1 << 24)
38
39 #define MX31_H2_SIC_SHIFT 21
40 #define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
41 #define MX31_H2_PM_BIT (1 << 16)
42 #define MX31_H2_DT_BIT (1 << 5)
43
44 #define MX31_H1_SIC_SHIFT 13
45 #define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
46 #define MX31_H1_PM_BIT (1 << 8)
47 #define MX31_H1_DT_BIT (1 << 4)
48
49 #define MX35_OTG_SIC_SHIFT 29
50 #define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT)
51 #define MX35_OTG_PM_BIT (1 << 24)
52 #define MX35_OTG_PP_BIT (1 << 11)
53 #define MX35_OTG_OCPOL_BIT (1 << 3)
54
55 #define MX35_H1_SIC_SHIFT 21
56 #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
57 #define MX35_H1_PP_BIT (1 << 18)
58 #define MX35_H1_PM_BIT (1 << 16)
59 #define MX35_H1_IPPUE_UP_BIT (1 << 7)
60 #define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
61 #define MX35_H1_TLL_BIT (1 << 5)
62 #define MX35_H1_USBTE_BIT (1 << 4)
63 #define MX35_H1_OCPOL_BIT (1 << 2)
64
mxc_set_usbcontrol(int port,unsigned int flags)65 static int mxc_set_usbcontrol(int port, unsigned int flags)
66 {
67 unsigned int v;
68
69 v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
70 #if defined(CONFIG_MX31)
71 switch (port) {
72 case 0: /* OTG port */
73 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
74 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT;
75
76 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
77 v |= MX31_OTG_PM_BIT;
78
79 break;
80 case 1: /* H1 port */
81 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
82 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT;
83
84 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
85 v |= MX31_H1_PM_BIT;
86
87 if (!(flags & MXC_EHCI_TTL_ENABLED))
88 v |= MX31_H1_DT_BIT;
89
90 break;
91 case 2: /* H2 port */
92 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
93 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT;
94
95 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
96 v |= MX31_H2_PM_BIT;
97
98 if (!(flags & MXC_EHCI_TTL_ENABLED))
99 v |= MX31_H2_DT_BIT;
100
101 break;
102 default:
103 return -EINVAL;
104 }
105 #else
106 #error MXC EHCI USB driver not supported on this platform
107 #endif
108 writel(v, IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
109
110 return 0;
111 }
112
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** hccr,struct ehci_hcor ** hcor)113 int ehci_hcd_init(int index, enum usb_init_type init,
114 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
115 {
116 struct usb_ehci *ehci;
117 #ifdef CONFIG_MX31
118 struct clock_control_regs *sc_regs =
119 (struct clock_control_regs *)CCM_BASE;
120
121 __raw_readl(&sc_regs->ccmr);
122 __raw_writel(__raw_readl(&sc_regs->ccmr) | (1 << 9), &sc_regs->ccmr) ;
123 #endif
124
125 udelay(80);
126
127 ehci = (struct usb_ehci *)(IMX_USB_BASE +
128 IMX_USB_PORT_OFFSET * CONFIG_MXC_USB_PORT);
129 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
130 *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
131 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
132 setbits_le32(&ehci->usbmode, CM_HOST);
133 __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
134 mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS);
135
136 udelay(10000);
137
138 return 0;
139 }
140
141 /*
142 * Destroy the appropriate control structures corresponding
143 * the the EHCI host controller.
144 */
ehci_hcd_stop(int index)145 int ehci_hcd_stop(int index)
146 {
147 return 0;
148 }
149