1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuration settings for the Sentec Cobra Board. 4 * 5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 6 */ 7 8 /* 9 * configuration for ASTRO "Urmel" board. 10 * Originating from Cobra5272 configuration, messed up by 11 * Wolfgang Wegner <w.wegner@astro-kom.de> 12 * Please do not bother the original author with bug reports 13 * concerning this file. 14 */ 15 16 #ifndef _CONFIG_ASTRO_MCF5373L_H 17 #define _CONFIG_ASTRO_MCF5373L_H 18 19 #include <linux/stringify.h> 20 21 /* 22 * set the card type to actually compile for; either of 23 * the possibilities listed below has to be used! 24 */ 25 #define ASTRO_V532 1 26 27 #if ASTRO_V532 28 #define ASTRO_ID 0xF8 29 #elif ASTRO_V512 30 #define ASTRO_ID 0xFA 31 #elif ASTRO_TWIN7S2 32 #define ASTRO_ID 0xF9 33 #elif ASTRO_V912 34 #define ASTRO_ID 0xFC 35 #elif ASTRO_COFDMDUOS2 36 #define ASTRO_ID 0xFB 37 #else 38 #error No card type defined! 39 #endif 40 41 /* 42 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from 43 * a different bootloader that has already performed RAM setup) or 44 * started directly from flash, which is the regular case for production 45 * boards. 46 */ 47 #ifdef CONFIG_RAM 48 #define CONFIG_MONITOR_IS_IN_RAM 49 #define ENABLE_JFFS 0 50 #else 51 #define ENABLE_JFFS 1 52 #endif 53 54 #define CONFIG_MCFRTC 55 #undef RTC_DEBUG 56 57 /* Timer */ 58 #define CONFIG_MCFTMR 59 60 /* I2C */ 61 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 62 63 /* 64 * Defines processor clock - important for correct timings concerning serial 65 * interface etc. 66 */ 67 68 #define CONFIG_SYS_CLK 80000000 69 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) 70 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 71 72 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 73 #define CONFIG_SYS_CORE_SRAM 0x80000000 74 75 #define CONFIG_SYS_UNIFY_CACHE 76 77 /* 78 * Define baudrate for UART1 (console output, tftp, ...) 79 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 80 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected 81 * in u-boot command interface 82 */ 83 84 #define CONFIG_MCFUART 85 #define CONFIG_SYS_UART_PORT (2) 86 #define CONFIG_SYS_UART2_ALT3_GPIO 87 88 /* 89 * Watchdog configuration; Watchdog is disabled for running from RAM 90 * and set to highest possible value else. Beware there is no check 91 * in the watchdog code to validate the timeout value set here! 92 */ 93 94 #ifndef CONFIG_MONITOR_IS_IN_RAM 95 #define CONFIG_WATCHDOG 96 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ 97 #endif 98 99 /* 100 * Configuration for environment 101 * Environment is located in the last sector of the flash 102 */ 103 104 #ifndef CONFIG_MONITOR_IS_IN_RAM 105 #else 106 /* 107 * environment in RAM - This is used to use a single PC-based application 108 * to load an image, load U-Boot, load an environment and then start U-Boot 109 * to execute the commands from the environment. Feedback is done via setting 110 * and reading memory locations. 111 */ 112 #endif 113 114 /* here we put our FPGA configuration... */ 115 116 /* Define user parameters that have to be customized most likely */ 117 118 /* AUTOBOOT settings - booting images automatically by u-boot after power on */ 119 120 /* 121 * The following settings will be contained in the environment block ; if you 122 * want to use a neutral environment all those settings can be manually set in 123 * u-boot: 'set' command 124 */ 125 126 #define CONFIG_EXTRA_ENV_SETTINGS \ 127 "loaderversion=11\0" \ 128 "card_id="__stringify(ASTRO_ID)"\0" \ 129 "alterafile=0\0" \ 130 "xilinxfile=0\0" \ 131 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 132 "fpga load 0 0x41000000 $filesize\0" \ 133 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 134 "fpga load 1 0x41000000 $filesize\0" \ 135 "env_default=1\0" \ 136 "env_check=if test $env_default -eq 1;"\ 137 " then setenv env_default 0;saveenv;fi\0" 138 139 /* 140 * "update" is a non-standard command that has to be supplied 141 * by external update.c; This is not included in mainline because 142 * it needs non-blocking CFI routines. 143 */ 144 #ifdef CONFIG_MONITOR_IS_IN_RAM 145 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ 146 #else 147 #if ASTRO_V532 148 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 149 "run xilinxload&&run alteraload&&bootm 0x80000;"\ 150 "update;reset" 151 #else 152 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 153 "run xilinxload&&bootm 0x80000;update;reset" 154 #endif 155 #endif 156 157 #define CONFIG_FPGA_COUNT 1 158 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 159 #define CONFIG_SYS_FPGA_WAIT 1000 160 161 /* End of user parameters to be customized */ 162 163 /* Defines memory range for test */ 164 165 /* 166 * Low Level Configuration Settings 167 * (address mappings, register initial values, etc.) 168 * You should know what you are doing if you make changes here. 169 */ 170 171 /* Base register address */ 172 173 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 174 175 /* System Conf. Reg. & System Protection Reg. */ 176 177 #define CONFIG_SYS_SCR 0x0003; 178 #define CONFIG_SYS_SPR 0xffff; 179 180 /* 181 * Definitions for initial stack pointer and data area (in internal SRAM) 182 */ 183 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 184 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 185 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 186 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 187 GENERATED_GBL_DATA_SIZE) 188 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 189 190 /* 191 * Start addresses for the final memory configuration 192 * (Set up by the startup code) 193 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 194 */ 195 #define CONFIG_SYS_SDRAM_BASE 0x40000000 196 197 /* 198 * Chipselect bank definitions 199 * 200 * CS0 - Flash 32MB (first 16MB) 201 * CS1 - Flash 32MB (second half) 202 * CS2 - FPGA 203 * CS3 - FPGA 204 * CS4 - unused 205 * CS5 - unused 206 */ 207 #define CONFIG_SYS_CS0_BASE 0 208 #define CONFIG_SYS_CS0_MASK 0x00ff0001 209 #define CONFIG_SYS_CS0_CTRL 0x00001fc0 210 211 #define CONFIG_SYS_CS1_BASE 0x01000000 212 #define CONFIG_SYS_CS1_MASK 0x00ff0001 213 #define CONFIG_SYS_CS1_CTRL 0x00001fc0 214 215 #define CONFIG_SYS_CS2_BASE 0x20000000 216 #define CONFIG_SYS_CS2_MASK 0x00ff0001 217 #define CONFIG_SYS_CS2_CTRL 0x0000fec0 218 219 #define CONFIG_SYS_CS3_BASE 0x21000000 220 #define CONFIG_SYS_CS3_MASK 0x00ff0001 221 #define CONFIG_SYS_CS3_CTRL 0x0000fec0 222 223 #define CONFIG_SYS_FLASH_BASE 0x00000000 224 225 #ifdef CONFIG_MONITOR_IS_IN_RAM 226 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 227 #else 228 /* This is mainly used during relocation in start.S */ 229 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 230 #endif 231 /* Reserve 256 kB for Monitor */ 232 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 233 234 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 235 236 /* 237 * For booting Linux, the board info and command line data 238 * have to be in the first 8 MB of memory, since this is 239 * the maximum mapped by the Linux kernel during initialization ?? 240 */ 241 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 242 (CONFIG_SYS_SDRAM_SIZE << 20)) 243 244 /* FLASH organization */ 245 #define CONFIG_SYS_MAX_FLASH_BANKS 1 246 #define CONFIG_SYS_MAX_FLASH_SECT 259 247 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 248 249 #define CONFIG_SYS_FLASH_SIZE 0x2000000 250 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 251 252 #define LDS_BOARD_TEXT \ 253 . = DEFINED(env_offset) ? env_offset : .; \ 254 env/embedded.o(.text*) 255 256 #if ENABLE_JFFS 257 /* JFFS Partition offset set */ 258 #define CONFIG_SYS_JFFS2_FIRST_BANK 0 259 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 260 /* 512k reserved for u-boot */ 261 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 262 #endif 263 264 /* Cache Configuration */ 265 266 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 267 CONFIG_SYS_INIT_RAM_SIZE - 8) 268 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 269 CONFIG_SYS_INIT_RAM_SIZE - 4) 270 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) 271 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 272 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 273 CF_ACR_EN | CF_ACR_SM_ALL) 274 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 275 CF_CACR_DCM_P) 276 277 #endif /* _CONFIG_ASTRO_MCF5373L_H */ 278