1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013 Atmel Corporation. 4 * Josh Wu <josh.wu@atmel.com> 5 * 6 * Configuation settings for the AT91SAM9N12-EK boards. 7 */ 8 9 #ifndef __AT91SAM9N12_CONFIG_H_ 10 #define __AT91SAM9N12_CONFIG_H_ 11 12 /* ARM asynchronous clock */ 13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 14 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ 15 16 /* Misc CPU related */ 17 18 /* LCD */ 19 #define LCD_BPP LCD_COLOR16 20 #define LCD_OUTPUT_BPP 24 21 #define CONFIG_LCD_LOGO 22 #define CONFIG_LCD_INFO 23 #define CONFIG_LCD_INFO_BELOW_LOGO 24 #define CONFIG_ATMEL_LCD_RGB565 25 26 /* 27 * BOOTP options 28 */ 29 #define CONFIG_BOOTP_BOOTFILESIZE 30 31 #define CONFIG_SYS_SDRAM_BASE 0x20000000 32 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 33 34 /* 35 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 36 * leaving the correct space for initial global data structure above 37 * that address while providing maximum stack area below. 38 */ 39 # define CONFIG_SYS_INIT_SP_ADDR \ 40 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 41 42 /* DataFlash */ 43 44 /* NAND flash */ 45 #ifdef CONFIG_CMD_NAND 46 #define CONFIG_SYS_MAX_NAND_DEVICE 1 47 #define CONFIG_SYS_NAND_BASE 0x40000000 48 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 49 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 50 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) 51 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) 52 #endif 53 54 #define CONFIG_EXTRA_ENV_SETTINGS \ 55 "console=console=ttyS0,115200\0" \ 56 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ 57 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ 58 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" 59 60 /* USB host */ 61 #ifdef CONFIG_CMD_USB 62 #define CONFIG_USB_ATMEL 63 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 64 #define CONFIG_USB_OHCI_NEW 65 #define CONFIG_SYS_USB_OHCI_CPU_INIT 66 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 67 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" 68 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 69 #endif 70 71 #ifdef CONFIG_SPI_BOOT 72 73 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 74 #define CONFIG_BOOTCOMMAND \ 75 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 76 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ 77 "bootm 0x22000000" 78 79 #elif defined(CONFIG_NAND_BOOT) 80 81 /* bootstrap + u-boot + env + linux in nandflash */ 82 #define CONFIG_BOOTCOMMAND \ 83 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 84 "nand read 0x21000000 0x180000 0x080000;" \ 85 "nand read 0x22000000 0x200000 0x400000;" \ 86 "bootm 0x22000000 - 0x21000000" 87 88 #else /* CONFIG_SD_BOOT */ 89 90 #define CONFIG_BOOTCOMMAND \ 91 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ 92 "fatload mmc 0:1 0x21000000 dtb;" \ 93 "fatload mmc 0:1 0x22000000 uImage;" \ 94 "bootm 0x22000000 - 0x21000000" 95 96 #endif 97 98 /* SPL */ 99 #define CONFIG_SPL_MAX_SIZE 0x6000 100 #define CONFIG_SPL_STACK 0x308000 101 102 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 103 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 104 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 105 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 106 107 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 108 109 #define CONFIG_SYS_MASTER_CLOCK 132096000 110 #define CONFIG_SYS_AT91_PLLA 0x20953f03 111 #define CONFIG_SYS_MCKR 0x1301 112 #define CONFIG_SYS_MCKR_CSS 0x1302 113 114 #ifdef CONFIG_SD_BOOT 115 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 116 #endif 117 118 #endif 119