1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Common board functions for siemens AT91SAM9G45 based boards 4 * (C) Copyright 2013 Siemens AG 5 * 6 * Based on: 7 * U-Boot file: include/configs/at91sam9m10g45ek.h 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/hardware.h> 17 #include <linux/sizes.h> 18 19 /* 20 * Warning: changing CONFIG_SYS_TEXT_BASE requires 21 * adapting the initial boot program. 22 * Since the linker has to swallow that define, we must use a pure 23 * hex number here! 24 */ 25 26 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 27 28 /* ARM asynchronous clock */ 29 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 30 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 31 32 /* general purpose I/O */ 33 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 34 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 35 36 /* serial console */ 37 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 38 #define CONFIG_USART_ID ATMEL_ID_SYS 39 40 /* LED */ 41 #define CONFIG_AT91_LED 42 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ 43 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ 44 45 46 /* 47 * BOOTP options 48 */ 49 #define CONFIG_BOOTP_BOOTFILESIZE 50 51 /* SDRAM */ 52 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 53 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 54 55 #define CONFIG_SYS_INIT_SP_ADDR \ 56 (CONFIG_SYS_SDRAM_BASE + SZ_32K - GENERATED_GBL_DATA_SIZE) 57 58 /* NAND flash */ 59 #ifdef CONFIG_CMD_NAND 60 #define CONFIG_SYS_MAX_NAND_DEVICE 1 61 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 62 #define CONFIG_SYS_NAND_DBW_8 63 /* our ALE is AD21 */ 64 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 65 /* our CLE is AD22 */ 66 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 67 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 68 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 69 #define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT 70 #endif 71 72 /* Ethernet */ 73 #define CONFIG_MACB 74 #define CONFIG_RMII 75 #define CONFIG_NET_RETRY_COUNT 20 76 #define CONFIG_AT91_WANTS_COMMON_PHY 77 78 /* DFU class support */ 79 #define DFU_MANIFEST_POLL_TIMEOUT 25000 80 81 /* bootstrap + u-boot + env in nandflash */ 82 83 #define CONFIG_BOOTCOMMAND \ 84 "nand read 0x70000000 0x200000 0x300000;" \ 85 "bootm 0x70000000" 86 87 /* Defines for SPL */ 88 #define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) 89 #define CONFIG_SPL_STACK (SZ_16K) 90 91 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 92 #define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K) 93 94 #define CONFIG_SPL_NAND_RAW_ONLY 95 #define CONFIG_SPL_NAND_SOFTECC 96 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 97 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 98 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 99 100 #define CONFIG_SYS_NAND_ECCSIZE 256 101 #define CONFIG_SYS_NAND_ECCBYTES 3 102 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 103 48, 49, 50, 51, 52, 53, 54, 55, \ 104 56, 57, 58, 59, 60, 61, 62, 63, } 105 106 #define CONFIG_SPL_ATMEL_SIZE 107 #define CONFIG_SYS_MASTER_CLOCK 132096000 108 #define AT91_PLL_LOCK_TIMEOUT 1000000 109 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 110 #define CONFIG_SYS_MCKR 0x1301 111 #define CONFIG_SYS_MCKR_CSS 0x1302 112 113 #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS 114 #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO 115 116 #endif 117