1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2020 NXP 4 */ 5 6 #ifndef __IMX8M_PHANBELL_H 7 #define __IMX8M_PHANBELL_H 8 9 #include <linux/sizes.h> 10 #include <asm/arch/imx-regs.h> 11 12 #define CONFIG_SPL_MAX_SIZE (172 * 1024) 13 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 16 17 #ifdef CONFIG_SPL_BUILD 18 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ 19 #define CONFIG_SPL_WATCHDOG 20 #define CONFIG_SPL_DRIVERS_MISC 21 #define CONFIG_SPL_POWER 22 #define CONFIG_SPL_I2C 23 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" 24 #define CONFIG_SPL_STACK 0x187FF0 25 #define CONFIG_SPL_LIBCOMMON_SUPPORT 26 #define CONFIG_SPL_LIBGENERIC_SUPPORT 27 #define CONFIG_SPL_GPIO 28 #define CONFIG_SPL_MMC 29 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 30 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ 31 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 32 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ 33 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 34 35 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 36 #define CONFIG_MALLOC_F_ADDR 0x182000 37 /* For RAW image gives a error info not panic */ 38 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE 39 40 #undef CONFIG_DM_MMC 41 #endif 42 43 #define CONFIG_REMAKE_ELF 44 45 /* ENET Config */ 46 /* ENET1 */ 47 #if defined(CONFIG_CMD_NET) 48 #define CONFIG_MII 49 #define CONFIG_ETHPRIME "FEC" 50 51 #define CONFIG_FEC_MXC 52 #define CONFIG_FEC_XCV_TYPE RGMII 53 #define CONFIG_FEC_MXC_PHYADDR 0 54 #define FEC_QUIRK_ENET_MAC 55 56 #define CONFIG_PHY_GIGE 57 #define IMX_FEC_BASE 0x30BE0000 58 59 #define CONFIG_PHYLIB 60 #endif 61 62 #define CONFIG_MFG_ENV_SETTINGS \ 63 "initrd_addr=0x43800000\0" \ 64 "initrd_high=0xffffffff\0" \ 65 66 /* Initial environment variables */ 67 #define CONFIG_EXTRA_ENV_SETTINGS \ 68 CONFIG_MFG_ENV_SETTINGS \ 69 "script=boot.scr\0" \ 70 "image=Image\0" \ 71 "console=ttymxc0,115200\0" \ 72 "fdt_addr=0x43000000\0" \ 73 "fdt_high=0xffffffffffffffff\0" \ 74 "boot_fdt=try\0" \ 75 "fdt_file=imx8mq-phanbell.dtb\0" \ 76 "initrd_addr=0x43800000\0" \ 77 "initrd_high=0xffffffffffffffff\0" \ 78 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 79 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 80 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 81 "mmcautodetect=yes\0" \ 82 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ 83 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 84 "bootscript=echo Running bootscript from mmc ...; " \ 85 "source\0" \ 86 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 87 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 88 "mmcboot=echo Booting from mmc ...; " \ 89 "run mmcargs; " \ 90 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 91 "if run loadfdt; then " \ 92 "booti ${loadaddr} - ${fdt_addr}; " \ 93 "else " \ 94 "echo WARN: Cannot load the DT; " \ 95 "fi; " \ 96 "else " \ 97 "echo wait for boot; " \ 98 "fi;\0" \ 99 "netargs=setenv bootargs console=${console} " \ 100 "root=/dev/nfs " \ 101 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 102 "netboot=echo Booting from net ...; " \ 103 "run netargs; " \ 104 "if test ${ip_dyn} = yes; then " \ 105 "setenv get_cmd dhcp; " \ 106 "else " \ 107 "setenv get_cmd tftp; " \ 108 "fi; " \ 109 "${get_cmd} ${loadaddr} ${image}; " \ 110 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 111 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 112 "booti ${loadaddr} - ${fdt_addr}; " \ 113 "else " \ 114 "echo WARN: Cannot load the DT; " \ 115 "fi; " \ 116 "else " \ 117 "booti; " \ 118 "fi;\0" 119 120 #define CONFIG_BOOTCOMMAND \ 121 "mmc dev ${mmcdev}; if mmc rescan; then " \ 122 "if run loadbootscript; then " \ 123 "run bootscript; " \ 124 "else " \ 125 "if run loadimage; then " \ 126 "run mmcboot; " \ 127 "else run netboot; " \ 128 "fi; " \ 129 "fi; " \ 130 "else booti ${loadaddr} - ${fdt_addr}; fi" 131 132 /* Link Definitions */ 133 134 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 135 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 136 #define CONFIG_SYS_INIT_SP_OFFSET \ 137 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 138 #define CONFIG_SYS_INIT_SP_ADDR \ 139 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 140 141 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 142 143 #define CONFIG_SYS_SDRAM_BASE 0x40000000 144 #define PHYS_SDRAM 0x40000000 145 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ 146 147 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 148 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 149 (PHYS_SDRAM_SIZE >> 1)) 150 151 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR 152 153 /* Monitor Command Prompt */ 154 #define CONFIG_SYS_CBSIZE 1024 155 #define CONFIG_SYS_MAXARGS 64 156 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 157 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 158 sizeof(CONFIG_SYS_PROMPT) + 16) 159 160 #define CONFIG_IMX_BOOTAUX 161 162 #define CONFIG_SYS_FSL_USDHC_NUM 2 163 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 164 165 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 166 167 #define CONFIG_MXC_GPIO 168 169 #define CONFIG_OF_SYSTEM_SETUP 170 171 #endif 172