1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2012 4 * Linaro 5 * Linus Walleij <linus.walleij@linaro.org> 6 * Common ARM Integrator configuration settings 7 */ 8 9 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ 10 11 /* 12 * There are various dependencies on the core module (CM) fitted 13 * Users should refer to their CM user guide 14 */ 15 #include "armcoremodule.h" 16 17 /* 18 * Initialize and remap the core module, use SPD to detect memory size 19 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined & 20 * the core module has a CM_INIT register 21 * then the U-Boot initialisation code will 22 * e.g. ARM Boot Monitor or pre-loader is repeated once 23 * (to re-initialise any existing CM_INIT settings to safe values). 24 * 25 * This is usually not the desired behaviour since the platform 26 * will either reboot into the ARM monitor (or pre-loader) 27 * or continuously cycle thru it without U-Boot running, 28 * depending upon the setting of Integrator/CP switch S2-4. 29 * 30 * However it may be needed if Integrator/CP switch S2-1 31 * is set OFF to boot direct into U-Boot. 32 * In that case comment out the line below. 33 */ 34 #define CONFIG_CM_INIT 35 #define CONFIG_CM_REMAP 36 #define CONFIG_CM_SPD_DETECT 37 38 /* 39 * The ARM boot monitor initializes the board. 40 * However, the default U-Boot code also performs the initialization. 41 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT 42 * - see documentation supplied with board for details of how to choose the 43 * image to run at reset/power up 44 * e.g. whether the ARM Boot Monitor runs before U-Boot 45 */ 46 47 /* 48 * The ARM boot monitor does not relocate U-Boot. 49 * However, the default U-Boot code performs the relocation check, 50 * and may relocate the code if the memory map is changed. 51 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT 52 */ 53 /* #define SKIP_CONFIG_RELOCATE_UBOOT */ 54 55 /* 56 * Physical Memory Map 57 */ 58 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ 59 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 60 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 61 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE 62 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ 63 CONFIG_SYS_INIT_RAM_SIZE - \ 64 GENERATED_GBL_DATA_SIZE) 65 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET 66 67 /* 68 * FLASH and environment organization 69 * Top varies according to amount fitted 70 * Reserve top 4 blocks of flash 71 * - ARM Boot Monitor 72 * - Unused 73 * - SIB block 74 * - U-Boot environment 75 */ 76 #define CONFIG_SYS_FLASH_BASE 0x24000000 77 #define CONFIG_SYS_MAX_FLASH_BANKS 1 78 79 /* Timeout values in ticks */ 80 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ 81 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ 82 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 83