1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2018 NXP 4 */ 5 6 #ifndef __IMX8M_PICOPI_H 7 #define __IMX8M_PICOPI_H 8 9 #include <linux/sizes.h> 10 #include <asm/arch/imx-regs.h> 11 12 #define CONFIG_SPL_MAX_SIZE (124 * 1024) 13 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 16 17 #ifdef CONFIG_SPL_BUILD 18 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ 19 #define CONFIG_SPL_WATCHDOG 20 #define CONFIG_SPL_DRIVERS_MISC 21 #define CONFIG_SPL_POWER 22 #define CONFIG_SPL_I2C 23 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" 24 #define CONFIG_SPL_STACK 0x187FF0 25 #define CONFIG_SPL_LIBCOMMON_SUPPORT 26 #define CONFIG_SPL_LIBGENERIC_SUPPORT 27 #define CONFIG_SPL_GPIO 28 #define CONFIG_SPL_MMC 29 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 30 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ 31 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 32 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ 33 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 34 35 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 36 #define CONFIG_MALLOC_F_ADDR 0x182000 37 /* For RAW image gives a error info not panic */ 38 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE 39 40 #undef CONFIG_DM_MMC 41 #endif 42 43 #define CONFIG_REMAKE_ELF 44 45 /* ENET Config */ 46 /* ENET1 */ 47 #if defined(CONFIG_CMD_NET) 48 #define CONFIG_MII 49 #define CONFIG_ETHPRIME "FEC" 50 51 #define CONFIG_FEC_MXC 52 #define CONFIG_FEC_XCV_TYPE RGMII 53 #define CONFIG_FEC_MXC_PHYADDR 1 54 #define FEC_QUIRK_ENET_MAC 55 56 #define CONFIG_PHY_GIGE 57 #define IMX_FEC_BASE 0x30BE0000 58 59 #define CONFIG_PHYLIB 60 #define CONFIG_PHY_ATHEROS 61 #endif 62 63 /* Initial environment variables */ 64 #define CONFIG_EXTRA_ENV_SETTINGS \ 65 "script=boot.scr\0" \ 66 "image=Image\0" \ 67 "console=ttymxc0,115200\0" \ 68 "fdt_addr=0x43000000\0" \ 69 "fdt_high=0xffffffffffffffff\0" \ 70 "fdt_file=imx8mq-pico-pi.dtb\0" \ 71 "initrd_addr=0x43800000\0" \ 72 "initrd_high=0xffffffffffffffff\0" \ 73 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 74 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 75 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 76 "mmcautodetect=yes\0" \ 77 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ 78 "loadbootscript=" \ 79 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 80 "bootscript=echo Running bootscript from mmc ...; source\0" \ 81 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 82 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 83 "mmcboot=echo Booting from mmc ...; " \ 84 "run mmcargs; " \ 85 "echo wait for boot; " \ 86 "fi;\0" \ 87 "netargs=setenv bootargs console=${console} " \ 88 "root=/dev/nfs " \ 89 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 90 "netboot=echo Booting from net ...; " \ 91 "run netargs; " \ 92 "if test ${ip_dyn} = yes; then " \ 93 "setenv get_cmd dhcp; " \ 94 "else " \ 95 "setenv get_cmd tftp; " \ 96 "fi; " \ 97 "${get_cmd} ${loadaddr} ${image}; " \ 98 "booti; " 99 100 #define CONFIG_BOOTCOMMAND \ 101 "mmc dev ${mmcdev}; if mmc rescan; then " \ 102 "if run loadbootscript; then " \ 103 "run bootscript; " \ 104 "else " \ 105 "if run loadimage; then " \ 106 "run mmcboot; " \ 107 "else run netboot; " \ 108 "fi; " \ 109 "fi; " \ 110 "else booti ${loadaddr} - ${fdt_addr}; fi" 111 112 /* Link Definitions */ 113 114 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 115 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 116 #define CONFIG_SYS_INIT_SP_OFFSET \ 117 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 118 #define CONFIG_SYS_INIT_SP_ADDR \ 119 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 120 121 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 122 123 #define CONFIG_SYS_SDRAM_BASE 0x40000000 124 #define PHYS_SDRAM 0x40000000 125 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */ 126 127 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 128 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 129 (PHYS_SDRAM_SIZE >> 1)) 130 131 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR 132 133 /* Monitor Command Prompt */ 134 #define CONFIG_SYS_CBSIZE 1024 135 #define CONFIG_SYS_MAXARGS 64 136 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 137 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 138 sizeof(CONFIG_SYS_PROMPT) + 16) 139 140 #define CONFIG_IMX_BOOTAUX 141 142 #define CONFIG_SYS_FSL_USDHC_NUM 2 143 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 144 145 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 146 147 #define CONFIG_MXC_GPIO 148 149 #define CONFIG_OF_SYSTEM_SETUP 150 151 #define CONFIG_SYS_BOOTM_LEN SZ_128M 152 153 #endif 154