1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 4 */ 5 #ifndef __CONFIG_RV1108_COMMON_H 6 #define __CONFIG_RV1108_COMMON_H 7 8 #include <asm/arch-rockchip/hardware.h> 9 #include "rockchip-common.h" 10 11 #define CONFIG_IRAM_BASE 0x10080000 12 13 #define CONFIG_SYS_CBSIZE 1024 14 15 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 16 /* TIMER1,initialized by ddr initialize code */ 17 #define CONFIG_SYS_TIMER_BASE 0x10350020 18 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 19 20 #define CONFIG_SYS_SDRAM_BASE 0x60000000 21 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) 22 23 /* rockchip ohci host driver */ 24 #define CONFIG_USB_OHCI_NEW 25 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 26 #endif 27 28 #ifndef CONFIG_SPL_BUILD 29 #define ENV_MEM_LAYOUT_SETTINGS \ 30 "scriptaddr=0x60000000\0" \ 31 "fdt_addr_r=0x61f00000\0" \ 32 "kernel_addr_r=0x62000000\0" \ 33 "ramdisk_addr_r=0x64000000\0" 34 35 #include <config_distro_bootcmd.h> 36 #define CONFIG_EXTRA_ENV_SETTINGS \ 37 ENV_MEM_LAYOUT_SETTINGS \ 38 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ 39 "partitions=" PARTS_DEFAULT \ 40 BOOTENV 41 #endif 42