1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (c) 2011 The Chromium OS Authors.
4  */
5 
6 #ifndef __CONFIG_H
7 #define __CONFIG_H
8 
9 #ifdef FTRACE
10 #define CONFIG_TRACE
11 #define CONFIG_TRACE_BUFFER_SIZE	(16 << 20)
12 #define CONFIG_TRACE_EARLY_SIZE		(16 << 20)
13 #define CONFIG_TRACE_EARLY
14 #define CONFIG_TRACE_EARLY_ADDR		0x00100000
15 #endif
16 
17 #ifndef CONFIG_SPL_BUILD
18 #define CONFIG_IO_TRACE
19 #endif
20 
21 #ifndef CONFIG_TIMER
22 #define CONFIG_SYS_TIMER_RATE		1000000
23 #endif
24 
25 #define CONFIG_HOST_MAX_DEVICES 4
26 
27 #define CONFIG_MALLOC_F_ADDR		0x0010000
28 
29 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
30 
31 /* turn on command-line edit/c/auto */
32 
33 /* SPI - enable all SPI flash types for testing purposes */
34 
35 #define CONFIG_I2C_EDID
36 
37 #define CONFIG_SYS_FDT_LOAD_ADDR	        0x100
38 
39 #define CONFIG_PHYSMEM
40 
41 /* Size of our emulated memory */
42 #define SB_CONCAT(x, y) x ## y
43 #define SB_TO_UL(s) SB_CONCAT(s, UL)
44 #define CONFIG_SYS_SDRAM_BASE		0
45 #define CONFIG_SYS_SDRAM_SIZE \
46 		(SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20)
47 #define CONFIG_SYS_MONITOR_BASE	0
48 
49 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
50 					115200}
51 
52 #define BOOT_TARGET_DEVICES(func) \
53 	func(HOST, host, 1) \
54 	func(HOST, host, 0)
55 
56 #ifdef __ASSEMBLY__
57 #define BOOTENV
58 #else
59 #include <config_distro_bootcmd.h>
60 #endif
61 
62 #define CONFIG_KEEP_SERVERADDR
63 #define CONFIG_UDP_CHECKSUM
64 #define CONFIG_TIMESTAMP
65 #define CONFIG_BOOTP_SERVERIP
66 
67 #ifndef SANDBOX_NO_SDL
68 #define CONFIG_SANDBOX_SDL
69 #endif
70 
71 /* LCD and keyboard require SDL support */
72 #ifdef CONFIG_SANDBOX_SDL
73 #define LCD_BPP			LCD_COLOR16
74 #define CONFIG_LCD_BMP_RLE8
75 
76 #define CONFIG_KEYBOARD
77 
78 #define SANDBOX_SERIAL_SETTINGS		"stdin=serial,cros-ec-keyb,usbkbd\0" \
79 					"stdout=serial,vidconsole\0" \
80 					"stderr=serial,vidconsole\0"
81 #else
82 #define SANDBOX_SERIAL_SETTINGS		"stdin=serial\0" \
83 					"stdout=serial,vidconsole\0" \
84 					"stderr=serial,vidconsole\0"
85 #endif
86 
87 #define SANDBOX_ETH_SETTINGS		"ethaddr=00:00:11:22:33:44\0" \
88 					"eth2addr=00:00:11:22:33:48\0" \
89 					"eth3addr=00:00:11:22:33:45\0" \
90 					"eth4addr=00:00:11:22:33:48\0" \
91 					"eth5addr=00:00:11:22:33:46\0" \
92 					"eth6addr=00:00:11:22:33:47\0" \
93 					"ipaddr=1.2.3.4\0"
94 
95 #define MEM_LAYOUT_ENV_SETTINGS \
96 	"bootm_size=0x10000000\0" \
97 	"kernel_addr_r=0x1000000\0" \
98 	"fdt_addr_r=0xc00000\0" \
99 	"ramdisk_addr_r=0x2000000\0" \
100 	"scriptaddr=0x1000\0" \
101 	"pxefile_addr_r=0x2000\0"
102 
103 #define CONFIG_EXTRA_ENV_SETTINGS \
104 	SANDBOX_SERIAL_SETTINGS \
105 	SANDBOX_ETH_SETTINGS \
106 	BOOTENV \
107 	MEM_LAYOUT_ENV_SETTINGS
108 
109 #ifndef CONFIG_SPL_BUILD
110 #define CONFIG_SYS_IDE_MAXBUS		1
111 #define CONFIG_SYS_ATA_IDE0_OFFSET	0
112 #define CONFIG_SYS_IDE_MAXDEVICE	2
113 #define CONFIG_SYS_ATA_BASE_ADDR	0x100
114 #define CONFIG_SYS_ATA_DATA_OFFSET	0
115 #define CONFIG_SYS_ATA_REG_OFFSET	1
116 #define CONFIG_SYS_ATA_ALT_OFFSET	2
117 #define CONFIG_SYS_ATA_STRIDE		4
118 #endif
119 
120 #define CONFIG_SCSI_AHCI_PLAT
121 #define CONFIG_SYS_SCSI_MAX_DEVICE	2
122 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	8
123 #define CONFIG_SYS_SCSI_MAX_LUN		4
124 
125 #define CONFIG_SYS_SATA_MAX_DEVICE	2
126 
127 #endif
128