1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
4  * (C) Copyright 2013 Siemens AG
5  *
6  * Based on:
7  * U-Boot file: include/configs/at91sam9260ek.h
8  *
9  * (C) Copyright 2007-2008
10  * Stelian Pop <stelian@popies.net>
11  * Lead Tech Design <www.leadtechdesign.com>
12  */
13 
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16 
17 /*
18  * SoC must be defined first, before hardware.h is included.
19  * In this case SoC is defined in boards.cfg.
20  */
21 #include <asm/hardware.h>
22 #include <linux/sizes.h>
23 
24 /*
25  * Warning: changing CONFIG_SYS_TEXT_BASE requires
26  * adapting the initial boot program.
27  * Since the linker has to swallow that define, we must use a pure
28  * hex number here!
29  */
30 
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
33 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
34 
35 /* Misc CPU related */
36 
37 /* general purpose I/O */
38 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
39 #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
40 
41 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
42 #define CONFIG_USART_ID			ATMEL_ID_SYS
43 
44 /*
45  * SDRAM: 1 bank, min 32, max 128 MB
46  * Initialized before u-boot gets started.
47  */
48 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
49 #define CONFIG_SYS_SDRAM_SIZE		(128 * SZ_1M)
50 
51 /*
52  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
53  * leaving the correct space for initial global data structure above
54  * that address while providing maximum stack area below.
55  */
56 #define CONFIG_SYS_INIT_SP_ADDR \
57 	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
58 
59 /* NAND flash */
60 #ifdef CONFIG_CMD_NAND
61 #define CONFIG_SYS_MAX_NAND_DEVICE	1
62 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
63 #define CONFIG_SYS_NAND_DBW_8
64 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
65 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
66 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
67 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
68 #endif
69 
70 /* Ethernet */
71 #define CONFIG_MACB
72 #define CONFIG_RMII
73 #define CONFIG_AT91_WANTS_COMMON_PHY
74 
75 /* USB */
76 #if defined(CONFIG_BOARD_TAURUS)
77 #define CONFIG_USB_ATMEL
78 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
79 #define CONFIG_USB_OHCI_NEW
80 #define CONFIG_SYS_USB_OHCI_CPU_INIT
81 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
82 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
83 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
84 
85 /* USB DFU support */
86 
87 #define CONFIG_USB_GADGET_AT91
88 
89 /* DFU class support */
90 #define DFU_MANIFEST_POLL_TIMEOUT	25000
91 #endif
92 
93 /* SPI EEPROM */
94 #define TAURUS_SPI_MASK (1 << 4)
95 
96 #if defined(CONFIG_SPL_BUILD)
97 /* SPL related */
98 #endif
99 
100 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
101 
102 #ifndef CONFIG_SPL_BUILD
103 #if defined(CONFIG_BOARD_AXM)
104 #define CONFIG_EXTRA_ENV_SETTINGS \
105 	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
106 		"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
107 	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
108 	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
109 	"boot_retries=0\0" \
110 	"ethact=macb0\0" \
111 	"flash_nfs=run nand_kernel;run nfsargs;run addip;" \
112 		"upgrade_available;bootm ${kernel_ram};reset\0" \
113 	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
114 		"bootm ${kernel_ram};reset\0" \
115 	"flash_self_test=run nand_kernel;run setbootargs addtest;" \
116 		"upgrade_available;bootm ${kernel_ram};reset\0" \
117 	"hostname=systemone\0" \
118 	"kernel_Off=0x00200000\0" \
119 	"kernel_Off_fallback=0x03800000\0" \
120 	"kernel_ram=0x21500000\0" \
121 	"kernel_size=0x00400000\0" \
122 	"kernel_size_fallback=0x00400000\0" \
123 	"loads_echo=1\0" \
124 	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
125 		"${kernel_size}\0" \
126 	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
127 		"run nfsargs;run addip;upgrade_available;" \
128 		"bootm ${kernel_ram};reset\0" \
129 	"netdev=eth0\0" \
130 	"nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
131 		"rw nfsroot=${serverip}:${rootpath} " \
132 		"at91sam9_wdt.wdt_timeout=16\0" \
133 	"partitionset_active=A\0" \
134 	"preboot=echo;echo Type 'run flash_self' to use kernel and root " \
135 		"filesystem on memory;echo Type 'run flash_nfs' to use " \
136 		"kernel from memory and root filesystem over NFS;echo Type " \
137 		"'run net_nfs' to get Kernel over TFTP and mount root " \
138 		"filesystem over NFS;echo\0" \
139 	"project_dir=systemone\0" \
140 	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
141 	"rootfs=/dev/mtdblock5\0" \
142 	"rootfs_fallback=/dev/mtdblock7\0" \
143 	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
144 		"root=${rootfs} rootfstype=jffs2 panic=7 " \
145 		"at91sam9_wdt.wdt_timeout=16\0" \
146 	"stderr=serial\0" \
147 	"stdin=serial\0" \
148 	"stdout=serial\0" \
149 	"upgrade_available=0\0"
150 #endif
151 #endif /* #ifndef CONFIG_SPL_BUILD */
152 
153 /* Defines for SPL */
154 #define CONFIG_SPL_MAX_SIZE		(31 * SZ_512)
155 #define	CONFIG_SPL_STACK		(ATMEL_BASE_SRAM1 + SZ_16K)
156 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
157 					CONFIG_SYS_MALLOC_LEN)
158 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
159 
160 #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
161 #define CONFIG_SPL_BSS_MAX_SIZE		(3 * SZ_512)
162 
163 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
164 #define CONFIG_SYS_USE_NANDFLASH	1
165 #define CONFIG_SPL_NAND_RAW_ONLY
166 #define CONFIG_SPL_NAND_SOFTECC
167 #define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
168 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
169 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
170 
171 #define CONFIG_SYS_NAND_SIZE		(256 * SZ_1M)
172 #define CONFIG_SYS_NAND_ECCSIZE		256
173 #define CONFIG_SYS_NAND_ECCBYTES	3
174 #define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
175 					  48, 49, 50, 51, 52, 53, 54, 55, \
176 					  56, 57, 58, 59, 60, 61, 62, 63, }
177 
178 #define CONFIG_SPL_ATMEL_SIZE
179 #define CONFIG_SYS_MASTER_CLOCK		132096000
180 #define AT91_PLL_LOCK_TIMEOUT		1000000
181 #define CONFIG_SYS_AT91_PLLA		0x202A3F01
182 #define CONFIG_SYS_MCKR			0x1300
183 #define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
184 #define CONFIG_SYS_AT91_PLLB		0x10193F05
185 
186 #define CONFIG_SPL_PAD_TO		CONFIG_SYS_NAND_U_BOOT_OFFS
187 #define CONFIG_SYS_SPL_LEN		CONFIG_SPL_PAD_TO
188 
189 #endif
190