1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2010-2012 4 * NVIDIA Corporation <www.nvidia.com> 5 */ 6 7 #ifndef _TEGRA_COMMON_H_ 8 #define _TEGRA_COMMON_H_ 9 #include <linux/sizes.h> 10 #include <linux/stringify.h> 11 12 /* 13 * High Level Configuration Options 14 */ 15 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 16 17 #include <asm/arch/tegra.h> /* get chip and board defs */ 18 19 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ 20 #ifndef CONFIG_ARM64 21 #define CONFIG_SYS_TIMER_RATE 1000000 22 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 23 #endif 24 25 /* Environment */ 26 27 /* 28 * NS16550 Configuration 29 */ 30 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 31 32 /* 33 * Common HW configuration. 34 * If this varies between SoCs later, move to tegraNN-common.h 35 * Note: This is number of devices, not max device ID. 36 */ 37 #define CONFIG_SYS_MMC_MAX_DEVICE 4 38 39 /* 40 * Increasing the size of the IO buffer as default nfsargs size is more 41 * than 256 and so it is not possible to edit it 42 */ 43 #define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ 44 /* Print Buffer Size */ 45 #define CONFIG_SYS_MAXARGS 64 /* max number of command args */ 46 47 /* Boot Argument Buffer Size */ 48 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 49 50 #ifdef CONFIG_ARM64 51 #define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" 52 #else 53 #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" 54 #endif 55 56 /*----------------------------------------------------------------------- 57 * Physical Memory Map 58 */ 59 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 60 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 61 62 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 63 64 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 65 66 #ifndef CONFIG_ARM64 67 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 68 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 69 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 70 CONFIG_SYS_INIT_RAM_SIZE - \ 71 GENERATED_GBL_DATA_SIZE) 72 #endif 73 74 #ifndef CONFIG_ARM64 75 /* Defines for SPL */ 76 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 77 CONFIG_SPL_TEXT_BASE) 78 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 79 #endif 80 81 #endif /* _TEGRA_COMMON_H_ */ 82