1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Samsung Electronics 4 * Heungjun Kim <riverful.kim@samsung.com> 5 * 6 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 7 */ 8 9 #ifndef __CONFIG_TRATS_H 10 #define __CONFIG_TRATS_H 11 12 #include <configs/exynos4-common.h> 13 14 #define CONFIG_TRATS 15 16 #define CONFIG_TIZEN /* TIZEN lib */ 17 18 #define CONFIG_SYS_L2CACHE_OFF 19 #ifndef CONFIG_SYS_L2CACHE_OFF 20 #define CONFIG_SYS_L2_PL310 21 #define CONFIG_SYS_PL310_BASE 0x10502000 22 #endif 23 24 /* TRATS has 4 banks of DRAM */ 25 #define CONFIG_SYS_SDRAM_BASE 0x40000000 26 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 27 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 28 29 #define CONFIG_BOOTCOMMAND "run autoboot" 30 31 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 32 - GENERATED_GBL_DATA_SIZE) 33 34 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 35 36 #define CONFIG_SYS_MONITOR_BASE 0x00000000 37 38 /* Tizen - partitions definitions */ 39 #define PARTS_CSA "csa-mmc" 40 #define PARTS_BOOT "boot" 41 #define PARTS_QBOOT "qboot" 42 #define PARTS_CSC "csc" 43 #define PARTS_ROOT "platform" 44 #define PARTS_DATA "data" 45 #define PARTS_UMS "ums" 46 47 #define PARTS_DEFAULT \ 48 "uuid_disk=${uuid_gpt_disk};" \ 49 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 50 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 51 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \ 52 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 53 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 54 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 55 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 56 57 #define CONFIG_DFU_ALT \ 58 "u-boot raw 0x80 0x400;" \ 59 "/uImage ext4 0 2;" \ 60 "/modem.bin ext4 0 2;" \ 61 "/exynos4210-trats.dtb ext4 0 2;" \ 62 ""PARTS_CSA" part 0 1;" \ 63 ""PARTS_BOOT" part 0 2;" \ 64 ""PARTS_QBOOT" part 0 3;" \ 65 ""PARTS_CSC" part 0 4;" \ 66 ""PARTS_ROOT" part 0 5;" \ 67 ""PARTS_DATA" part 0 6;" \ 68 ""PARTS_UMS" part 0 7;" \ 69 "params.bin raw 0x38 0x8;" \ 70 "/Image.itb ext4 0 2\0" 71 72 #define CONFIG_EXTRA_ENV_SETTINGS \ 73 "bootk=" \ 74 "run loaduimage;" \ 75 "if run loaddtb; then " \ 76 "bootm 0x40007FC0 - ${fdtaddr};" \ 77 "fi;" \ 78 "bootm 0x40007FC0;\0" \ 79 "updatebackup=" \ 80 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ 81 "mmc dev 0 0\0" \ 82 "updatebootb=" \ 83 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 84 "lpj=lpj=3981312\0" \ 85 "nfsboot=" \ 86 "setenv bootargs root=/dev/nfs rw " \ 87 "nfsroot=${nfsroot},nolock,tcp " \ 88 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 89 "${netmask}:generic:usb0:off ${console} ${meminfo}" \ 90 "; run bootk\0" \ 91 "ramfsboot=" \ 92 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 93 "${console} ${meminfo} " \ 94 "initrd=0x43000000,8M ramdisk=8192\0" \ 95 "mmcboot=" \ 96 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 97 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 98 "run bootk\0" \ 99 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ 100 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 101 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 102 "verify=n\0" \ 103 "rootfstype=ext4\0" \ 104 "console=console=ttySAC2,115200n8\0" \ 105 "meminfo=crashkernel=32M@0x50000000\0" \ 106 "nfsroot=/nfsroot/arm\0" \ 107 "bootblock=10\0" \ 108 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 109 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 110 "${fdtfile}\0" \ 111 "mmcdev=0\0" \ 112 "mmcbootpart=2\0" \ 113 "mmcrootpart=5\0" \ 114 "opts=always_resume=1\0" \ 115 "partitions=" PARTS_DEFAULT \ 116 "dfu_alt_info=" CONFIG_DFU_ALT \ 117 "spladdr=0x40000100\0" \ 118 "splsize=0x200\0" \ 119 "splfile=falcon.bin\0" \ 120 "spl_export=" \ 121 "setexpr spl_imgsize ${splsize} + 8 ;" \ 122 "setenv spl_imgsize 0x${spl_imgsize};" \ 123 "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 124 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 125 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 126 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 127 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 128 "spl export atags 0x40007FC0;" \ 129 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 130 "mw.l ${spl_addr_tmp} ${splsize};" \ 131 "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 132 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 133 "setenv spl_imgsize;" \ 134 "setenv spl_imgaddr;" \ 135 "setenv spl_addr_tmp;\0" \ 136 ENV_ITB \ 137 "fdtaddr=40800000\0" \ 138 139 /* Falcon mode definitions */ 140 #define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100 141 142 /* GPT */ 143 144 /* Security subsystem - enable hw_rand() */ 145 #define CONFIG_EXYNOS_ACE_SHA 146 147 /* Common misc for Samsung */ 148 #define CONFIG_MISC_COMMON 149 150 /* Download menu - Samsung common */ 151 #define CONFIG_LCD_MENU 152 153 /* Download menu - definitions for check keys */ 154 #ifndef __ASSEMBLY__ 155 156 #define KEY_PWR_PMIC_NAME "MAX8997_PMIC" 157 #define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1 158 #define KEY_PWR_STATUS_MASK (1 << 0) 159 #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 160 #define KEY_PWR_INTERRUPT_MASK (1 << 0) 161 162 #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 163 #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 164 #endif /* __ASSEMBLY__ */ 165 166 /* LCD console */ 167 #define LCD_BPP LCD_COLOR16 168 169 /* LCD */ 170 #define CONFIG_FB_ADDR 0x52504000 171 #define CONFIG_EXYNOS_MIPI_DSIM 172 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 173 174 #endif /* __CONFIG_H */ 175